LXR linux/arch/arm/vfp/vfpinstr.h

   1/*
   2 *  linux/arch/arm/vfp/vfpinstr.h
   3 *
   4 *  Copyright (C) 2004 ARM Limited.
   5 *  Written by Deep Blue Solutions Limited.
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 *
  11 * VFP instruction masks.
  12 */
  13#define INST_CPRTDO(inst)       (((inst) & 0x0f000000) == 0x0e000000)
  14#define INST_CPRT(inst)         ((inst) & (1 << 4))
  15#define INST_CPRT_L(inst)       ((inst) & (1 << 20))
  16#define INST_CPRT_Rd(inst)      (((inst) & (15 << 12)) >> 12)
  17#define INST_CPRT_OP(inst)      (((inst) >> 21) & 7)
  18#define INST_CPNUM(inst)        ((inst) & 0xf00)
  19#define CPNUM(cp)               ((cp) << 8)
  20
  21#define FOP_MASK        (0x00b00040)
  22#define FOP_FMAC        (0x00000000)
  23#define FOP_FNMAC       (0x00000040)
  24#define FOP_FMSC        (0x00100000)
  25#define FOP_FNMSC       (0x00100040)
  26#define FOP_FMUL        (0x00200000)
  27#define FOP_FNMUL       (0x00200040)
  28#define FOP_FADD        (0x00300000)
  29#define FOP_FSUB        (0x00300040)
  30#define FOP_FDIV        (0x00800000)
  31#define FOP_EXT         (0x00b00040)
  32
  33#define FOP_TO_IDX(inst)        ((inst & 0x00b00000) >> 20 | (inst & (1 << 6)) >> 4)
  34
  35#define FEXT_MASK       (0x000f0080)
  36#define FEXT_FCPY       (0x00000000)
  37#define FEXT_FABS       (0x00000080)
  38#define FEXT_FNEG       (0x00010000)
  39#define FEXT_FSQRT      (0x00010080)
  40#define FEXT_FCMP       (0x00040000)
  41#define FEXT_FCMPE      (0x00040080)
  42#define FEXT_FCMPZ      (0x00050000)
  43#define FEXT_FCMPEZ     (0x00050080)
  44#define FEXT_FCVT       (0x00070080)
  45#define FEXT_FUITO      (0x00080000)
  46#define FEXT_FSITO      (0x00080080)
  47#define FEXT_FTOUI      (0x000c0000)
  48#define FEXT_FTOUIZ     (0x000c0080)
  49#define FEXT_FTOSI      (0x000d0000)
  50#define FEXT_FTOSIZ     (0x000d0080)
  51
  52#define FEXT_TO_IDX(inst)       ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
  53
  54#define vfp_get_sd(inst)        ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22)
  55#define vfp_get_dd(inst)        ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18)
  56#define vfp_get_sm(inst)        ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5)
  57#define vfp_get_dm(inst)        ((inst & 0x0000000f) | (inst & (1 << 5)) >> 1)
  58#define vfp_get_sn(inst)        ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
  59#define vfp_get_dn(inst)        ((inst & 0x000f0000) >> 16 | (inst & (1 << 7)) >> 3)
  60
  61#define vfp_single(inst)        (((inst) & 0x0000f00) == 0xa00)
  62
  63#define FPSCR_N (1 << 31)
  64#define FPSCR_Z (1 << 30)
  65#define FPSCR_C (1 << 29)
  66#define FPSCR_V (1 << 28)
  67
  68/*
  69 * Since we aren't building with -mfpu=vfp, we need to code
  70 * these instructions using their MRC/MCR equivalents.
  71 */
  72#define vfpreg(_vfp_) #_vfp_
  73
  74#define fmrx(_vfp_) ({                  \
  75        u32 __v;                        \
  76        asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx   %0, " #_vfp_    \
  77            : "=r" (__v) : : "cc");     \
  78        __v;                            \
  79 })
  80
  81#define fmxr(_vfp_,_var_)               \
  82        asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr   " #_vfp_ ", %0" \
  83           : : "r" (_var_) : "cc")
  84
  85u32 vfp_single_cpdo(u32 inst, u32 fpscr);
  86u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);
  87
  88u32 vfp_double_cpdo(u32 inst, u32 fpscr);
  89