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12#include <linux/module.h>
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/signal.h>
16#include <linux/sched.h>
17#include <linux/init.h>
18
19#include <asm/fpu-ucf64.h>
20
21
22
23
24#define F64_NAN_FLAG 0x100
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30
31
32#define F64_EXCEPTION_ERROR ((u32)-1 & ~F64_NAN_FLAG)
33
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36
37
38#define f64reg(_f64_) #_f64_
39
40#define cff(_f64_) ({ \
41 u32 __v; \
42 asm("cff %0, " f64reg(_f64_) "@ fmrx %0, " #_f64_ \
43 : "=r" (__v) : : "cc"); \
44 __v; \
45 })
46
47#define ctf(_f64_, _var_) \
48 asm("ctf %0, " f64reg(_f64_) "@ fmxr " #_f64_ ", %0" \
49 : : "r" (_var_) : "cc")
50
51
52
53
54
55void ucf64_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
56{
57 siginfo_t info;
58
59 memset(&info, 0, sizeof(info));
60
61 info.si_signo = SIGFPE;
62 info.si_code = sicode;
63 info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
64
65
66
67
68
69 current->thread.error_code = 0;
70 current->thread.trap_no = 6;
71
72 send_sig_info(SIGFPE, &info, current);
73}
74
75
76
77
78void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs)
79{
80 u32 tmp = fpexc;
81 u32 exc = F64_EXCEPTION_ERROR & fpexc;
82
83 pr_debug("UniCore-F64: instruction %08x fpscr %08x\n",
84 inst, fpexc);
85
86 if (exc & FPSCR_CMPINSTR_BIT) {
87 if (exc & FPSCR_CON)
88 tmp |= FPSCR_CON;
89 else
90 tmp &= ~(FPSCR_CON);
91 exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON);
92 } else {
93 pr_debug(KERN_ERR "UniCore-F64 Error: unhandled exceptions\n");
94 pr_debug(KERN_ERR "UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",
95 cff(FPSCR), inst);
96
97 ucf64_raise_sigfpe(0, regs);
98 return;
99 }
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105
106 tmp &= ~(FPSCR_TRAP | FPSCR_IOS | FPSCR_OFS | FPSCR_UFS |
107 FPSCR_IXS | FPSCR_HIS | FPSCR_IOC | FPSCR_OFC |
108 FPSCR_UFC | FPSCR_IXC | FPSCR_HIC);
109
110 tmp |= exc;
111 ctf(FPSCR, tmp);
112}
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114
115
116
117static int __init ucf64_init(void)
118{
119 ctf(FPSCR, 0x0);
120
121 printk(KERN_INFO "Enable UniCore-F64 support.\n");
122
123 return 0;
124}
125
126late_initcall(ucf64_init);
127