1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18#ifndef __MDP5_KMS_H__
19#define __MDP5_KMS_H__
20
21#include "msm_drv.h"
22#include "msm_kms.h"
23#include "mdp/mdp_kms.h"
24#include "mdp5.xml.h"
25#include "mdp5_smp.h"
26
27struct mdp5_kms {
28 struct mdp_kms base;
29
30 struct drm_device *dev;
31
32 int rev;
33
34
35 int id;
36 struct msm_mmu *mmu;
37
38
39 mdp5_smp_state_t smp_state;
40 struct mdp5_client_smp_state smp_client_state[CID_MAX];
41 int smp_blk_cnt;
42
43
44 void __iomem *mmio, *vbif;
45
46 struct regulator *vdd;
47
48 struct clk *axi_clk;
49 struct clk *ahb_clk;
50 struct clk *src_clk;
51 struct clk *core_clk;
52 struct clk *lut_clk;
53 struct clk *vsync_clk;
54
55 struct hdmi *hdmi;
56
57 struct mdp_irq error_handler;
58};
59#define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base)
60
61
62struct mdp5_platform_config {
63 struct iommu_domain *iommu;
64 uint32_t max_clk;
65 int smp_blk_cnt;
66};
67
68static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data)
69{
70 msm_writel(data, mdp5_kms->mmio + reg);
71}
72
73static inline u32 mdp5_read(struct mdp5_kms *mdp5_kms, u32 reg)
74{
75 return msm_readl(mdp5_kms->mmio + reg);
76}
77
78static inline const char *pipe2name(enum mdp5_pipe pipe)
79{
80 static const char *names[] = {
81#define NAME(n) [SSPP_ ## n] = #n
82 NAME(VIG0), NAME(VIG1), NAME(VIG2),
83 NAME(RGB0), NAME(RGB1), NAME(RGB2),
84 NAME(DMA0), NAME(DMA1),
85#undef NAME
86 };
87 return names[pipe];
88}
89
90static inline uint32_t pipe2flush(enum mdp5_pipe pipe)
91{
92 switch (pipe) {
93 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0;
94 case SSPP_VIG1: return MDP5_CTL_FLUSH_VIG1;
95 case SSPP_VIG2: return MDP5_CTL_FLUSH_VIG2;
96 case SSPP_RGB0: return MDP5_CTL_FLUSH_RGB0;
97 case SSPP_RGB1: return MDP5_CTL_FLUSH_RGB1;
98 case SSPP_RGB2: return MDP5_CTL_FLUSH_RGB2;
99 case SSPP_DMA0: return MDP5_CTL_FLUSH_DMA0;
100 case SSPP_DMA1: return MDP5_CTL_FLUSH_DMA1;
101 default: return 0;
102 }
103}
104
105static inline int pipe2nclients(enum mdp5_pipe pipe)
106{
107 switch (pipe) {
108 case SSPP_RGB0:
109 case SSPP_RGB1:
110 case SSPP_RGB2:
111 return 1;
112 default:
113 return 3;
114 }
115}
116
117static inline enum mdp5_client_id pipe2client(enum mdp5_pipe pipe, int plane)
118{
119 WARN_ON(plane >= pipe2nclients(pipe));
120 switch (pipe) {
121 case SSPP_VIG0: return CID_VIG0_Y + plane;
122 case SSPP_VIG1: return CID_VIG1_Y + plane;
123 case SSPP_VIG2: return CID_VIG2_Y + plane;
124 case SSPP_RGB0: return CID_RGB0;
125 case SSPP_RGB1: return CID_RGB1;
126 case SSPP_RGB2: return CID_RGB2;
127 case SSPP_DMA0: return CID_DMA0_Y + plane;
128 case SSPP_DMA1: return CID_DMA1_Y + plane;
129 default: return CID_UNUSED;
130 }
131}
132
133static inline uint32_t mixer2flush(int lm)
134{
135 switch (lm) {
136 case 0: return MDP5_CTL_FLUSH_LM0;
137 case 1: return MDP5_CTL_FLUSH_LM1;
138 case 2: return MDP5_CTL_FLUSH_LM2;
139 default: return 0;
140 }
141}
142
143static inline uint32_t intf2err(int intf)
144{
145 switch (intf) {
146 case 0: return MDP5_IRQ_INTF0_UNDER_RUN;
147 case 1: return MDP5_IRQ_INTF1_UNDER_RUN;
148 case 2: return MDP5_IRQ_INTF2_UNDER_RUN;
149 case 3: return MDP5_IRQ_INTF3_UNDER_RUN;
150 default: return 0;
151 }
152}
153
154static inline uint32_t intf2vblank(int intf)
155{
156 switch (intf) {
157 case 0: return MDP5_IRQ_INTF0_VSYNC;
158 case 1: return MDP5_IRQ_INTF1_VSYNC;
159 case 2: return MDP5_IRQ_INTF2_VSYNC;
160 case 3: return MDP5_IRQ_INTF3_VSYNC;
161 default: return 0;
162 }
163}
164
165int mdp5_disable(struct mdp5_kms *mdp5_kms);
166int mdp5_enable(struct mdp5_kms *mdp5_kms);
167
168void mdp5_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask);
169void mdp5_irq_preinstall(struct msm_kms *kms);
170int mdp5_irq_postinstall(struct msm_kms *kms);
171void mdp5_irq_uninstall(struct msm_kms *kms);
172irqreturn_t mdp5_irq(struct msm_kms *kms);
173int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
174void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
175
176static inline
177uint32_t mdp5_get_formats(enum mdp5_pipe pipe, uint32_t *pixel_formats,
178 uint32_t max_formats)
179{
180
181
182
183 return mdp_get_formats(pixel_formats, max_formats);
184}
185
186void mdp5_plane_install_properties(struct drm_plane *plane,
187 struct drm_mode_object *obj);
188void mdp5_plane_set_scanout(struct drm_plane *plane,
189 struct drm_framebuffer *fb);
190int mdp5_plane_mode_set(struct drm_plane *plane,
191 struct drm_crtc *crtc, struct drm_framebuffer *fb,
192 int crtc_x, int crtc_y,
193 unsigned int crtc_w, unsigned int crtc_h,
194 uint32_t src_x, uint32_t src_y,
195 uint32_t src_w, uint32_t src_h);
196void mdp5_plane_complete_flip(struct drm_plane *plane);
197enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
198struct drm_plane *mdp5_plane_init(struct drm_device *dev,
199 enum mdp5_pipe pipe, bool private_plane);
200
201uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc);
202
203void mdp5_crtc_cancel_pending_flip(struct drm_crtc *crtc, struct drm_file *file);
204void mdp5_crtc_set_intf(struct drm_crtc *crtc, int intf,
205 enum mdp5_intf intf_id);
206void mdp5_crtc_attach(struct drm_crtc *crtc, struct drm_plane *plane);
207void mdp5_crtc_detach(struct drm_crtc *crtc, struct drm_plane *plane);
208struct drm_crtc *mdp5_crtc_init(struct drm_device *dev,
209 struct drm_plane *plane, int id);
210
211struct drm_encoder *mdp5_encoder_init(struct drm_device *dev, int intf,
212 enum mdp5_intf intf_id);
213
214#endif
215
