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20#include <stdarg.h>
21#include <linux/mutex.h>
22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
39#include <linux/seq_file.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/device.h>
43#include <linux/syscore_ops.h>
44#include <linux/freezer.h>
45#include <linux/syscalls.h>
46#include <linux/suspend.h>
47#include <linux/cpu.h>
48#include <linux/compat.h>
49#include <linux/of_address.h>
50#include <linux/of_irq.h>
51#include <asm/prom.h>
52#include <asm/machdep.h>
53#include <asm/io.h>
54#include <asm/pgtable.h>
55#include <asm/sections.h>
56#include <asm/irq.h>
57#include <asm/pmac_feature.h>
58#include <asm/pmac_pfunc.h>
59#include <asm/pmac_low_i2c.h>
60#include <asm/uaccess.h>
61#include <asm/mmu_context.h>
62#include <asm/cputable.h>
63#include <asm/time.h>
64#include <asm/backlight.h>
65
66#include "via-pmu-event.h"
67
68
69#undef DEBUG_SLEEP
70
71
72#define PMU_MINOR 154
73
74
75#define BATTERY_POLLING_COUNT 2
76
77static DEFINE_MUTEX(pmu_info_proc_mutex);
78static volatile unsigned char __iomem *via;
79
80
81#define RS 0x200
82#define B 0
83#define A RS
84#define DIRB (2*RS)
85#define DIRA (3*RS)
86#define T1CL (4*RS)
87#define T1CH (5*RS)
88#define T1LL (6*RS)
89#define T1LH (7*RS)
90#define T2CL (8*RS)
91#define T2CH (9*RS)
92#define SR (10*RS)
93#define ACR (11*RS)
94#define PCR (12*RS)
95#define IFR (13*RS)
96#define IER (14*RS)
97#define ANH (15*RS)
98
99
100#define TACK 0x08
101#define TREQ 0x10
102
103
104#define SR_CTRL 0x1c
105#define SR_EXT 0x0c
106#define SR_OUT 0x10
107
108
109#define IER_SET 0x80
110#define IER_CLR 0
111#define SR_INT 0x04
112#define CB2_INT 0x08
113#define CB1_INT 0x10
114
115static volatile enum pmu_state {
116 idle,
117 sending,
118 intack,
119 reading,
120 reading_intr,
121 locked,
122} pmu_state;
123
124static volatile enum int_data_state {
125 int_data_empty,
126 int_data_fill,
127 int_data_ready,
128 int_data_flush
129} int_data_state[2] = { int_data_empty, int_data_empty };
130
131static struct adb_request *current_req;
132static struct adb_request *last_req;
133static struct adb_request *req_awaiting_reply;
134static unsigned char interrupt_data[2][32];
135static int interrupt_data_len[2];
136static int int_data_last;
137static unsigned char *reply_ptr;
138static int data_index;
139static int data_len;
140static volatile int adb_int_pending;
141static volatile int disable_poll;
142static struct device_node *vias;
143static int pmu_kind = PMU_UNKNOWN;
144static int pmu_fully_inited;
145static int pmu_has_adb;
146static struct device_node *gpio_node;
147static unsigned char __iomem *gpio_reg;
148static int gpio_irq = NO_IRQ;
149static int gpio_irq_enabled = -1;
150static volatile int pmu_suspended;
151static spinlock_t pmu_lock;
152static u8 pmu_intr_mask;
153static int pmu_version;
154static int drop_interrupts;
155#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
156static int option_lid_wakeup = 1;
157#endif
158static unsigned long async_req_locks;
159static unsigned int pmu_irq_stats[11];
160
161static struct proc_dir_entry *proc_pmu_root;
162static struct proc_dir_entry *proc_pmu_info;
163static struct proc_dir_entry *proc_pmu_irqstats;
164static struct proc_dir_entry *proc_pmu_options;
165static int option_server_mode;
166
167int pmu_battery_count;
168int pmu_cur_battery;
169unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
170struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
171static int query_batt_timer = BATTERY_POLLING_COUNT;
172static struct adb_request batt_req;
173static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
174
175int __fake_sleep;
176int asleep;
177
178#ifdef CONFIG_ADB
179static int adb_dev_map;
180static int pmu_adb_flags;
181
182static int pmu_probe(void);
183static int pmu_init(void);
184static int pmu_send_request(struct adb_request *req, int sync);
185static int pmu_adb_autopoll(int devs);
186static int pmu_adb_reset_bus(void);
187#endif
188
189static int init_pmu(void);
190static void pmu_start(void);
191static irqreturn_t via_pmu_interrupt(int irq, void *arg);
192static irqreturn_t gpio1_interrupt(int irq, void *arg);
193static const struct file_operations pmu_info_proc_fops;
194static const struct file_operations pmu_irqstats_proc_fops;
195static void pmu_pass_intr(unsigned char *data, int len);
196static const struct file_operations pmu_battery_proc_fops;
197static const struct file_operations pmu_options_proc_fops;
198
199#ifdef CONFIG_ADB
200struct adb_driver via_pmu_driver = {
201 "PMU",
202 pmu_probe,
203 pmu_init,
204 pmu_send_request,
205 pmu_adb_autopoll,
206 pmu_poll_adb,
207 pmu_adb_reset_bus
208};
209#endif
210
211extern void low_sleep_handler(void);
212extern void enable_kernel_altivec(void);
213extern void enable_kernel_fp(void);
214
215#ifdef DEBUG_SLEEP
216int pmu_polled_request(struct adb_request *req);
217void pmu_blink(int n);
218#endif
219
220
221
222
223
224
225
226
227static const s8 pmu_data_len[256][2] = {
228
229 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
230 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
231 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
232 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
233 {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
234 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
235 { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
236 { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
237 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
238 { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
239 { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
240 { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
241 { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
242 { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
243 { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
244 { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
245 { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
246 { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
247 { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
248 { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
249 { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
250 { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
251 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
252 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
253 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
254 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
255 { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
256 { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
257 {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
258 { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
259 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
260 {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
261};
262
263static char *pbook_type[] = {
264 "Unknown PowerBook",
265 "PowerBook 2400/3400/3500(G3)",
266 "PowerBook G3 Series",
267 "1999 PowerBook G3",
268 "Core99"
269};
270
271int __init find_via_pmu(void)
272{
273 u64 taddr;
274 const u32 *reg;
275
276 if (via != 0)
277 return 1;
278 vias = of_find_node_by_name(NULL, "via-pmu");
279 if (vias == NULL)
280 return 0;
281
282 reg = of_get_property(vias, "reg", NULL);
283 if (reg == NULL) {
284 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
285 goto fail;
286 }
287 taddr = of_translate_address(vias, reg);
288 if (taddr == OF_BAD_ADDR) {
289 printk(KERN_ERR "via-pmu: Can't translate address !\n");
290 goto fail;
291 }
292
293 spin_lock_init(&pmu_lock);
294
295 pmu_has_adb = 1;
296
297 pmu_intr_mask = PMU_INT_PCEJECT |
298 PMU_INT_SNDBRT |
299 PMU_INT_ADB |
300 PMU_INT_TICK;
301
302 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
303 || of_device_is_compatible(vias->parent, "ohare")))
304 pmu_kind = PMU_OHARE_BASED;
305 else if (of_device_is_compatible(vias->parent, "paddington"))
306 pmu_kind = PMU_PADDINGTON_BASED;
307 else if (of_device_is_compatible(vias->parent, "heathrow"))
308 pmu_kind = PMU_HEATHROW_BASED;
309 else if (of_device_is_compatible(vias->parent, "Keylargo")
310 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
311 struct device_node *gpiop;
312 struct device_node *adbp;
313 u64 gaddr = OF_BAD_ADDR;
314
315 pmu_kind = PMU_KEYLARGO_BASED;
316 adbp = of_find_node_by_type(NULL, "adb");
317 pmu_has_adb = (adbp != NULL);
318 of_node_put(adbp);
319 pmu_intr_mask = PMU_INT_PCEJECT |
320 PMU_INT_SNDBRT |
321 PMU_INT_ADB |
322 PMU_INT_TICK |
323 PMU_INT_ENVIRONMENT;
324
325 gpiop = of_find_node_by_name(NULL, "gpio");
326 if (gpiop) {
327 reg = of_get_property(gpiop, "reg", NULL);
328 if (reg)
329 gaddr = of_translate_address(gpiop, reg);
330 if (gaddr != OF_BAD_ADDR)
331 gpio_reg = ioremap(gaddr, 0x10);
332 }
333 if (gpio_reg == NULL) {
334 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
335 goto fail_gpio;
336 }
337 } else
338 pmu_kind = PMU_UNKNOWN;
339
340 via = ioremap(taddr, 0x2000);
341 if (via == NULL) {
342 printk(KERN_ERR "via-pmu: Can't map address !\n");
343 goto fail;
344 }
345
346 out_8(&via[IER], IER_CLR | 0x7f);
347 out_8(&via[IFR], 0x7f);
348
349 pmu_state = idle;
350
351 if (!init_pmu()) {
352 via = NULL;
353 return 0;
354 }
355
356 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
357 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
358
359 sys_ctrler = SYS_CTRLER_PMU;
360
361 return 1;
362 fail:
363 of_node_put(vias);
364 iounmap(gpio_reg);
365 gpio_reg = NULL;
366 fail_gpio:
367 vias = NULL;
368 return 0;
369}
370
371#ifdef CONFIG_ADB
372static int pmu_probe(void)
373{
374 return vias == NULL? -ENODEV: 0;
375}
376
377static int __init pmu_init(void)
378{
379 if (vias == NULL)
380 return -ENODEV;
381 return 0;
382}
383#endif
384
385
386
387
388
389
390
391
392static int __init via_pmu_start(void)
393{
394 unsigned int irq;
395
396 if (vias == NULL)
397 return -ENODEV;
398
399 batt_req.complete = 1;
400
401 irq = irq_of_parse_and_map(vias, 0);
402 if (irq == NO_IRQ) {
403 printk(KERN_ERR "via-pmu: can't map interrupt\n");
404 return -ENODEV;
405 }
406
407
408
409
410 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
411 "VIA-PMU", (void *)0)) {
412 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
413 return -ENODEV;
414 }
415
416 if (pmu_kind == PMU_KEYLARGO_BASED) {
417 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
418 if (gpio_node == NULL)
419 gpio_node = of_find_node_by_name(NULL,
420 "pmu-interrupt");
421 if (gpio_node)
422 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
423
424 if (gpio_irq != NO_IRQ) {
425 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
426 "GPIO1 ADB", (void *)0))
427 printk(KERN_ERR "pmu: can't get irq %d"
428 " (GPIO1)\n", gpio_irq);
429 else
430 gpio_irq_enabled = 1;
431 }
432 }
433
434
435 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
436
437 pmu_fully_inited = 1;
438
439
440
441
442
443
444
445
446
447 do {
448 pmu_poll();
449 } while (pmu_state != idle);
450
451 return 0;
452}
453
454arch_initcall(via_pmu_start);
455
456
457
458
459static int __init via_pmu_dev_init(void)
460{
461 if (vias == NULL)
462 return -ENODEV;
463
464#ifdef CONFIG_PMAC_BACKLIGHT
465
466 pmu_backlight_init();
467#endif
468
469#ifdef CONFIG_PPC32
470 if (of_machine_is_compatible("AAPL,3400/2400") ||
471 of_machine_is_compatible("AAPL,3500")) {
472 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
473 NULL, PMAC_MB_INFO_MODEL, 0);
474 pmu_battery_count = 1;
475 if (mb == PMAC_TYPE_COMET)
476 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
477 else
478 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
479 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
480 of_machine_is_compatible("PowerBook1,1")) {
481 pmu_battery_count = 2;
482 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
483 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
484 } else {
485 struct device_node* prim =
486 of_find_node_by_name(NULL, "power-mgt");
487 const u32 *prim_info = NULL;
488 if (prim)
489 prim_info = of_get_property(prim, "prim-info", NULL);
490 if (prim_info) {
491
492 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
493 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
494 if (pmu_battery_count > 1)
495 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
496 }
497 of_node_put(prim);
498 }
499#endif
500
501
502 proc_pmu_root = proc_mkdir("pmu", NULL);
503 if (proc_pmu_root) {
504 long i;
505
506 for (i=0; i<pmu_battery_count; i++) {
507 char title[16];
508 sprintf(title, "battery_%ld", i);
509 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
510 &pmu_battery_proc_fops, (void *)i);
511 }
512
513 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
514 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
515 &pmu_irqstats_proc_fops);
516 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
517 &pmu_options_proc_fops);
518 }
519 return 0;
520}
521
522device_initcall(via_pmu_dev_init);
523
524static int
525init_pmu(void)
526{
527 int timeout;
528 struct adb_request req;
529
530 out_8(&via[B], via[B] | TREQ);
531 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK);
532
533 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
534 timeout = 100000;
535 while (!req.complete) {
536 if (--timeout < 0) {
537 printk(KERN_ERR "init_pmu: no response from PMU\n");
538 return 0;
539 }
540 udelay(10);
541 pmu_poll();
542 }
543
544
545 timeout = 100000;
546 interrupt_data[0][0] = 1;
547 while (interrupt_data[0][0] || pmu_state != idle) {
548 if (--timeout < 0) {
549 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
550 return 0;
551 }
552 if (pmu_state == idle)
553 adb_int_pending = 1;
554 via_pmu_interrupt(0, NULL);
555 udelay(10);
556 }
557
558
559 if (pmu_kind == PMU_KEYLARGO_BASED) {
560 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
561 while (!req.complete)
562 pmu_poll();
563 }
564
565
566 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
567 pmu_wait_complete(&req);
568 if (req.reply_len > 0)
569 pmu_version = req.reply[0];
570
571
572 if (pmu_kind == PMU_KEYLARGO_BASED) {
573 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
574 PMU_PWR_GET_POWERUP_EVENTS);
575 pmu_wait_complete(&req);
576 if (req.reply_len == 2) {
577 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
578 option_server_mode = 1;
579 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
580 option_server_mode ? "enabled" : "disabled");
581 }
582 }
583 return 1;
584}
585
586int
587pmu_get_model(void)
588{
589 return pmu_kind;
590}
591
592static void pmu_set_server_mode(int server_mode)
593{
594 struct adb_request req;
595
596 if (pmu_kind != PMU_KEYLARGO_BASED)
597 return;
598
599 option_server_mode = server_mode;
600 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
601 pmu_wait_complete(&req);
602 if (req.reply_len < 2)
603 return;
604 if (server_mode)
605 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
606 PMU_PWR_SET_POWERUP_EVENTS,
607 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
608 else
609 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
610 PMU_PWR_CLR_POWERUP_EVENTS,
611 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
612 pmu_wait_complete(&req);
613}
614
615
616
617
618static void
619done_battery_state_ohare(struct adb_request* req)
620{
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
640 long pcharge, charge, vb, vmax, lmax;
641 long vmax_charging, vmax_charged;
642 long amperage, voltage, time, max;
643 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
644 NULL, PMAC_MB_INFO_MODEL, 0);
645
646 if (req->reply[0] & 0x01)
647 pmu_power_flags |= PMU_PWR_AC_PRESENT;
648 else
649 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
650
651 if (mb == PMAC_TYPE_COMET) {
652 vmax_charged = 189;
653 vmax_charging = 213;
654 lmax = 6500;
655 } else {
656 vmax_charged = 330;
657 vmax_charging = 330;
658 lmax = 6500;
659 }
660 vmax = vmax_charged;
661
662
663 if (req->reply[0] & 0x04) {
664 bat_flags |= PMU_BATT_PRESENT;
665 if (req->reply[0] & 0x02)
666 bat_flags |= PMU_BATT_CHARGING;
667 vb = (req->reply[1] << 8) | req->reply[2];
668 voltage = (vb * 265 + 72665) / 10;
669 amperage = req->reply[5];
670 if ((req->reply[0] & 0x01) == 0) {
671 if (amperage > 200)
672 vb += ((amperage - 200) * 15)/100;
673 } else if (req->reply[0] & 0x02) {
674 vb = (vb * 97) / 100;
675 vmax = vmax_charging;
676 }
677 charge = (100 * vb) / vmax;
678 if (req->reply[0] & 0x40) {
679 pcharge = (req->reply[6] << 8) + req->reply[7];
680 if (pcharge > lmax)
681 pcharge = lmax;
682 pcharge *= 100;
683 pcharge = 100 - pcharge / lmax;
684 if (pcharge < charge)
685 charge = pcharge;
686 }
687 if (amperage > 0)
688 time = (charge * 16440) / amperage;
689 else
690 time = 0;
691 max = 100;
692 amperage = -amperage;
693 } else
694 charge = max = amperage = voltage = time = 0;
695
696 pmu_batteries[pmu_cur_battery].flags = bat_flags;
697 pmu_batteries[pmu_cur_battery].charge = charge;
698 pmu_batteries[pmu_cur_battery].max_charge = max;
699 pmu_batteries[pmu_cur_battery].amperage = amperage;
700 pmu_batteries[pmu_cur_battery].voltage = voltage;
701 pmu_batteries[pmu_cur_battery].time_remaining = time;
702
703 clear_bit(0, &async_req_locks);
704}
705
706static void
707done_battery_state_smart(struct adb_request* req)
708{
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
729 int amperage;
730 unsigned int capa, max, voltage;
731
732 if (req->reply[1] & 0x01)
733 pmu_power_flags |= PMU_PWR_AC_PRESENT;
734 else
735 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
736
737
738 capa = max = amperage = voltage = 0;
739
740 if (req->reply[1] & 0x04) {
741 bat_flags |= PMU_BATT_PRESENT;
742 switch(req->reply[0]) {
743 case 3:
744 case 4: capa = req->reply[2];
745 max = req->reply[3];
746 amperage = *((signed char *)&req->reply[4]);
747 voltage = req->reply[5];
748 break;
749 case 5: capa = (req->reply[2] << 8) | req->reply[3];
750 max = (req->reply[4] << 8) | req->reply[5];
751 amperage = *((signed short *)&req->reply[6]);
752 voltage = (req->reply[8] << 8) | req->reply[9];
753 break;
754 default:
755 pr_warn("pmu.c: unrecognized battery info, "
756 "len: %d, %4ph\n", req->reply_len,
757 req->reply);
758 break;
759 }
760 }
761
762 if ((req->reply[1] & 0x01) && (amperage > 0))
763 bat_flags |= PMU_BATT_CHARGING;
764
765 pmu_batteries[pmu_cur_battery].flags = bat_flags;
766 pmu_batteries[pmu_cur_battery].charge = capa;
767 pmu_batteries[pmu_cur_battery].max_charge = max;
768 pmu_batteries[pmu_cur_battery].amperage = amperage;
769 pmu_batteries[pmu_cur_battery].voltage = voltage;
770 if (amperage) {
771 if ((req->reply[1] & 0x01) && (amperage > 0))
772 pmu_batteries[pmu_cur_battery].time_remaining
773 = ((max-capa) * 3600) / amperage;
774 else
775 pmu_batteries[pmu_cur_battery].time_remaining
776 = (capa * 3600) / (-amperage);
777 } else
778 pmu_batteries[pmu_cur_battery].time_remaining = 0;
779
780 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
781
782 clear_bit(0, &async_req_locks);
783}
784
785static void
786query_battery_state(void)
787{
788 if (test_and_set_bit(0, &async_req_locks))
789 return;
790 if (pmu_kind == PMU_OHARE_BASED)
791 pmu_request(&batt_req, done_battery_state_ohare,
792 1, PMU_BATTERY_STATE);
793 else
794 pmu_request(&batt_req, done_battery_state_smart,
795 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
796}
797
798static int pmu_info_proc_show(struct seq_file *m, void *v)
799{
800 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
801 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
802 seq_printf(m, "AC Power : %d\n",
803 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
804 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
805
806 return 0;
807}
808
809static int pmu_info_proc_open(struct inode *inode, struct file *file)
810{
811 return single_open(file, pmu_info_proc_show, NULL);
812}
813
814static const struct file_operations pmu_info_proc_fops = {
815 .owner = THIS_MODULE,
816 .open = pmu_info_proc_open,
817 .read = seq_read,
818 .llseek = seq_lseek,
819 .release = single_release,
820};
821
822static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
823{
824 int i;
825 static const char *irq_names[] = {
826 "Total CB1 triggered events",
827 "Total GPIO1 triggered events",
828 "PC-Card eject button",
829 "Sound/Brightness button",
830 "ADB message",
831 "Battery state change",
832 "Environment interrupt",
833 "Tick timer",
834 "Ghost interrupt (zero len)",
835 "Empty interrupt (empty mask)",
836 "Max irqs in a row"
837 };
838
839 for (i=0; i<11; i++) {
840 seq_printf(m, " %2u: %10u (%s)\n",
841 i, pmu_irq_stats[i], irq_names[i]);
842 }
843 return 0;
844}
845
846static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
847{
848 return single_open(file, pmu_irqstats_proc_show, NULL);
849}
850
851static const struct file_operations pmu_irqstats_proc_fops = {
852 .owner = THIS_MODULE,
853 .open = pmu_irqstats_proc_open,
854 .read = seq_read,
855 .llseek = seq_lseek,
856 .release = single_release,
857};
858
859static int pmu_battery_proc_show(struct seq_file *m, void *v)
860{
861 long batnum = (long)m->private;
862
863 seq_putc(m, '\n');
864 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
865 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
866 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
867 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
868 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
869 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
870 return 0;
871}
872
873static int pmu_battery_proc_open(struct inode *inode, struct file *file)
874{
875 return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
876}
877
878static const struct file_operations pmu_battery_proc_fops = {
879 .owner = THIS_MODULE,
880 .open = pmu_battery_proc_open,
881 .read = seq_read,
882 .llseek = seq_lseek,
883 .release = single_release,
884};
885
886static int pmu_options_proc_show(struct seq_file *m, void *v)
887{
888#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
889 if (pmu_kind == PMU_KEYLARGO_BASED &&
890 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
891 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
892#endif
893 if (pmu_kind == PMU_KEYLARGO_BASED)
894 seq_printf(m, "server_mode=%d\n", option_server_mode);
895
896 return 0;
897}
898
899static int pmu_options_proc_open(struct inode *inode, struct file *file)
900{
901 return single_open(file, pmu_options_proc_show, NULL);
902}
903
904static ssize_t pmu_options_proc_write(struct file *file,
905 const char __user *buffer, size_t count, loff_t *pos)
906{
907 char tmp[33];
908 char *label, *val;
909 size_t fcount = count;
910
911 if (!count)
912 return -EINVAL;
913 if (count > 32)
914 count = 32;
915 if (copy_from_user(tmp, buffer, count))
916 return -EFAULT;
917 tmp[count] = 0;
918
919 label = tmp;
920 while(*label == ' ')
921 label++;
922 val = label;
923 while(*val && (*val != '=')) {
924 if (*val == ' ')
925 *val = 0;
926 val++;
927 }
928 if ((*val) == 0)
929 return -EINVAL;
930 *(val++) = 0;
931 while(*val == ' ')
932 val++;
933#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
934 if (pmu_kind == PMU_KEYLARGO_BASED &&
935 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
936 if (!strcmp(label, "lid_wakeup"))
937 option_lid_wakeup = ((*val) == '1');
938#endif
939 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
940 int new_value;
941 new_value = ((*val) == '1');
942 if (new_value != option_server_mode)
943 pmu_set_server_mode(new_value);
944 }
945 return fcount;
946}
947
948static const struct file_operations pmu_options_proc_fops = {
949 .owner = THIS_MODULE,
950 .open = pmu_options_proc_open,
951 .read = seq_read,
952 .llseek = seq_lseek,
953 .release = single_release,
954 .write = pmu_options_proc_write,
955};
956
957#ifdef CONFIG_ADB
958
959static int pmu_send_request(struct adb_request *req, int sync)
960{
961 int i, ret;
962
963 if ((vias == NULL) || (!pmu_fully_inited)) {
964 req->complete = 1;
965 return -ENXIO;
966 }
967
968 ret = -EINVAL;
969
970 switch (req->data[0]) {
971 case PMU_PACKET:
972 for (i = 0; i < req->nbytes - 1; ++i)
973 req->data[i] = req->data[i+1];
974 --req->nbytes;
975 if (pmu_data_len[req->data[0]][1] != 0) {
976 req->reply[0] = ADB_RET_OK;
977 req->reply_len = 1;
978 } else
979 req->reply_len = 0;
980 ret = pmu_queue_request(req);
981 break;
982 case CUDA_PACKET:
983 switch (req->data[1]) {
984 case CUDA_GET_TIME:
985 if (req->nbytes != 2)
986 break;
987 req->data[0] = PMU_READ_RTC;
988 req->nbytes = 1;
989 req->reply_len = 3;
990 req->reply[0] = CUDA_PACKET;
991 req->reply[1] = 0;
992 req->reply[2] = CUDA_GET_TIME;
993 ret = pmu_queue_request(req);
994 break;
995 case CUDA_SET_TIME:
996 if (req->nbytes != 6)
997 break;
998 req->data[0] = PMU_SET_RTC;
999 req->nbytes = 5;
1000 for (i = 1; i <= 4; ++i)
1001 req->data[i] = req->data[i+1];
1002 req->reply_len = 3;
1003 req->reply[0] = CUDA_PACKET;
1004 req->reply[1] = 0;
1005 req->reply[2] = CUDA_SET_TIME;
1006 ret = pmu_queue_request(req);
1007 break;
1008 }
1009 break;
1010 case ADB_PACKET:
1011 if (!pmu_has_adb)
1012 return -ENXIO;
1013 for (i = req->nbytes - 1; i > 1; --i)
1014 req->data[i+2] = req->data[i];
1015 req->data[3] = req->nbytes - 2;
1016 req->data[2] = pmu_adb_flags;
1017
1018 req->data[0] = PMU_ADB_CMD;
1019 req->nbytes += 2;
1020 req->reply_expected = 1;
1021 req->reply_len = 0;
1022 ret = pmu_queue_request(req);
1023 break;
1024 }
1025 if (ret) {
1026 req->complete = 1;
1027 return ret;
1028 }
1029
1030 if (sync)
1031 while (!req->complete)
1032 pmu_poll();
1033
1034 return 0;
1035}
1036
1037
1038static int __pmu_adb_autopoll(int devs)
1039{
1040 struct adb_request req;
1041
1042 if (devs) {
1043 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1044 adb_dev_map >> 8, adb_dev_map);
1045 pmu_adb_flags = 2;
1046 } else {
1047 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1048 pmu_adb_flags = 0;
1049 }
1050 while (!req.complete)
1051 pmu_poll();
1052 return 0;
1053}
1054
1055static int pmu_adb_autopoll(int devs)
1056{
1057 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1058 return -ENXIO;
1059
1060 adb_dev_map = devs;
1061 return __pmu_adb_autopoll(devs);
1062}
1063
1064
1065static int pmu_adb_reset_bus(void)
1066{
1067 struct adb_request req;
1068 int save_autopoll = adb_dev_map;
1069
1070 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1071 return -ENXIO;
1072
1073
1074 __pmu_adb_autopoll(0);
1075
1076 req.nbytes = 4;
1077 req.done = NULL;
1078 req.data[0] = PMU_ADB_CMD;
1079 req.data[1] = ADB_BUSRESET;
1080 req.data[2] = 0;
1081 req.data[3] = 0;
1082 req.data[4] = 0;
1083 req.reply_len = 0;
1084 req.reply_expected = 1;
1085 if (pmu_queue_request(&req) != 0) {
1086 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1087 return -EIO;
1088 }
1089 pmu_wait_complete(&req);
1090
1091 if (save_autopoll != 0)
1092 __pmu_adb_autopoll(save_autopoll);
1093
1094 return 0;
1095}
1096#endif
1097
1098
1099int
1100pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1101 int nbytes, ...)
1102{
1103 va_list list;
1104 int i;
1105
1106 if (vias == NULL)
1107 return -ENXIO;
1108
1109 if (nbytes < 0 || nbytes > 32) {
1110 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1111 req->complete = 1;
1112 return -EINVAL;
1113 }
1114 req->nbytes = nbytes;
1115 req->done = done;
1116 va_start(list, nbytes);
1117 for (i = 0; i < nbytes; ++i)
1118 req->data[i] = va_arg(list, int);
1119 va_end(list);
1120 req->reply_len = 0;
1121 req->reply_expected = 0;
1122 return pmu_queue_request(req);
1123}
1124
1125int
1126pmu_queue_request(struct adb_request *req)
1127{
1128 unsigned long flags;
1129 int nsend;
1130
1131 if (via == NULL) {
1132 req->complete = 1;
1133 return -ENXIO;
1134 }
1135 if (req->nbytes <= 0) {
1136 req->complete = 1;
1137 return 0;
1138 }
1139 nsend = pmu_data_len[req->data[0]][0];
1140 if (nsend >= 0 && req->nbytes != nsend + 1) {
1141 req->complete = 1;
1142 return -EINVAL;
1143 }
1144
1145 req->next = NULL;
1146 req->sent = 0;
1147 req->complete = 0;
1148
1149 spin_lock_irqsave(&pmu_lock, flags);
1150 if (current_req != 0) {
1151 last_req->next = req;
1152 last_req = req;
1153 } else {
1154 current_req = req;
1155 last_req = req;
1156 if (pmu_state == idle)
1157 pmu_start();
1158 }
1159 spin_unlock_irqrestore(&pmu_lock, flags);
1160
1161 return 0;
1162}
1163
1164static inline void
1165wait_for_ack(void)
1166{
1167
1168
1169
1170 int timeout = 4000;
1171 while ((in_8(&via[B]) & TACK) == 0) {
1172 if (--timeout < 0) {
1173 printk(KERN_ERR "PMU not responding (!ack)\n");
1174 return;
1175 }
1176 udelay(10);
1177 }
1178}
1179
1180
1181
1182static inline void
1183send_byte(int x)
1184{
1185 volatile unsigned char __iomem *v = via;
1186
1187 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1188 out_8(&v[SR], x);
1189 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1190 (void)in_8(&v[B]);
1191}
1192
1193static inline void
1194recv_byte(void)
1195{
1196 volatile unsigned char __iomem *v = via;
1197
1198 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1199 in_8(&v[SR]);
1200 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1201 (void)in_8(&v[B]);
1202}
1203
1204static inline void
1205pmu_done(struct adb_request *req)
1206{
1207 void (*done)(struct adb_request *) = req->done;
1208 mb();
1209 req->complete = 1;
1210
1211
1212
1213 if (done)
1214 (*done)(req);
1215}
1216
1217static void
1218pmu_start(void)
1219{
1220 struct adb_request *req;
1221
1222
1223
1224 req = current_req;
1225 if (req == 0 || pmu_state != idle
1226 || (req_awaiting_reply))
1227 return;
1228
1229 pmu_state = sending;
1230 data_index = 1;
1231 data_len = pmu_data_len[req->data[0]][0];
1232
1233
1234
1235
1236 wait_for_ack();
1237
1238 send_byte(req->data[0]);
1239}
1240
1241void
1242pmu_poll(void)
1243{
1244 if (!via)
1245 return;
1246 if (disable_poll)
1247 return;
1248 via_pmu_interrupt(0, NULL);
1249}
1250
1251void
1252pmu_poll_adb(void)
1253{
1254 if (!via)
1255 return;
1256 if (disable_poll)
1257 return;
1258
1259 adb_int_pending = 1;
1260 do {
1261 via_pmu_interrupt(0, NULL);
1262 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1263 || req_awaiting_reply));
1264}
1265
1266void
1267pmu_wait_complete(struct adb_request *req)
1268{
1269 if (!via)
1270 return;
1271 while((pmu_state != idle && pmu_state != locked) || !req->complete)
1272 via_pmu_interrupt(0, NULL);
1273}
1274
1275
1276
1277
1278
1279
1280void
1281pmu_suspend(void)
1282{
1283 unsigned long flags;
1284
1285 if (!via)
1286 return;
1287
1288 spin_lock_irqsave(&pmu_lock, flags);
1289 pmu_suspended++;
1290 if (pmu_suspended > 1) {
1291 spin_unlock_irqrestore(&pmu_lock, flags);
1292 return;
1293 }
1294
1295 do {
1296 spin_unlock_irqrestore(&pmu_lock, flags);
1297 if (req_awaiting_reply)
1298 adb_int_pending = 1;
1299 via_pmu_interrupt(0, NULL);
1300 spin_lock_irqsave(&pmu_lock, flags);
1301 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1302 if (gpio_irq >= 0)
1303 disable_irq_nosync(gpio_irq);
1304 out_8(&via[IER], CB1_INT | IER_CLR);
1305 spin_unlock_irqrestore(&pmu_lock, flags);
1306 break;
1307 }
1308 } while (1);
1309}
1310
1311void
1312pmu_resume(void)
1313{
1314 unsigned long flags;
1315
1316 if (!via || (pmu_suspended < 1))
1317 return;
1318
1319 spin_lock_irqsave(&pmu_lock, flags);
1320 pmu_suspended--;
1321 if (pmu_suspended > 0) {
1322 spin_unlock_irqrestore(&pmu_lock, flags);
1323 return;
1324 }
1325 adb_int_pending = 1;
1326 if (gpio_irq >= 0)
1327 enable_irq(gpio_irq);
1328 out_8(&via[IER], CB1_INT | IER_SET);
1329 spin_unlock_irqrestore(&pmu_lock, flags);
1330 pmu_poll();
1331}
1332
1333
1334static void
1335pmu_handle_data(unsigned char *data, int len)
1336{
1337 unsigned char ints, pirq;
1338 int i = 0;
1339
1340 asleep = 0;
1341 if (drop_interrupts || len < 1) {
1342 adb_int_pending = 0;
1343 pmu_irq_stats[8]++;
1344 return;
1345 }
1346
1347
1348 ints = data[0];
1349
1350
1351 if (ints == 0)
1352 pmu_irq_stats[9]++;
1353
1354
1355 if (ints & PMU_INT_ADB)
1356 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1357
1358next:
1359
1360 if (ints == 0) {
1361 if (i > pmu_irq_stats[10])
1362 pmu_irq_stats[10] = i;
1363 return;
1364 }
1365
1366 for (pirq = 0; pirq < 8; pirq++)
1367 if (ints & (1 << pirq))
1368 break;
1369 pmu_irq_stats[pirq]++;
1370 i++;
1371 ints &= ~(1 << pirq);
1372
1373
1374
1375
1376
1377 if ((1 << pirq) & PMU_INT_ADB) {
1378 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1379 struct adb_request *req = req_awaiting_reply;
1380 if (req == 0) {
1381 printk(KERN_ERR "PMU: extra ADB reply\n");
1382 return;
1383 }
1384 req_awaiting_reply = NULL;
1385 if (len <= 2)
1386 req->reply_len = 0;
1387 else {
1388 memcpy(req->reply, data + 1, len - 1);
1389 req->reply_len = len - 1;
1390 }
1391 pmu_done(req);
1392 } else {
1393 if (len == 4 && data[1] == 0x2c) {
1394 extern int xmon_wants_key, xmon_adb_keycode;
1395 if (xmon_wants_key) {
1396 xmon_adb_keycode = data[2];
1397 return;
1398 }
1399 }
1400#ifdef CONFIG_ADB
1401
1402
1403
1404
1405
1406
1407 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1408 && data[1] == 0x2c && data[3] == 0xff
1409 && (data[2] & ~1) == 0xf4))
1410 adb_input(data+1, len-1, 1);
1411#endif
1412 }
1413 }
1414
1415 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1416#ifdef CONFIG_PMAC_BACKLIGHT
1417 if (len == 3)
1418 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1419#endif
1420 }
1421
1422 else if ((1 << pirq) & PMU_INT_TICK) {
1423
1424 if (pmu_battery_count) {
1425 if ((--query_batt_timer) == 0) {
1426 query_battery_state();
1427 query_batt_timer = BATTERY_POLLING_COUNT;
1428 }
1429 }
1430 }
1431 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1432 if (pmu_battery_count)
1433 query_battery_state();
1434 pmu_pass_intr(data, len);
1435
1436
1437 if (len == 6) {
1438 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1439 via_pmu_event(PMU_EVT_LID, data[1]&1);
1440 }
1441 } else {
1442 pmu_pass_intr(data, len);
1443 }
1444 goto next;
1445}
1446
1447static struct adb_request*
1448pmu_sr_intr(void)
1449{
1450 struct adb_request *req;
1451 int bite = 0;
1452
1453 if (via[B] & TREQ) {
1454 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1455 out_8(&via[IFR], SR_INT);
1456 return NULL;
1457 }
1458
1459 while ((in_8(&via[B]) & TACK) != 0)
1460 ;
1461
1462
1463 if (pmu_state == reading || pmu_state == reading_intr)
1464 bite = in_8(&via[SR]);
1465
1466
1467 out_8(&via[B], in_8(&via[B]) | TREQ);
1468 wait_for_ack();
1469
1470 switch (pmu_state) {
1471 case sending:
1472 req = current_req;
1473 if (data_len < 0) {
1474 data_len = req->nbytes - 1;
1475 send_byte(data_len);
1476 break;
1477 }
1478 if (data_index <= data_len) {
1479 send_byte(req->data[data_index++]);
1480 break;
1481 }
1482 req->sent = 1;
1483 data_len = pmu_data_len[req->data[0]][1];
1484 if (data_len == 0) {
1485 pmu_state = idle;
1486 current_req = req->next;
1487 if (req->reply_expected)
1488 req_awaiting_reply = req;
1489 else
1490 return req;
1491 } else {
1492 pmu_state = reading;
1493 data_index = 0;
1494 reply_ptr = req->reply + req->reply_len;
1495 recv_byte();
1496 }
1497 break;
1498
1499 case intack:
1500 data_index = 0;
1501 data_len = -1;
1502 pmu_state = reading_intr;
1503 reply_ptr = interrupt_data[int_data_last];
1504 recv_byte();
1505 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1506 enable_irq(gpio_irq);
1507 gpio_irq_enabled = 1;
1508 }
1509 break;
1510
1511 case reading:
1512 case reading_intr:
1513 if (data_len == -1) {
1514 data_len = bite;
1515 if (bite > 32)
1516 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1517 } else if (data_index < 32) {
1518 reply_ptr[data_index++] = bite;
1519 }
1520 if (data_index < data_len) {
1521 recv_byte();
1522 break;
1523 }
1524
1525 if (pmu_state == reading_intr) {
1526 pmu_state = idle;
1527 int_data_state[int_data_last] = int_data_ready;
1528 interrupt_data_len[int_data_last] = data_len;
1529 } else {
1530 req = current_req;
1531
1532
1533
1534
1535
1536 current_req = req->next;
1537 req->reply_len += data_index;
1538 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1539 pmu_state = locked;
1540 else
1541 pmu_state = idle;
1542 return req;
1543 }
1544 break;
1545
1546 default:
1547 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1548 pmu_state);
1549 }
1550 return NULL;
1551}
1552
1553static irqreturn_t
1554via_pmu_interrupt(int irq, void *arg)
1555{
1556 unsigned long flags;
1557 int intr;
1558 int nloop = 0;
1559 int int_data = -1;
1560 struct adb_request *req = NULL;
1561 int handled = 0;
1562
1563
1564 spin_lock_irqsave(&pmu_lock, flags);
1565 ++disable_poll;
1566
1567 for (;;) {
1568 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1569 if (intr == 0)
1570 break;
1571 handled = 1;
1572 if (++nloop > 1000) {
1573 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1574 "intr=%x, ier=%x pmu_state=%d\n",
1575 intr, in_8(&via[IER]), pmu_state);
1576 break;
1577 }
1578 out_8(&via[IFR], intr);
1579 if (intr & CB1_INT) {
1580 adb_int_pending = 1;
1581 pmu_irq_stats[0]++;
1582 }
1583 if (intr & SR_INT) {
1584 req = pmu_sr_intr();
1585 if (req)
1586 break;
1587 }
1588 }
1589
1590recheck:
1591 if (pmu_state == idle) {
1592 if (adb_int_pending) {
1593 if (int_data_state[0] == int_data_empty)
1594 int_data_last = 0;
1595 else if (int_data_state[1] == int_data_empty)
1596 int_data_last = 1;
1597 else
1598 goto no_free_slot;
1599 pmu_state = intack;
1600 int_data_state[int_data_last] = int_data_fill;
1601
1602
1603
1604 wait_for_ack();
1605 send_byte(PMU_INT_ACK);
1606 adb_int_pending = 0;
1607 } else if (current_req)
1608 pmu_start();
1609 }
1610no_free_slot:
1611
1612 if (int_data_state[!int_data_last] == int_data_ready) {
1613 int_data_state[!int_data_last] = int_data_flush;
1614 int_data = !int_data_last;
1615 } else if (int_data_state[int_data_last] == int_data_ready) {
1616 int_data_state[int_data_last] = int_data_flush;
1617 int_data = int_data_last;
1618 }
1619 --disable_poll;
1620 spin_unlock_irqrestore(&pmu_lock, flags);
1621
1622
1623 if (req) {
1624 pmu_done(req);
1625 req = NULL;
1626 }
1627
1628
1629 if (int_data >= 0) {
1630 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1631 spin_lock_irqsave(&pmu_lock, flags);
1632 ++disable_poll;
1633 int_data_state[int_data] = int_data_empty;
1634 int_data = -1;
1635 goto recheck;
1636 }
1637
1638 return IRQ_RETVAL(handled);
1639}
1640
1641void
1642pmu_unlock(void)
1643{
1644 unsigned long flags;
1645
1646 spin_lock_irqsave(&pmu_lock, flags);
1647 if (pmu_state == locked)
1648 pmu_state = idle;
1649 adb_int_pending = 1;
1650 spin_unlock_irqrestore(&pmu_lock, flags);
1651}
1652
1653
1654static irqreturn_t
1655gpio1_interrupt(int irq, void *arg)
1656{
1657 unsigned long flags;
1658
1659 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1660 spin_lock_irqsave(&pmu_lock, flags);
1661 if (gpio_irq_enabled > 0) {
1662 disable_irq_nosync(gpio_irq);
1663 gpio_irq_enabled = 0;
1664 }
1665 pmu_irq_stats[1]++;
1666 adb_int_pending = 1;
1667 spin_unlock_irqrestore(&pmu_lock, flags);
1668 via_pmu_interrupt(0, NULL);
1669 return IRQ_HANDLED;
1670 }
1671 return IRQ_NONE;
1672}
1673
1674void
1675pmu_enable_irled(int on)
1676{
1677 struct adb_request req;
1678
1679 if (vias == NULL)
1680 return ;
1681 if (pmu_kind == PMU_KEYLARGO_BASED)
1682 return ;
1683
1684 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1685 (on ? PMU_POW_ON : PMU_POW_OFF));
1686 pmu_wait_complete(&req);
1687}
1688
1689void
1690pmu_restart(void)
1691{
1692 struct adb_request req;
1693
1694 if (via == NULL)
1695 return;
1696
1697 local_irq_disable();
1698
1699 drop_interrupts = 1;
1700
1701 if (pmu_kind != PMU_KEYLARGO_BASED) {
1702 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1703 PMU_INT_TICK );
1704 while(!req.complete)
1705 pmu_poll();
1706 }
1707
1708 pmu_request(&req, NULL, 1, PMU_RESET);
1709 pmu_wait_complete(&req);
1710 for (;;)
1711 ;
1712}
1713
1714void
1715pmu_shutdown(void)
1716{
1717 struct adb_request req;
1718
1719 if (via == NULL)
1720 return;
1721
1722 local_irq_disable();
1723
1724 drop_interrupts = 1;
1725
1726 if (pmu_kind != PMU_KEYLARGO_BASED) {
1727 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1728 PMU_INT_TICK );
1729 pmu_wait_complete(&req);
1730 } else {
1731
1732
1733
1734 pmu_set_server_mode(0);
1735 }
1736
1737 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1738 'M', 'A', 'T', 'T');
1739 pmu_wait_complete(&req);
1740 for (;;)
1741 ;
1742}
1743
1744int
1745pmu_present(void)
1746{
1747 return via != 0;
1748}
1749
1750#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1751
1752
1753
1754
1755static u32 save_via[8];
1756
1757static void
1758save_via_state(void)
1759{
1760 save_via[0] = in_8(&via[ANH]);
1761 save_via[1] = in_8(&via[DIRA]);
1762 save_via[2] = in_8(&via[B]);
1763 save_via[3] = in_8(&via[DIRB]);
1764 save_via[4] = in_8(&via[PCR]);
1765 save_via[5] = in_8(&via[ACR]);
1766 save_via[6] = in_8(&via[T1CL]);
1767 save_via[7] = in_8(&via[T1CH]);
1768}
1769static void
1770restore_via_state(void)
1771{
1772 out_8(&via[ANH], save_via[0]);
1773 out_8(&via[DIRA], save_via[1]);
1774 out_8(&via[B], save_via[2]);
1775 out_8(&via[DIRB], save_via[3]);
1776 out_8(&via[PCR], save_via[4]);
1777 out_8(&via[ACR], save_via[5]);
1778 out_8(&via[T1CL], save_via[6]);
1779 out_8(&via[T1CH], save_via[7]);
1780 out_8(&via[IER], IER_CLR | 0x7f);
1781 out_8(&via[IFR], 0x7f);
1782 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1783}
1784
1785#define GRACKLE_PM (1<<7)
1786#define GRACKLE_DOZE (1<<5)
1787#define GRACKLE_NAP (1<<4)
1788#define GRACKLE_SLEEP (1<<3)
1789
1790static int powerbook_sleep_grackle(void)
1791{
1792 unsigned long save_l2cr;
1793 unsigned short pmcr1;
1794 struct adb_request req;
1795 struct pci_dev *grackle;
1796
1797 grackle = pci_get_bus_and_slot(0, 0);
1798 if (!grackle)
1799 return -ENODEV;
1800
1801
1802 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1803 pmu_wait_complete(&req);
1804 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1805 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1806 pmu_wait_complete(&req);
1807
1808
1809 save_l2cr = _get_L2CR();
1810
1811 if (!__fake_sleep) {
1812
1813 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1814 pmu_wait_complete(&req);
1815 }
1816
1817
1818 save_via_state();
1819
1820 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1821
1822 pci_read_config_word(grackle, 0x70, &pmcr1);
1823
1824 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1825 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1826 pci_write_config_word(grackle, 0x70, pmcr1);
1827
1828
1829 if (__fake_sleep)
1830 mdelay(5000);
1831 else
1832 low_sleep_handler();
1833
1834
1835 pci_read_config_word(grackle, 0x70, &pmcr1);
1836 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1837 pci_write_config_word(grackle, 0x70, pmcr1);
1838
1839 pci_dev_put(grackle);
1840
1841
1842 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1843 restore_via_state();
1844
1845
1846 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1847 _set_L2CR(save_l2cr);
1848
1849
1850 switch_mmu_context(NULL, current->active_mm);
1851
1852
1853 pmu_unlock();
1854 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1855 pmu_wait_complete(&req);
1856 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1857 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1858 pmu_wait_complete(&req);
1859 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1860 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1861 pmu_wait_complete(&req);
1862
1863 return 0;
1864}
1865
1866static int
1867powerbook_sleep_Core99(void)
1868{
1869 unsigned long save_l2cr;
1870 unsigned long save_l3cr;
1871 struct adb_request req;
1872
1873 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1874 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1875 return -ENOSYS;
1876 }
1877
1878 if (num_online_cpus() > 1 || cpu_is_offline(0))
1879 return -EAGAIN;
1880
1881
1882 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1883 pmu_wait_complete(&req);
1884
1885
1886 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1887 0xff, 0xff);
1888 pmu_wait_complete(&req);
1889 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1890 0, PMU_PWR_WAKEUP_KEY |
1891 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1892 pmu_wait_complete(&req);
1893
1894
1895 save_l3cr = _get_L3CR();
1896 save_l2cr = _get_L2CR();
1897
1898 if (!__fake_sleep) {
1899
1900 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1901 pmu_wait_complete(&req);
1902 }
1903
1904
1905 save_via_state();
1906
1907
1908
1909
1910
1911 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1912
1913
1914 if (__fake_sleep)
1915 mdelay(5000);
1916 else
1917 low_sleep_handler();
1918
1919
1920 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1921
1922
1923 restore_via_state();
1924
1925
1926 loops_per_jiffy *= 2;
1927
1928
1929 pmac_call_early_video_resume();
1930
1931
1932 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1933 _set_L2CR(save_l2cr);
1934
1935 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1936 _set_L3CR(save_l3cr);
1937
1938
1939 switch_mmu_context(NULL, current->active_mm);
1940
1941
1942 pmu_unlock();
1943 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1944 pmu_wait_complete(&req);
1945 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1946 pmu_wait_complete(&req);
1947
1948
1949 loops_per_jiffy /= 2;
1950
1951 return 0;
1952}
1953
1954#define PB3400_MEM_CTRL 0xf8000000
1955#define PB3400_MEM_CTRL_SLEEP 0x70
1956
1957static void __iomem *pb3400_mem_ctrl;
1958
1959static void powerbook_sleep_init_3400(void)
1960{
1961
1962 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1963 if (pb3400_mem_ctrl == NULL)
1964 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1965}
1966
1967static int powerbook_sleep_3400(void)
1968{
1969 int i, x;
1970 unsigned int hid0;
1971 unsigned long msr;
1972 struct adb_request sleep_req;
1973 unsigned int __iomem *mem_ctrl_sleep;
1974
1975 if (pb3400_mem_ctrl == NULL)
1976 return -ENOMEM;
1977 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1978
1979
1980
1981 for (i = 0x403f; i >= 0x4000; --i) {
1982 out_be32(mem_ctrl_sleep, i);
1983 do {
1984 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1985 } while (x == 0);
1986 if (x >= 0x100)
1987 break;
1988 }
1989
1990
1991 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1992 pmu_wait_complete(&sleep_req);
1993 pmu_unlock();
1994
1995 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1996
1997 asleep = 1;
1998
1999
2000 hid0 = mfspr(SPRN_HID0);
2001 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
2002 mtspr(SPRN_HID0, hid0);
2003 local_irq_enable();
2004 msr = mfmsr() | MSR_POW;
2005 while (asleep) {
2006 mb();
2007 mtmsr(msr);
2008 isync();
2009 }
2010 local_irq_disable();
2011
2012
2013 out_be32(mem_ctrl_sleep, 0x3f);
2014 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2015
2016 return 0;
2017}
2018
2019#endif
2020
2021
2022
2023
2024#define RB_SIZE 0x10
2025struct pmu_private {
2026 struct list_head list;
2027 int rb_get;
2028 int rb_put;
2029 struct rb_entry {
2030 unsigned short len;
2031 unsigned char data[16];
2032 } rb_buf[RB_SIZE];
2033 wait_queue_head_t wait;
2034 spinlock_t lock;
2035#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2036 int backlight_locker;
2037#endif
2038};
2039
2040static LIST_HEAD(all_pmu_pvt);
2041static DEFINE_SPINLOCK(all_pvt_lock);
2042
2043static void
2044pmu_pass_intr(unsigned char *data, int len)
2045{
2046 struct pmu_private *pp;
2047 struct list_head *list;
2048 int i;
2049 unsigned long flags;
2050
2051 if (len > sizeof(pp->rb_buf[0].data))
2052 len = sizeof(pp->rb_buf[0].data);
2053 spin_lock_irqsave(&all_pvt_lock, flags);
2054 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2055 pp = list_entry(list, struct pmu_private, list);
2056 spin_lock(&pp->lock);
2057 i = pp->rb_put + 1;
2058 if (i >= RB_SIZE)
2059 i = 0;
2060 if (i != pp->rb_get) {
2061 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2062 rp->len = len;
2063 memcpy(rp->data, data, len);
2064 pp->rb_put = i;
2065 wake_up_interruptible(&pp->wait);
2066 }
2067 spin_unlock(&pp->lock);
2068 }
2069 spin_unlock_irqrestore(&all_pvt_lock, flags);
2070}
2071
2072static int
2073pmu_open(struct inode *inode, struct file *file)
2074{
2075 struct pmu_private *pp;
2076 unsigned long flags;
2077
2078 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2079 if (pp == 0)
2080 return -ENOMEM;
2081 pp->rb_get = pp->rb_put = 0;
2082 spin_lock_init(&pp->lock);
2083 init_waitqueue_head(&pp->wait);
2084 mutex_lock(&pmu_info_proc_mutex);
2085 spin_lock_irqsave(&all_pvt_lock, flags);
2086#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2087 pp->backlight_locker = 0;
2088#endif
2089 list_add(&pp->list, &all_pmu_pvt);
2090 spin_unlock_irqrestore(&all_pvt_lock, flags);
2091 file->private_data = pp;
2092 mutex_unlock(&pmu_info_proc_mutex);
2093 return 0;
2094}
2095
2096static ssize_t
2097pmu_read(struct file *file, char __user *buf,
2098 size_t count, loff_t *ppos)
2099{
2100 struct pmu_private *pp = file->private_data;
2101 DECLARE_WAITQUEUE(wait, current);
2102 unsigned long flags;
2103 int ret = 0;
2104
2105 if (count < 1 || pp == 0)
2106 return -EINVAL;
2107 if (!access_ok(VERIFY_WRITE, buf, count))
2108 return -EFAULT;
2109
2110 spin_lock_irqsave(&pp->lock, flags);
2111 add_wait_queue(&pp->wait, &wait);
2112 current->state = TASK_INTERRUPTIBLE;
2113
2114 for (;;) {
2115 ret = -EAGAIN;
2116 if (pp->rb_get != pp->rb_put) {
2117 int i = pp->rb_get;
2118 struct rb_entry *rp = &pp->rb_buf[i];
2119 ret = rp->len;
2120 spin_unlock_irqrestore(&pp->lock, flags);
2121 if (ret > count)
2122 ret = count;
2123 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2124 ret = -EFAULT;
2125 if (++i >= RB_SIZE)
2126 i = 0;
2127 spin_lock_irqsave(&pp->lock, flags);
2128 pp->rb_get = i;
2129 }
2130 if (ret >= 0)
2131 break;
2132 if (file->f_flags & O_NONBLOCK)
2133 break;
2134 ret = -ERESTARTSYS;
2135 if (signal_pending(current))
2136 break;
2137 spin_unlock_irqrestore(&pp->lock, flags);
2138 schedule();
2139 spin_lock_irqsave(&pp->lock, flags);
2140 }
2141 current->state = TASK_RUNNING;
2142 remove_wait_queue(&pp->wait, &wait);
2143 spin_unlock_irqrestore(&pp->lock, flags);
2144
2145 return ret;
2146}
2147
2148static ssize_t
2149pmu_write(struct file *file, const char __user *buf,
2150 size_t count, loff_t *ppos)
2151{
2152 return 0;
2153}
2154
2155static unsigned int
2156pmu_fpoll(struct file *filp, poll_table *wait)
2157{
2158 struct pmu_private *pp = filp->private_data;
2159 unsigned int mask = 0;
2160 unsigned long flags;
2161
2162 if (pp == 0)
2163 return 0;
2164 poll_wait(filp, &pp->wait, wait);
2165 spin_lock_irqsave(&pp->lock, flags);
2166 if (pp->rb_get != pp->rb_put)
2167 mask |= POLLIN;
2168 spin_unlock_irqrestore(&pp->lock, flags);
2169 return mask;
2170}
2171
2172static int
2173pmu_release(struct inode *inode, struct file *file)
2174{
2175 struct pmu_private *pp = file->private_data;
2176 unsigned long flags;
2177
2178 if (pp != 0) {
2179 file->private_data = NULL;
2180 spin_lock_irqsave(&all_pvt_lock, flags);
2181 list_del(&pp->list);
2182 spin_unlock_irqrestore(&all_pvt_lock, flags);
2183
2184#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2185 if (pp->backlight_locker)
2186 pmac_backlight_enable();
2187#endif
2188
2189 kfree(pp);
2190 }
2191 return 0;
2192}
2193
2194#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2195static void pmac_suspend_disable_irqs(void)
2196{
2197
2198 pmac_pfunc_i2c_suspend();
2199 pmac_pfunc_base_suspend();
2200}
2201
2202static int powerbook_sleep(suspend_state_t state)
2203{
2204 int error = 0;
2205
2206
2207 while (!batt_req.complete)
2208 pmu_poll();
2209
2210
2211
2212
2213 enable_kernel_fp();
2214
2215#ifdef CONFIG_ALTIVEC
2216 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2217 enable_kernel_altivec();
2218#endif
2219
2220 switch (pmu_kind) {
2221 case PMU_OHARE_BASED:
2222 error = powerbook_sleep_3400();
2223 break;
2224 case PMU_HEATHROW_BASED:
2225 case PMU_PADDINGTON_BASED:
2226 error = powerbook_sleep_grackle();
2227 break;
2228 case PMU_KEYLARGO_BASED:
2229 error = powerbook_sleep_Core99();
2230 break;
2231 default:
2232 return -ENOSYS;
2233 }
2234
2235 if (error)
2236 return error;
2237
2238 mdelay(100);
2239
2240 return 0;
2241}
2242
2243static void pmac_suspend_enable_irqs(void)
2244{
2245
2246 adb_int_pending = 1;
2247 via_pmu_interrupt(0, NULL);
2248
2249 mdelay(10);
2250
2251
2252 pmac_pfunc_base_resume();
2253 pmac_pfunc_i2c_resume();
2254}
2255
2256static int pmu_sleep_valid(suspend_state_t state)
2257{
2258 return state == PM_SUSPEND_MEM
2259 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2260}
2261
2262static const struct platform_suspend_ops pmu_pm_ops = {
2263 .enter = powerbook_sleep,
2264 .valid = pmu_sleep_valid,
2265};
2266
2267static int register_pmu_pm_ops(void)
2268{
2269 if (pmu_kind == PMU_OHARE_BASED)
2270 powerbook_sleep_init_3400();
2271 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2272 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
2273 suspend_set_ops(&pmu_pm_ops);
2274
2275 return 0;
2276}
2277
2278device_initcall(register_pmu_pm_ops);
2279#endif
2280
2281static int pmu_ioctl(struct file *filp,
2282 u_int cmd, u_long arg)
2283{
2284 __u32 __user *argp = (__u32 __user *)arg;
2285 int error = -EINVAL;
2286
2287 switch (cmd) {
2288 case PMU_IOC_SLEEP:
2289 if (!capable(CAP_SYS_ADMIN))
2290 return -EACCES;
2291 return pm_suspend(PM_SUSPEND_MEM);
2292 case PMU_IOC_CAN_SLEEP:
2293 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
2294 return put_user(0, argp);
2295 else
2296 return put_user(1, argp);
2297
2298#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2299
2300 case PMU_IOC_GET_BACKLIGHT:
2301 {
2302 int brightness;
2303
2304 brightness = pmac_backlight_get_legacy_brightness();
2305 if (brightness < 0)
2306 return brightness;
2307 else
2308 return put_user(brightness, argp);
2309
2310 }
2311 case PMU_IOC_SET_BACKLIGHT:
2312 {
2313 int brightness;
2314
2315 error = get_user(brightness, argp);
2316 if (error)
2317 return error;
2318
2319 return pmac_backlight_set_legacy_brightness(brightness);
2320 }
2321#ifdef CONFIG_INPUT_ADBHID
2322 case PMU_IOC_GRAB_BACKLIGHT: {
2323 struct pmu_private *pp = filp->private_data;
2324
2325 if (pp->backlight_locker)
2326 return 0;
2327
2328 pp->backlight_locker = 1;
2329 pmac_backlight_disable();
2330
2331 return 0;
2332 }
2333#endif
2334#endif
2335
2336 case PMU_IOC_GET_MODEL:
2337 return put_user(pmu_kind, argp);
2338 case PMU_IOC_HAS_ADB:
2339 return put_user(pmu_has_adb, argp);
2340 }
2341 return error;
2342}
2343
2344static long pmu_unlocked_ioctl(struct file *filp,
2345 u_int cmd, u_long arg)
2346{
2347 int ret;
2348
2349 mutex_lock(&pmu_info_proc_mutex);
2350 ret = pmu_ioctl(filp, cmd, arg);
2351 mutex_unlock(&pmu_info_proc_mutex);
2352
2353 return ret;
2354}
2355
2356#ifdef CONFIG_COMPAT
2357#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2358#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2359#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2360#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2361#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2362#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2363
2364static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2365{
2366 switch (cmd) {
2367 case PMU_IOC_SLEEP:
2368 break;
2369 case PMU_IOC_GET_BACKLIGHT32:
2370 cmd = PMU_IOC_GET_BACKLIGHT;
2371 break;
2372 case PMU_IOC_SET_BACKLIGHT32:
2373 cmd = PMU_IOC_SET_BACKLIGHT;
2374 break;
2375 case PMU_IOC_GET_MODEL32:
2376 cmd = PMU_IOC_GET_MODEL;
2377 break;
2378 case PMU_IOC_HAS_ADB32:
2379 cmd = PMU_IOC_HAS_ADB;
2380 break;
2381 case PMU_IOC_CAN_SLEEP32:
2382 cmd = PMU_IOC_CAN_SLEEP;
2383 break;
2384 case PMU_IOC_GRAB_BACKLIGHT32:
2385 cmd = PMU_IOC_GRAB_BACKLIGHT;
2386 break;
2387 default:
2388 return -ENOIOCTLCMD;
2389 }
2390 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2391}
2392#endif
2393
2394static const struct file_operations pmu_device_fops = {
2395 .read = pmu_read,
2396 .write = pmu_write,
2397 .poll = pmu_fpoll,
2398 .unlocked_ioctl = pmu_unlocked_ioctl,
2399#ifdef CONFIG_COMPAT
2400 .compat_ioctl = compat_pmu_ioctl,
2401#endif
2402 .open = pmu_open,
2403 .release = pmu_release,
2404 .llseek = noop_llseek,
2405};
2406
2407static struct miscdevice pmu_device = {
2408 PMU_MINOR, "pmu", &pmu_device_fops
2409};
2410
2411static int pmu_device_init(void)
2412{
2413 if (!via)
2414 return 0;
2415 if (misc_register(&pmu_device) < 0)
2416 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
2417 return 0;
2418}
2419device_initcall(pmu_device_init);
2420
2421
2422#ifdef DEBUG_SLEEP
2423static inline void
2424polled_handshake(volatile unsigned char __iomem *via)
2425{
2426 via[B] &= ~TREQ; eieio();
2427 while ((via[B] & TACK) != 0)
2428 ;
2429 via[B] |= TREQ; eieio();
2430 while ((via[B] & TACK) == 0)
2431 ;
2432}
2433
2434static inline void
2435polled_send_byte(volatile unsigned char __iomem *via, int x)
2436{
2437 via[ACR] |= SR_OUT | SR_EXT; eieio();
2438 via[SR] = x; eieio();
2439 polled_handshake(via);
2440}
2441
2442static inline int
2443polled_recv_byte(volatile unsigned char __iomem *via)
2444{
2445 int x;
2446
2447 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2448 x = via[SR]; eieio();
2449 polled_handshake(via);
2450 x = via[SR]; eieio();
2451 return x;
2452}
2453
2454int
2455pmu_polled_request(struct adb_request *req)
2456{
2457 unsigned long flags;
2458 int i, l, c;
2459 volatile unsigned char __iomem *v = via;
2460
2461 req->complete = 1;
2462 c = req->data[0];
2463 l = pmu_data_len[c][0];
2464 if (l >= 0 && req->nbytes != l + 1)
2465 return -EINVAL;
2466
2467 local_irq_save(flags);
2468 while (pmu_state != idle)
2469 pmu_poll();
2470
2471 while ((via[B] & TACK) == 0)
2472 ;
2473 polled_send_byte(v, c);
2474 if (l < 0) {
2475 l = req->nbytes - 1;
2476 polled_send_byte(v, l);
2477 }
2478 for (i = 1; i <= l; ++i)
2479 polled_send_byte(v, req->data[i]);
2480
2481 l = pmu_data_len[c][1];
2482 if (l < 0)
2483 l = polled_recv_byte(v);
2484 for (i = 0; i < l; ++i)
2485 req->reply[i + req->reply_len] = polled_recv_byte(v);
2486
2487 if (req->done)
2488 (*req->done)(req);
2489
2490 local_irq_restore(flags);
2491 return 0;
2492}
2493
2494
2495void pmu_blink(int n)
2496{
2497 struct adb_request req;
2498
2499 memset(&req, 0, sizeof(req));
2500
2501 for (; n > 0; --n) {
2502 req.nbytes = 4;
2503 req.done = NULL;
2504 req.data[0] = 0xee;
2505 req.data[1] = 4;
2506 req.data[2] = 0;
2507 req.data[3] = 1;
2508 req.reply[0] = ADB_RET_OK;
2509 req.reply_len = 1;
2510 req.reply_expected = 0;
2511 pmu_polled_request(&req);
2512 mdelay(50);
2513 req.nbytes = 4;
2514 req.done = NULL;
2515 req.data[0] = 0xee;
2516 req.data[1] = 4;
2517 req.data[2] = 0;
2518 req.data[3] = 0;
2519 req.reply[0] = ADB_RET_OK;
2520 req.reply_len = 1;
2521 req.reply_expected = 0;
2522 pmu_polled_request(&req);
2523 mdelay(50);
2524 }
2525 mdelay(50);
2526}
2527#endif
2528
2529#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2530int pmu_sys_suspended;
2531
2532static int pmu_syscore_suspend(void)
2533{
2534
2535 pmu_suspend();
2536 pmu_sys_suspended = 1;
2537
2538#ifdef CONFIG_PMAC_BACKLIGHT
2539
2540 pmu_backlight_set_sleep(1);
2541#endif
2542
2543 return 0;
2544}
2545
2546static void pmu_syscore_resume(void)
2547{
2548 struct adb_request req;
2549
2550 if (!pmu_sys_suspended)
2551 return;
2552
2553
2554 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2555 pmu_wait_complete(&req);
2556
2557#ifdef CONFIG_PMAC_BACKLIGHT
2558
2559 pmu_backlight_set_sleep(0);
2560#endif
2561
2562 pmu_resume();
2563 pmu_sys_suspended = 0;
2564}
2565
2566static struct syscore_ops pmu_syscore_ops = {
2567 .suspend = pmu_syscore_suspend,
2568 .resume = pmu_syscore_resume,
2569};
2570
2571static int pmu_syscore_register(void)
2572{
2573 register_syscore_ops(&pmu_syscore_ops);
2574
2575 return 0;
2576}
2577subsys_initcall(pmu_syscore_register);
2578#endif
2579
2580EXPORT_SYMBOL(pmu_request);
2581EXPORT_SYMBOL(pmu_queue_request);
2582EXPORT_SYMBOL(pmu_poll);
2583EXPORT_SYMBOL(pmu_poll_adb);
2584EXPORT_SYMBOL(pmu_wait_complete);
2585EXPORT_SYMBOL(pmu_suspend);
2586EXPORT_SYMBOL(pmu_resume);
2587EXPORT_SYMBOL(pmu_unlock);
2588#if defined(CONFIG_PPC32)
2589EXPORT_SYMBOL(pmu_enable_irled);
2590EXPORT_SYMBOL(pmu_battery_count);
2591EXPORT_SYMBOL(pmu_batteries);
2592EXPORT_SYMBOL(pmu_power_flags);
2593#endif
2594
2595
