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27#include <linux/etherdevice.h>
28#include "iwl-trans.h"
29#include "iwl-modparams.h"
30#include "dev.h"
31#include "agn.h"
32#include "calib.h"
33
34
35
36
37void iwl_connection_init_rx_config(struct iwl_priv *priv,
38 struct iwl_rxon_context *ctx)
39{
40 memset(&ctx->staging, 0, sizeof(ctx->staging));
41
42 if (!ctx->vif) {
43 ctx->staging.dev_type = ctx->unused_devtype;
44 } else
45 switch (ctx->vif->type) {
46 case NL80211_IFTYPE_AP:
47 ctx->staging.dev_type = ctx->ap_devtype;
48 break;
49
50 case NL80211_IFTYPE_STATION:
51 ctx->staging.dev_type = ctx->station_devtype;
52 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
53 break;
54
55 case NL80211_IFTYPE_ADHOC:
56 ctx->staging.dev_type = ctx->ibss_devtype;
57 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
58 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
59 RXON_FILTER_ACCEPT_GRP_MSK;
60 break;
61
62 case NL80211_IFTYPE_MONITOR:
63 ctx->staging.dev_type = RXON_DEV_TYPE_SNIFFER;
64 break;
65
66 default:
67 IWL_ERR(priv, "Unsupported interface type %d\n",
68 ctx->vif->type);
69 break;
70 }
71
72#if 0
73
74
75 if (!hw_to_local(priv->hw)->short_preamble)
76 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
77 else
78 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
79#endif
80
81 ctx->staging.channel =
82 cpu_to_le16(priv->hw->conf.chandef.chan->hw_value);
83 priv->band = priv->hw->conf.chandef.chan->band;
84
85 iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
86
87
88 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
89 RXON_FLG_CHANNEL_MODE_PURE_40);
90 if (ctx->vif)
91 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
92
93 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
94 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
95 ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
96}
97
98static int iwlagn_disable_bss(struct iwl_priv *priv,
99 struct iwl_rxon_context *ctx,
100 struct iwl_rxon_cmd *send)
101{
102 __le32 old_filter = send->filter_flags;
103 int ret;
104
105 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
106 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
107 0, sizeof(*send), send);
108
109 send->filter_flags = old_filter;
110
111 if (ret)
112 IWL_DEBUG_QUIET_RFKILL(priv,
113 "Error clearing ASSOC_MSK on BSS (%d)\n", ret);
114
115 return ret;
116}
117
118static int iwlagn_disable_pan(struct iwl_priv *priv,
119 struct iwl_rxon_context *ctx,
120 struct iwl_rxon_cmd *send)
121{
122 struct iwl_notification_wait disable_wait;
123 __le32 old_filter = send->filter_flags;
124 u8 old_dev_type = send->dev_type;
125 int ret;
126 static const u8 deactivate_cmd[] = {
127 REPLY_WIPAN_DEACTIVATION_COMPLETE
128 };
129
130 iwl_init_notification_wait(&priv->notif_wait, &disable_wait,
131 deactivate_cmd, ARRAY_SIZE(deactivate_cmd),
132 NULL, NULL);
133
134 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
135 send->dev_type = RXON_DEV_TYPE_P2P;
136 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd,
137 0, sizeof(*send), send);
138
139 send->filter_flags = old_filter;
140 send->dev_type = old_dev_type;
141
142 if (ret) {
143 IWL_ERR(priv, "Error disabling PAN (%d)\n", ret);
144 iwl_remove_notification(&priv->notif_wait, &disable_wait);
145 } else {
146 ret = iwl_wait_notification(&priv->notif_wait,
147 &disable_wait, HZ);
148 if (ret)
149 IWL_ERR(priv, "Timed out waiting for PAN disable\n");
150 }
151
152 return ret;
153}
154
155static int iwlagn_disconn_pan(struct iwl_priv *priv,
156 struct iwl_rxon_context *ctx,
157 struct iwl_rxon_cmd *send)
158{
159 __le32 old_filter = send->filter_flags;
160 int ret;
161
162 send->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
163 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, 0,
164 sizeof(*send), send);
165
166 send->filter_flags = old_filter;
167
168 return ret;
169}
170
171static void iwlagn_update_qos(struct iwl_priv *priv,
172 struct iwl_rxon_context *ctx)
173{
174 int ret;
175
176 if (!ctx->is_active)
177 return;
178
179 ctx->qos_data.def_qos_parm.qos_flags = 0;
180
181 if (ctx->qos_data.qos_active)
182 ctx->qos_data.def_qos_parm.qos_flags |=
183 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
184
185 if (ctx->ht.enabled)
186 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
187
188 IWL_DEBUG_INFO(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
189 ctx->qos_data.qos_active,
190 ctx->qos_data.def_qos_parm.qos_flags);
191
192 ret = iwl_dvm_send_cmd_pdu(priv, ctx->qos_cmd, 0,
193 sizeof(struct iwl_qosparam_cmd),
194 &ctx->qos_data.def_qos_parm);
195 if (ret)
196 IWL_DEBUG_QUIET_RFKILL(priv, "Failed to update QoS\n");
197}
198
199static int iwlagn_update_beacon(struct iwl_priv *priv,
200 struct ieee80211_vif *vif)
201{
202 lockdep_assert_held(&priv->mutex);
203
204 dev_kfree_skb(priv->beacon_skb);
205 priv->beacon_skb = ieee80211_beacon_get(priv->hw, vif);
206 if (!priv->beacon_skb)
207 return -ENOMEM;
208 return iwlagn_send_beacon_cmd(priv);
209}
210
211static int iwlagn_send_rxon_assoc(struct iwl_priv *priv,
212 struct iwl_rxon_context *ctx)
213{
214 int ret = 0;
215 struct iwl_rxon_assoc_cmd rxon_assoc;
216 const struct iwl_rxon_cmd *rxon1 = &ctx->staging;
217 const struct iwl_rxon_cmd *rxon2 = &ctx->active;
218
219 if ((rxon1->flags == rxon2->flags) &&
220 (rxon1->filter_flags == rxon2->filter_flags) &&
221 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
222 (rxon1->ofdm_ht_single_stream_basic_rates ==
223 rxon2->ofdm_ht_single_stream_basic_rates) &&
224 (rxon1->ofdm_ht_dual_stream_basic_rates ==
225 rxon2->ofdm_ht_dual_stream_basic_rates) &&
226 (rxon1->ofdm_ht_triple_stream_basic_rates ==
227 rxon2->ofdm_ht_triple_stream_basic_rates) &&
228 (rxon1->acquisition_data == rxon2->acquisition_data) &&
229 (rxon1->rx_chain == rxon2->rx_chain) &&
230 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
231 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
232 return 0;
233 }
234
235 rxon_assoc.flags = ctx->staging.flags;
236 rxon_assoc.filter_flags = ctx->staging.filter_flags;
237 rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
238 rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
239 rxon_assoc.reserved1 = 0;
240 rxon_assoc.reserved2 = 0;
241 rxon_assoc.reserved3 = 0;
242 rxon_assoc.ofdm_ht_single_stream_basic_rates =
243 ctx->staging.ofdm_ht_single_stream_basic_rates;
244 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
245 ctx->staging.ofdm_ht_dual_stream_basic_rates;
246 rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
247 rxon_assoc.ofdm_ht_triple_stream_basic_rates =
248 ctx->staging.ofdm_ht_triple_stream_basic_rates;
249 rxon_assoc.acquisition_data = ctx->staging.acquisition_data;
250
251 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_assoc_cmd,
252 CMD_ASYNC, sizeof(rxon_assoc), &rxon_assoc);
253 return ret;
254}
255
256static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
257{
258 u16 new_val;
259 u16 beacon_factor;
260
261
262
263
264
265
266
267 if (!beacon_val)
268 return DEFAULT_BEACON_INTERVAL;
269
270
271
272
273
274
275
276
277
278
279
280
281
282 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
283 new_val = beacon_val / beacon_factor;
284
285 if (!new_val)
286 new_val = max_beacon_val;
287
288 return new_val;
289}
290
291static int iwl_send_rxon_timing(struct iwl_priv *priv,
292 struct iwl_rxon_context *ctx)
293{
294 u64 tsf;
295 s32 interval_tm, rem;
296 struct ieee80211_conf *conf = NULL;
297 u16 beacon_int;
298 struct ieee80211_vif *vif = ctx->vif;
299
300 conf = &priv->hw->conf;
301
302 lockdep_assert_held(&priv->mutex);
303
304 memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
305
306 ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
307 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
308
309 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
310
311
312
313
314
315 ctx->timing.atim_window = 0;
316
317 if (ctx->ctxid == IWL_RXON_CTX_PAN &&
318 (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
319 iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
320 priv->contexts[IWL_RXON_CTX_BSS].vif &&
321 priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
322 ctx->timing.beacon_interval =
323 priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
324 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
325 } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
326 iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
327 priv->contexts[IWL_RXON_CTX_PAN].vif &&
328 priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
329 (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
330 !ctx->vif->bss_conf.beacon_int)) {
331 ctx->timing.beacon_interval =
332 priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
333 beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
334 } else {
335 beacon_int = iwl_adjust_beacon_interval(beacon_int,
336 IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);
337 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
338 }
339
340 ctx->beacon_int = beacon_int;
341
342 tsf = priv->timestamp;
343 interval_tm = beacon_int * TIME_UNIT;
344 rem = do_div(tsf, interval_tm);
345 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
346
347 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
348
349 IWL_DEBUG_ASSOC(priv,
350 "beacon interval %d beacon timer %d beacon tim %d\n",
351 le16_to_cpu(ctx->timing.beacon_interval),
352 le32_to_cpu(ctx->timing.beacon_init_val),
353 le16_to_cpu(ctx->timing.atim_window));
354
355 return iwl_dvm_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
356 0, sizeof(ctx->timing), &ctx->timing);
357}
358
359static int iwlagn_rxon_disconn(struct iwl_priv *priv,
360 struct iwl_rxon_context *ctx)
361{
362 int ret;
363 struct iwl_rxon_cmd *active = (void *)&ctx->active;
364
365 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
366 ret = iwlagn_disable_bss(priv, ctx, &ctx->staging);
367 } else {
368 ret = iwlagn_disable_pan(priv, ctx, &ctx->staging);
369 if (ret)
370 return ret;
371 if (ctx->vif) {
372 ret = iwl_send_rxon_timing(priv, ctx);
373 if (ret) {
374 IWL_ERR(priv, "Failed to send timing (%d)!\n", ret);
375 return ret;
376 }
377 ret = iwlagn_disconn_pan(priv, ctx, &ctx->staging);
378 }
379 }
380 if (ret)
381 return ret;
382
383
384
385
386
387 iwl_clear_ucode_stations(priv, ctx);
388
389 iwl_update_bcast_station(priv, ctx);
390 iwl_restore_stations(priv, ctx);
391 ret = iwl_restore_default_wep_keys(priv, ctx);
392 if (ret) {
393 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
394 return ret;
395 }
396
397 memcpy(active, &ctx->staging, sizeof(*active));
398 return 0;
399}
400
401static int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
402{
403 int ret;
404 s8 prev_tx_power;
405 bool defer;
406 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
407
408 if (priv->calib_disabled & IWL_TX_POWER_CALIB_DISABLED)
409 return 0;
410
411 lockdep_assert_held(&priv->mutex);
412
413 if (priv->tx_power_user_lmt == tx_power && !force)
414 return 0;
415
416 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
417 IWL_WARN(priv,
418 "Requested user TXPOWER %d below lower limit %d.\n",
419 tx_power,
420 IWLAGN_TX_POWER_TARGET_POWER_MIN);
421 return -EINVAL;
422 }
423
424 if (tx_power > DIV_ROUND_UP(priv->nvm_data->max_tx_pwr_half_dbm, 2)) {
425 IWL_WARN(priv,
426 "Requested user TXPOWER %d above upper limit %d.\n",
427 tx_power, priv->nvm_data->max_tx_pwr_half_dbm);
428 return -EINVAL;
429 }
430
431 if (!iwl_is_ready_rf(priv))
432 return -EIO;
433
434
435
436 priv->tx_power_next = tx_power;
437
438
439 defer = test_bit(STATUS_SCANNING, &priv->status) ||
440 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
441 if (defer && !force) {
442 IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
443 return 0;
444 }
445
446 prev_tx_power = priv->tx_power_user_lmt;
447 priv->tx_power_user_lmt = tx_power;
448
449 ret = iwlagn_send_tx_power(priv);
450
451
452 if (ret) {
453 priv->tx_power_user_lmt = prev_tx_power;
454 priv->tx_power_next = prev_tx_power;
455 }
456 return ret;
457}
458
459static int iwlagn_rxon_connect(struct iwl_priv *priv,
460 struct iwl_rxon_context *ctx)
461{
462 int ret;
463 struct iwl_rxon_cmd *active = (void *)&ctx->active;
464
465
466 if (ctx->ctxid == IWL_RXON_CTX_BSS) {
467 ret = iwl_send_rxon_timing(priv, ctx);
468 if (ret) {
469 IWL_ERR(priv, "Failed to send timing (%d)!\n", ret);
470 return ret;
471 }
472 }
473
474 iwlagn_update_qos(priv, ctx);
475
476
477
478
479
480
481 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_AP)) {
482 ret = iwlagn_update_beacon(priv, ctx->vif);
483 if (ret) {
484 IWL_ERR(priv,
485 "Error sending required beacon (%d)!\n",
486 ret);
487 return ret;
488 }
489 }
490
491 priv->start_calib = 0;
492
493
494
495
496
497
498 ret = iwl_dvm_send_cmd_pdu(priv, ctx->rxon_cmd, 0,
499 sizeof(struct iwl_rxon_cmd), &ctx->staging);
500 if (ret) {
501 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
502 return ret;
503 }
504 memcpy(active, &ctx->staging, sizeof(*active));
505
506
507 if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC))
508 if (iwlagn_update_beacon(priv, ctx->vif))
509 IWL_ERR(priv, "Error sending IBSS beacon\n");
510 iwl_init_sensitivity(priv);
511
512
513
514
515
516
517
518
519 ret = iwl_set_tx_power(priv, priv->tx_power_next, true);
520 if (ret) {
521 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
522 return ret;
523 }
524
525 if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION &&
526 priv->cfg->ht_params && priv->cfg->ht_params->smps_mode)
527 ieee80211_request_smps(ctx->vif,
528 priv->cfg->ht_params->smps_mode);
529
530 return 0;
531}
532
533int iwlagn_set_pan_params(struct iwl_priv *priv)
534{
535 struct iwl_wipan_params_cmd cmd;
536 struct iwl_rxon_context *ctx_bss, *ctx_pan;
537 int slot0 = 300, slot1 = 0;
538 int ret;
539
540 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS))
541 return 0;
542
543 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
544
545 lockdep_assert_held(&priv->mutex);
546
547 ctx_bss = &priv->contexts[IWL_RXON_CTX_BSS];
548 ctx_pan = &priv->contexts[IWL_RXON_CTX_PAN];
549
550
551
552
553
554
555
556 if (!ctx_pan->is_active)
557 return 0;
558
559 memset(&cmd, 0, sizeof(cmd));
560
561
562 cmd.num_slots = 2;
563
564 cmd.slots[0].type = 0;
565 cmd.slots[1].type = 1;
566
567 if (ctx_bss->vif && ctx_pan->vif) {
568 int bcnint = ctx_pan->beacon_int;
569 int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1;
570
571
572 cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE);
573
574 if (ctx_pan->vif->type == NL80211_IFTYPE_AP &&
575 bcnint &&
576 bcnint != ctx_bss->beacon_int) {
577 IWL_ERR(priv,
578 "beacon intervals don't match (%d, %d)\n",
579 ctx_bss->beacon_int, ctx_pan->beacon_int);
580 } else
581 bcnint = max_t(int, bcnint,
582 ctx_bss->beacon_int);
583 if (!bcnint)
584 bcnint = DEFAULT_BEACON_INTERVAL;
585 slot0 = bcnint / 2;
586 slot1 = bcnint - slot0;
587
588 if (test_bit(STATUS_SCAN_HW, &priv->status) ||
589 (!ctx_bss->vif->bss_conf.idle &&
590 !ctx_bss->vif->bss_conf.assoc)) {
591 slot0 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
592 slot1 = IWL_MIN_SLOT_TIME;
593 } else if (!ctx_pan->vif->bss_conf.idle &&
594 !ctx_pan->vif->bss_conf.assoc) {
595 slot1 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME;
596 slot0 = IWL_MIN_SLOT_TIME;
597 }
598 } else if (ctx_pan->vif) {
599 slot0 = 0;
600 slot1 = max_t(int, 1, ctx_pan->vif->bss_conf.dtim_period) *
601 ctx_pan->beacon_int;
602 slot1 = max_t(int, DEFAULT_BEACON_INTERVAL, slot1);
603
604 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
605 slot0 = slot1 * 3 - IWL_MIN_SLOT_TIME;
606 slot1 = IWL_MIN_SLOT_TIME;
607 }
608 }
609
610 cmd.slots[0].width = cpu_to_le16(slot0);
611 cmd.slots[1].width = cpu_to_le16(slot1);
612
613 ret = iwl_dvm_send_cmd_pdu(priv, REPLY_WIPAN_PARAMS, 0,
614 sizeof(cmd), &cmd);
615 if (ret)
616 IWL_ERR(priv, "Error setting PAN parameters (%d)\n", ret);
617
618 return ret;
619}
620
621static void _iwl_set_rxon_ht(struct iwl_priv *priv,
622 struct iwl_ht_config *ht_conf,
623 struct iwl_rxon_context *ctx)
624{
625 struct iwl_rxon_cmd *rxon = &ctx->staging;
626
627 if (!ctx->ht.enabled) {
628 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
629 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
630 RXON_FLG_HT40_PROT_MSK |
631 RXON_FLG_HT_PROT_MSK);
632 return;
633 }
634
635
636
637
638 rxon->flags |= cpu_to_le32(ctx->ht.protection <<
639 RXON_FLG_HT_OPERATING_MODE_POS);
640
641
642
643
644 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
645 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
646 if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
647
648 if (ctx->ht.protection ==
649 IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
650 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
651
652
653
654
655 switch (ctx->ht.extension_chan_offset) {
656 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
657 rxon->flags &=
658 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
659 break;
660 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
661 rxon->flags |=
662 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
663 break;
664 }
665 } else {
666
667
668
669
670 switch (ctx->ht.extension_chan_offset) {
671 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
672 rxon->flags &=
673 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
674 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
675 break;
676 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
677 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
678 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
679 break;
680 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
681 default:
682
683
684
685
686 IWL_ERR(priv,
687 "invalid extension channel offset\n");
688 break;
689 }
690 }
691 } else {
692 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
693 }
694
695 iwlagn_set_rxon_chain(priv, ctx);
696
697 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
698 "extension channel offset 0x%x\n",
699 le32_to_cpu(rxon->flags), ctx->ht.protection,
700 ctx->ht.extension_chan_offset);
701}
702
703void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
704{
705 struct iwl_rxon_context *ctx;
706
707 for_each_context(priv, ctx)
708 _iwl_set_rxon_ht(priv, ht_conf, ctx);
709}
710
711
712
713
714
715
716
717
718void iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
719 struct iwl_rxon_context *ctx)
720{
721 enum ieee80211_band band = ch->band;
722 u16 channel = ch->hw_value;
723
724 if ((le16_to_cpu(ctx->staging.channel) == channel) &&
725 (priv->band == band))
726 return;
727
728 ctx->staging.channel = cpu_to_le16(channel);
729 if (band == IEEE80211_BAND_5GHZ)
730 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
731 else
732 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
733
734 priv->band = band;
735
736 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
737
738}
739
740void iwl_set_flags_for_band(struct iwl_priv *priv,
741 struct iwl_rxon_context *ctx,
742 enum ieee80211_band band,
743 struct ieee80211_vif *vif)
744{
745 if (band == IEEE80211_BAND_5GHZ) {
746 ctx->staging.flags &=
747 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
748 | RXON_FLG_CCK_MSK);
749 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
750 } else {
751
752 if (vif && vif->bss_conf.use_short_slot)
753 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
754 else
755 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
756
757 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
758 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
759 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
760 }
761}
762
763static void iwl_set_rxon_hwcrypto(struct iwl_priv *priv,
764 struct iwl_rxon_context *ctx, int hw_decrypt)
765{
766 struct iwl_rxon_cmd *rxon = &ctx->staging;
767
768 if (hw_decrypt)
769 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
770 else
771 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
772
773}
774
775
776static int iwl_check_rxon_cmd(struct iwl_priv *priv,
777 struct iwl_rxon_context *ctx)
778{
779 struct iwl_rxon_cmd *rxon = &ctx->staging;
780 u32 errors = 0;
781
782 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
783 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
784 IWL_WARN(priv, "check 2.4G: wrong narrow\n");
785 errors |= BIT(0);
786 }
787 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
788 IWL_WARN(priv, "check 2.4G: wrong radar\n");
789 errors |= BIT(1);
790 }
791 } else {
792 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
793 IWL_WARN(priv, "check 5.2G: not short slot!\n");
794 errors |= BIT(2);
795 }
796 if (rxon->flags & RXON_FLG_CCK_MSK) {
797 IWL_WARN(priv, "check 5.2G: CCK!\n");
798 errors |= BIT(3);
799 }
800 }
801 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
802 IWL_WARN(priv, "mac/bssid mcast!\n");
803 errors |= BIT(4);
804 }
805
806
807 if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
808 (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
809 IWL_WARN(priv, "neither 1 nor 6 are basic\n");
810 errors |= BIT(5);
811 }
812
813 if (le16_to_cpu(rxon->assoc_id) > 2007) {
814 IWL_WARN(priv, "aid > 2007\n");
815 errors |= BIT(6);
816 }
817
818 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
819 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
820 IWL_WARN(priv, "CCK and short slot\n");
821 errors |= BIT(7);
822 }
823
824 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
825 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
826 IWL_WARN(priv, "CCK and auto detect\n");
827 errors |= BIT(8);
828 }
829
830 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
831 RXON_FLG_TGG_PROTECT_MSK)) ==
832 RXON_FLG_TGG_PROTECT_MSK) {
833 IWL_WARN(priv, "TGg but no auto-detect\n");
834 errors |= BIT(9);
835 }
836
837 if (rxon->channel == 0) {
838 IWL_WARN(priv, "zero channel is invalid\n");
839 errors |= BIT(10);
840 }
841
842 WARN(errors, "Invalid RXON (%#x), channel %d",
843 errors, le16_to_cpu(rxon->channel));
844
845 return errors ? -EINVAL : 0;
846}
847
848
849
850
851
852
853
854
855
856static int iwl_full_rxon_required(struct iwl_priv *priv,
857 struct iwl_rxon_context *ctx)
858{
859 const struct iwl_rxon_cmd *staging = &ctx->staging;
860 const struct iwl_rxon_cmd *active = &ctx->active;
861
862#define CHK(cond) \
863 if ((cond)) { \
864 IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
865 return 1; \
866 }
867
868#define CHK_NEQ(c1, c2) \
869 if ((c1) != (c2)) { \
870 IWL_DEBUG_INFO(priv, "need full RXON - " \
871 #c1 " != " #c2 " - %d != %d\n", \
872 (c1), (c2)); \
873 return 1; \
874 }
875
876
877 CHK(!iwl_is_associated_ctx(ctx));
878 CHK(!ether_addr_equal(staging->bssid_addr, active->bssid_addr));
879 CHK(!ether_addr_equal(staging->node_addr, active->node_addr));
880 CHK(!ether_addr_equal(staging->wlap_bssid_addr,
881 active->wlap_bssid_addr));
882 CHK_NEQ(staging->dev_type, active->dev_type);
883 CHK_NEQ(staging->channel, active->channel);
884 CHK_NEQ(staging->air_propagation, active->air_propagation);
885 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
886 active->ofdm_ht_single_stream_basic_rates);
887 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
888 active->ofdm_ht_dual_stream_basic_rates);
889 CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
890 active->ofdm_ht_triple_stream_basic_rates);
891 CHK_NEQ(staging->assoc_id, active->assoc_id);
892
893
894
895
896
897
898 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
899 active->flags & RXON_FLG_BAND_24G_MSK);
900
901
902 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
903 active->filter_flags & RXON_FILTER_ASSOC_MSK);
904
905#undef CHK
906#undef CHK_NEQ
907
908 return 0;
909}
910
911#ifdef CONFIG_IWLWIFI_DEBUG
912void iwl_print_rx_config_cmd(struct iwl_priv *priv,
913 enum iwl_rxon_context_id ctxid)
914{
915 struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
916 struct iwl_rxon_cmd *rxon = &ctx->staging;
917
918 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
919 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
920 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n",
921 le16_to_cpu(rxon->channel));
922 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n",
923 le32_to_cpu(rxon->flags));
924 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
925 le32_to_cpu(rxon->filter_flags));
926 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
927 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
928 rxon->ofdm_basic_rates);
929 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n",
930 rxon->cck_basic_rates);
931 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
932 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
933 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n",
934 le16_to_cpu(rxon->assoc_id));
935}
936#endif
937
938static void iwl_calc_basic_rates(struct iwl_priv *priv,
939 struct iwl_rxon_context *ctx)
940{
941 int lowest_present_ofdm = 100;
942 int lowest_present_cck = 100;
943 u8 cck = 0;
944 u8 ofdm = 0;
945
946 if (ctx->vif) {
947 struct ieee80211_supported_band *sband;
948 unsigned long basic = ctx->vif->bss_conf.basic_rates;
949 int i;
950
951 sband = priv->hw->wiphy->bands[priv->hw->conf.chandef.chan->band];
952
953 for_each_set_bit(i, &basic, BITS_PER_LONG) {
954 int hw = sband->bitrates[i].hw_value;
955 if (hw >= IWL_FIRST_OFDM_RATE) {
956 ofdm |= BIT(hw - IWL_FIRST_OFDM_RATE);
957 if (lowest_present_ofdm > hw)
958 lowest_present_ofdm = hw;
959 } else {
960 BUILD_BUG_ON(IWL_FIRST_CCK_RATE != 0);
961
962 cck |= BIT(hw);
963 if (lowest_present_cck > hw)
964 lowest_present_cck = hw;
965 }
966 }
967 }
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992 if (IWL_RATE_24M_INDEX < lowest_present_ofdm)
993 ofdm |= IWL_RATE_24M_MASK >> IWL_FIRST_OFDM_RATE;
994 if (IWL_RATE_12M_INDEX < lowest_present_ofdm)
995 ofdm |= IWL_RATE_12M_MASK >> IWL_FIRST_OFDM_RATE;
996
997 ofdm |= IWL_RATE_6M_MASK >> IWL_FIRST_OFDM_RATE;
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012 if (IWL_RATE_11M_INDEX < lowest_present_cck)
1013 cck |= IWL_RATE_11M_MASK >> IWL_FIRST_CCK_RATE;
1014 if (IWL_RATE_5M_INDEX < lowest_present_cck)
1015 cck |= IWL_RATE_5M_MASK >> IWL_FIRST_CCK_RATE;
1016 if (IWL_RATE_2M_INDEX < lowest_present_cck)
1017 cck |= IWL_RATE_2M_MASK >> IWL_FIRST_CCK_RATE;
1018
1019 cck |= IWL_RATE_1M_MASK >> IWL_FIRST_CCK_RATE;
1020
1021 IWL_DEBUG_RATE(priv, "Set basic rates cck:0x%.2x ofdm:0x%.2x\n",
1022 cck, ofdm);
1023
1024
1025 ctx->staging.cck_basic_rates = cck;
1026 ctx->staging.ofdm_basic_rates = ofdm;
1027}
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
1048{
1049
1050 struct iwl_rxon_cmd *active = (void *)&ctx->active;
1051 bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1052 int ret;
1053
1054 lockdep_assert_held(&priv->mutex);
1055
1056 if (!iwl_is_alive(priv))
1057 return -EBUSY;
1058
1059
1060 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
1061
1062 if (!ctx->is_active)
1063 return 0;
1064
1065
1066 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1067
1068
1069 iwl_calc_basic_rates(priv, ctx);
1070
1071 if ((ctx->vif && ctx->vif->bss_conf.use_short_slot) ||
1072 !(ctx->staging.flags & RXON_FLG_BAND_24G_MSK))
1073 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1074 else
1075 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1076
1077 iwl_print_rx_config_cmd(priv, ctx->ctxid);
1078 ret = iwl_check_rxon_cmd(priv, ctx);
1079 if (ret) {
1080 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
1081 return -EINVAL;
1082 }
1083
1084
1085
1086
1087
1088 if (test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status) &&
1089 (priv->switch_channel != ctx->staging.channel)) {
1090 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
1091 le16_to_cpu(priv->switch_channel));
1092 iwl_chswitch_done(priv, false);
1093 }
1094
1095
1096
1097
1098
1099
1100 if (!iwl_full_rxon_required(priv, ctx)) {
1101 ret = iwlagn_send_rxon_assoc(priv, ctx);
1102 if (ret) {
1103 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
1104 return ret;
1105 }
1106
1107 memcpy(active, &ctx->staging, sizeof(*active));
1108
1109
1110
1111
1112 iwl_set_tx_power(priv, priv->tx_power_next, false);
1113
1114
1115 iwl_power_update_mode(priv, true);
1116
1117 return 0;
1118 }
1119
1120 iwl_set_rxon_hwcrypto(priv, ctx, !iwlwifi_mod_params.sw_crypto);
1121
1122 IWL_DEBUG_INFO(priv,
1123 "Going to commit RXON\n"
1124 " * with%s RXON_FILTER_ASSOC_MSK\n"
1125 " * channel = %d\n"
1126 " * bssid = %pM\n",
1127 (new_assoc ? "" : "out"),
1128 le16_to_cpu(ctx->staging.channel),
1129 ctx->staging.bssid_addr);
1130
1131
1132
1133
1134
1135
1136
1137 ret = iwlagn_rxon_disconn(priv, ctx);
1138 if (ret)
1139 return ret;
1140
1141 ret = iwlagn_set_pan_params(priv);
1142 if (ret)
1143 return ret;
1144
1145 if (new_assoc)
1146 return iwlagn_rxon_connect(priv, ctx);
1147
1148 return 0;
1149}
1150
1151void iwlagn_config_ht40(struct ieee80211_conf *conf,
1152 struct iwl_rxon_context *ctx)
1153{
1154 if (conf_is_ht40_minus(conf)) {
1155 ctx->ht.extension_chan_offset =
1156 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
1157 ctx->ht.is_40mhz = true;
1158 } else if (conf_is_ht40_plus(conf)) {
1159 ctx->ht.extension_chan_offset =
1160 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
1161 ctx->ht.is_40mhz = true;
1162 } else {
1163 ctx->ht.extension_chan_offset =
1164 IEEE80211_HT_PARAM_CHA_SEC_NONE;
1165 ctx->ht.is_40mhz = false;
1166 }
1167}
1168
1169int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
1170{
1171 struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
1172 struct iwl_rxon_context *ctx;
1173 struct ieee80211_conf *conf = &hw->conf;
1174 struct ieee80211_channel *channel = conf->chandef.chan;
1175 int ret = 0;
1176
1177 IWL_DEBUG_MAC80211(priv, "enter: changed %#x\n", changed);
1178
1179 mutex_lock(&priv->mutex);
1180
1181 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
1182 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
1183 goto out;
1184 }
1185
1186 if (!iwl_is_ready(priv)) {
1187 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
1188 goto out;
1189 }
1190
1191 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
1192 IEEE80211_CONF_CHANGE_CHANNEL)) {
1193
1194 priv->current_ht_config.smps = conf->smps_mode;
1195
1196
1197
1198
1199
1200
1201
1202
1203 for_each_context(priv, ctx)
1204 iwlagn_set_rxon_chain(priv, ctx);
1205 }
1206
1207 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1208 for_each_context(priv, ctx) {
1209
1210 if (ctx->ht.enabled != conf_is_ht(conf))
1211 ctx->ht.enabled = conf_is_ht(conf);
1212
1213 if (ctx->ht.enabled) {
1214
1215
1216 if (!ctx->ht.is_40mhz ||
1217 !iwl_is_associated_ctx(ctx))
1218 iwlagn_config_ht40(conf, ctx);
1219 } else
1220 ctx->ht.is_40mhz = false;
1221
1222
1223
1224
1225
1226 ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
1227
1228
1229
1230
1231 if (le16_to_cpu(ctx->staging.channel) !=
1232 channel->hw_value)
1233 ctx->staging.flags = 0;
1234
1235 iwl_set_rxon_channel(priv, channel, ctx);
1236 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1237
1238 iwl_set_flags_for_band(priv, ctx, channel->band,
1239 ctx->vif);
1240 }
1241
1242 iwl_update_bcast_stations(priv);
1243 }
1244
1245 if (changed & (IEEE80211_CONF_CHANGE_PS |
1246 IEEE80211_CONF_CHANGE_IDLE)) {
1247 ret = iwl_power_update_mode(priv, false);
1248 if (ret)
1249 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
1250 }
1251
1252 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1253 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
1254 priv->tx_power_user_lmt, conf->power_level);
1255
1256 iwl_set_tx_power(priv, conf->power_level, false);
1257 }
1258
1259 for_each_context(priv, ctx) {
1260 if (!memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1261 continue;
1262 iwlagn_commit_rxon(priv, ctx);
1263 }
1264 out:
1265 mutex_unlock(&priv->mutex);
1266 IWL_DEBUG_MAC80211(priv, "leave\n");
1267
1268 return ret;
1269}
1270
1271static void iwlagn_check_needed_chains(struct iwl_priv *priv,
1272 struct iwl_rxon_context *ctx,
1273 struct ieee80211_bss_conf *bss_conf)
1274{
1275 struct ieee80211_vif *vif = ctx->vif;
1276 struct iwl_rxon_context *tmp;
1277 struct ieee80211_sta *sta;
1278 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
1279 struct ieee80211_sta_ht_cap *ht_cap;
1280 bool need_multiple;
1281
1282 lockdep_assert_held(&priv->mutex);
1283
1284 switch (vif->type) {
1285 case NL80211_IFTYPE_STATION:
1286 rcu_read_lock();
1287 sta = ieee80211_find_sta(vif, bss_conf->bssid);
1288 if (!sta) {
1289
1290
1291
1292
1293
1294
1295 need_multiple = false;
1296 rcu_read_unlock();
1297 break;
1298 }
1299
1300 ht_cap = &sta->ht_cap;
1301
1302 need_multiple = true;
1303
1304
1305
1306
1307
1308 if (ht_cap->mcs.rx_mask[1] == 0 &&
1309 ht_cap->mcs.rx_mask[2] == 0) {
1310 need_multiple = false;
1311 } else if (!(ht_cap->mcs.tx_params &
1312 IEEE80211_HT_MCS_TX_DEFINED)) {
1313
1314 need_multiple = false;
1315 } else if (ht_cap->mcs.tx_params &
1316 IEEE80211_HT_MCS_TX_RX_DIFF) {
1317 int maxstreams;
1318
1319
1320
1321
1322
1323
1324
1325
1326 maxstreams = (ht_cap->mcs.tx_params &
1327 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK);
1328 maxstreams >>=
1329 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1330 maxstreams += 1;
1331
1332 if (maxstreams <= 1)
1333 need_multiple = false;
1334 }
1335
1336 rcu_read_unlock();
1337 break;
1338 case NL80211_IFTYPE_ADHOC:
1339
1340 need_multiple = false;
1341 break;
1342 default:
1343
1344 need_multiple = true;
1345 break;
1346 }
1347
1348 ctx->ht_need_multiple_chains = need_multiple;
1349
1350 if (!need_multiple) {
1351
1352 for_each_context(priv, tmp) {
1353 if (!tmp->vif)
1354 continue;
1355 if (tmp->ht_need_multiple_chains) {
1356 need_multiple = true;
1357 break;
1358 }
1359 }
1360 }
1361
1362 ht_conf->single_chain_sufficient = !need_multiple;
1363}
1364
1365static void iwlagn_chain_noise_reset(struct iwl_priv *priv)
1366{
1367 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
1368 int ret;
1369
1370 if (priv->calib_disabled & IWL_CHAIN_NOISE_CALIB_DISABLED)
1371 return;
1372
1373 if ((data->state == IWL_CHAIN_NOISE_ALIVE) &&
1374 iwl_is_any_associated(priv)) {
1375 struct iwl_calib_chain_noise_reset_cmd cmd;
1376
1377
1378 data->chain_noise_a = 0;
1379 data->chain_noise_b = 0;
1380 data->chain_noise_c = 0;
1381 data->chain_signal_a = 0;
1382 data->chain_signal_b = 0;
1383 data->chain_signal_c = 0;
1384 data->beacon_count = 0;
1385
1386 memset(&cmd, 0, sizeof(cmd));
1387 iwl_set_calib_hdr(&cmd.hdr,
1388 priv->phy_calib_chain_noise_reset_cmd);
1389 ret = iwl_dvm_send_cmd_pdu(priv,
1390 REPLY_PHY_CALIBRATION_CMD,
1391 0, sizeof(cmd), &cmd);
1392 if (ret)
1393 IWL_ERR(priv,
1394 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
1395 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1396 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
1397 }
1398}
1399
1400void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
1401 struct ieee80211_vif *vif,
1402 struct ieee80211_bss_conf *bss_conf,
1403 u32 changes)
1404{
1405 struct iwl_priv *priv = IWL_MAC80211_GET_DVM(hw);
1406 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
1407 int ret;
1408 bool force = false;
1409
1410 mutex_lock(&priv->mutex);
1411
1412 if (changes & BSS_CHANGED_IDLE && bss_conf->idle) {
1413
1414
1415
1416
1417 iwlagn_lift_passive_no_rx(priv);
1418 }
1419
1420 if (unlikely(!iwl_is_ready(priv))) {
1421 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
1422 mutex_unlock(&priv->mutex);
1423 return;
1424 }
1425
1426 if (unlikely(!ctx->vif)) {
1427 IWL_DEBUG_MAC80211(priv, "leave - vif is NULL\n");
1428 mutex_unlock(&priv->mutex);
1429 return;
1430 }
1431
1432 if (changes & BSS_CHANGED_BEACON_INT)
1433 force = true;
1434
1435 if (changes & BSS_CHANGED_QOS) {
1436 ctx->qos_data.qos_active = bss_conf->qos;
1437 iwlagn_update_qos(priv, ctx);
1438 }
1439
1440 ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
1441 if (vif->bss_conf.use_short_preamble)
1442 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1443 else
1444 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1445
1446 if (changes & BSS_CHANGED_ASSOC) {
1447 if (bss_conf->assoc) {
1448 priv->timestamp = bss_conf->sync_tsf;
1449 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1450 } else {
1451 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1452
1453 if (ctx->ctxid == IWL_RXON_CTX_BSS)
1454 priv->have_rekey_data = false;
1455 }
1456
1457 iwlagn_bt_coex_rssi_monitor(priv);
1458 }
1459
1460 if (ctx->ht.enabled) {
1461 ctx->ht.protection = bss_conf->ht_operation_mode &
1462 IEEE80211_HT_OP_MODE_PROTECTION;
1463 ctx->ht.non_gf_sta_present = !!(bss_conf->ht_operation_mode &
1464 IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
1465 iwlagn_check_needed_chains(priv, ctx, bss_conf);
1466 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1467 }
1468
1469 iwlagn_set_rxon_chain(priv, ctx);
1470
1471 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1472 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
1473 else
1474 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1475
1476 memcpy(ctx->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
1477
1478 if (vif->type == NL80211_IFTYPE_AP ||
1479 vif->type == NL80211_IFTYPE_ADHOC) {
1480 if (vif->bss_conf.enable_beacon) {
1481 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1482 priv->beacon_ctx = ctx;
1483 } else {
1484 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1485 priv->beacon_ctx = NULL;
1486 }
1487 }
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497 if (vif->type == NL80211_IFTYPE_STATION) {
1498 if (!bss_conf->assoc)
1499 ctx->staging.filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1500 else
1501 ctx->staging.filter_flags &=
1502 ~RXON_FILTER_BCON_AWARE_MSK;
1503 }
1504
1505 if (force || memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1506 iwlagn_commit_rxon(priv, ctx);
1507
1508 if (changes & BSS_CHANGED_ASSOC && bss_conf->assoc) {
1509
1510
1511
1512
1513
1514 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
1515 iwl_power_update_mode(priv, false);
1516
1517
1518 iwlagn_chain_noise_reset(priv);
1519 priv->start_calib = 1;
1520 }
1521
1522 if (changes & BSS_CHANGED_IBSS) {
1523 ret = iwlagn_manage_ibss_station(priv, vif,
1524 bss_conf->ibss_joined);
1525 if (ret)
1526 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1527 bss_conf->ibss_joined ? "add" : "remove",
1528 bss_conf->bssid);
1529 }
1530
1531 if (changes & BSS_CHANGED_BEACON && priv->beacon_ctx == ctx) {
1532 if (iwlagn_update_beacon(priv, vif))
1533 IWL_ERR(priv, "Error updating beacon\n");
1534 }
1535
1536 mutex_unlock(&priv->mutex);
1537}
1538
1539void iwlagn_post_scan(struct iwl_priv *priv)
1540{
1541 struct iwl_rxon_context *ctx;
1542
1543
1544
1545
1546
1547 iwl_power_set_mode(priv, &priv->power_data.sleep_cmd_next, false);
1548 iwl_set_tx_power(priv, priv->tx_power_next, false);
1549
1550
1551
1552
1553
1554 for_each_context(priv, ctx)
1555 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
1556 iwlagn_commit_rxon(priv, ctx);
1557
1558 iwlagn_set_pan_params(priv);
1559}
1560