LXR linux/drivers/scsi/pas16.h

   1/*
   2 * This driver adapted from Drew Eckhardt's Trantor T128 driver
   3 *
   4 * Copyright 1993, Drew Eckhardt
   5 *      Visionary Computing
   6 *      (Unix and Linux consulting and custom programming)
   7 *      drew@colorado.edu
   8 *      +1 (303) 666-5836
   9 *
  10 *  ( Based on T128 - DISTRIBUTION RELEASE 3. ) 
  11 *
  12 * Modified to work with the Pro Audio Spectrum/Studio 16
  13 * by John Weidman.
  14 *
  15 *
  16 * For more information, please consult 
  17 *
  18 * Media Vision
  19 * (510) 770-8600
  20 * (800) 348-7116
  21 * 
  22 * and 
  23 *
  24 * NCR 5380 Family
  25 * SCSI Protocol Controller
  26 * Databook
  27 *
  28 * NCR Microelectronics
  29 * 1635 Aeroplaza Drive
  30 * Colorado Springs, CO 80916
  31 * 1+ (719) 578-3400
  32 * 1+ (800) 334-5454
  33 */
  34
  35
  36#ifndef PAS16_H
  37#define PAS16_H
  38
  39#define PAS16_PUBLIC_RELEASE 3
  40
  41#define PDEBUG_INIT     0x1
  42#define PDEBUG_TRANSFER 0x2
  43
  44#define PAS16_DEFAULT_BASE_1  0x388
  45#define PAS16_DEFAULT_BASE_2  0x384
  46#define PAS16_DEFAULT_BASE_3  0x38c
  47#define PAS16_DEFAULT_BASE_4  0x288
  48
  49#define PAS16_DEFAULT_BOARD_1_IRQ 10
  50#define PAS16_DEFAULT_BOARD_2_IRQ 12
  51#define PAS16_DEFAULT_BOARD_3_IRQ 14
  52#define PAS16_DEFAULT_BOARD_4_IRQ 15
  53
  54
  55/*
  56 * The Pro Audio Spectrum boards are I/O mapped. They use a Zilog 5380
  57 * SCSI controller, which is the equivalent of NCR's 5380.  "Pseudo-DMA"
  58 * architecture is used, where a PAL drives the DMA signals on the 5380
  59 * allowing fast, blind transfers with proper handshaking. 
  60 */
  61
  62
  63/* The Time-out Counter register is used to safe-guard against a stuck
  64 * bus (in the case of RDY driven handshake) or a stuck byte (if 16-Bit
  65 * DMA conversion is used).  The counter uses a 28.224MHz clock
  66 * divided by 14 as its clock source.  In the case of a stuck byte in
  67 * the holding register, an interrupt is generated (and mixed with the
  68 * one with the drive) using the CD-ROM interrupt pointer.
  69 */
  70 
  71#define P_TIMEOUT_COUNTER_REG   0x4000
  72#define P_TC_DISABLE    0x80    /* Set to 0 to enable timeout int. */
  73                                /* Bits D6-D0 contain timeout count */
  74
  75
  76#define P_TIMEOUT_STATUS_REG_OFFSET     0x4001
  77#define P_TS_TIM                0x80    /* check timeout status */
  78                                        /* Bits D6-D4 N/U */
  79#define P_TS_ARM_DRQ_INT        0x08    /* Arm DRQ Int.  When set high,
  80                                         * the next rising edge will
  81                                         * cause a CD-ROM interrupt.
  82                                         * When set low, the interrupt
  83                                         * will be cleared.  There is
  84                                         * no status available for
  85                                         * this interrupt.
  86                                         */
  87#define P_TS_ENABLE_TO_ERR_INTERRUPT    /* Enable timeout error int. */
  88#define P_TS_ENABLE_WAIT                /* Enable Wait */
  89
  90#define P_TS_CT                 0x01    /* clear timeout. Note: writing
  91                                         * to this register clears the
  92                                         * timeout error int. or status
  93                                         */
  94
  95
  96/*
  97 * The data register reads/writes to/from the 5380 in pseudo-DMA mode
  98 */ 
  99
 100#define P_DATA_REG_OFFSET       0x5c00  /* rw */
 101
 102#define P_STATUS_REG_OFFSET     0x5c01  /* ro */
 103#define P_ST_RDY                0x80    /* 5380 DDRQ Status */
 104
 105#define P_IRQ_STATUS            0x5c03
 106#define P_IS_IRQ                0x80    /* DIRQ status */
 107
 108#define PCB_CONFIG 0x803
 109#define MASTER_ADDRESS_PTR 0x9a01  /* Fixed position - no relo */
 110#define SYS_CONFIG_4 0x8003
 111#define WAIT_STATE 0xbc00
 112#define OPERATION_MODE_1 0xec03
 113#define IO_CONFIG_3 0xf002
 114
 115
 116#ifndef ASM
 117static int pas16_abort(Scsi_Cmnd *);
 118static int pas16_biosparam(struct scsi_device *, struct block_device *,
 119                           sector_t, int*);
 120static int pas16_detect(struct scsi_host_template *);
 121static int pas16_queue_command(struct Scsi_Host *, struct scsi_cmnd *);
 122static int pas16_bus_reset(Scsi_Cmnd *);
 123
 124#ifndef CMD_PER_LUN
 125#define CMD_PER_LUN 2
 126#endif
 127
 128#ifndef CAN_QUEUE
 129#define CAN_QUEUE 32 
 130#endif
 131
 132#define NCR5380_implementation_fields \
 133    volatile unsigned short io_port
 134
 135#define NCR5380_local_declare() \
 136    volatile unsigned short io_port
 137
 138#define NCR5380_setup(instance) \
 139    io_port = (instance)->io_port
 140
 141#define PAS16_io_port(reg) ( io_port + pas16_offset[(reg)] )
 142
 143#if !(PDEBUG & PDEBUG_TRANSFER) 
 144#define NCR5380_read(reg) ( inb(PAS16_io_port(reg)) )
 145#define NCR5380_write(reg, value) ( outb((value),PAS16_io_port(reg)) )
 146#else
 147#define NCR5380_read(reg)                                               \
 148    (((unsigned char) printk("scsi%d : read register %d at io_port %04x\n"\
 149    , instance->hostno, (reg), PAS16_io_port(reg))), inb( PAS16_io_port(reg)) )
 150
 151#define NCR5380_write(reg, value)                                       \
 152    (printk("scsi%d : write %02x to register %d at io_port %04x\n",     \
 153            instance->hostno, (value), (reg), PAS16_io_port(reg)),      \
 154    outb( (value),PAS16_io_port(reg) ) )
 155
 156#endif
 157
 158
 159#define NCR5380_intr pas16_intr
 160#define do_NCR5380_intr do_pas16_intr
 161#define NCR5380_queue_command pas16_queue_command
 162#define NCR5380_abort pas16_abort
 163#define NCR5380_bus_reset pas16_bus_reset
 164#define NCR5380_show_info pas16_show_info
 165#define NCR5380_write_info pas16_write_info
 166
 167/* 15 14 12 10 7 5 3 
 168   1101 0100 1010 1000 */
 169   
 170#define PAS16_IRQS 0xd4a8 
 171
 172#endif /* ndef ASM */
 173#endif /* PAS16_H */
 174