1
2
3
4
5
6
7
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include "meter.h"
24#include "ade7759.h"
25
26static int ade7759_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29{
30 int ret;
31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32 struct ade7759_state *st = iio_priv(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7759_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42}
43
44static int ade7759_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47{
48 int ret;
49 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50 struct ade7759_state *st = iio_priv(indio_dev);
51
52 mutex_lock(&st->buf_lock);
53 st->tx[0] = ADE7759_WRITE_REG(reg_address);
54 st->tx[1] = (value >> 8) & 0xFF;
55 st->tx[2] = value & 0xFF;
56 ret = spi_write(st->us, st->tx, 3);
57 mutex_unlock(&st->buf_lock);
58
59 return ret;
60}
61
62static int ade7759_spi_read_reg_8(struct device *dev,
63 u8 reg_address,
64 u8 *val)
65{
66 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67 struct ade7759_state *st = iio_priv(indio_dev);
68 int ret;
69
70 ret = spi_w8r8(st->us, ADE7759_READ_REG(reg_address));
71 if (ret < 0) {
72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73 reg_address);
74 return ret;
75 }
76 *val = ret;
77
78 return 0;
79}
80
81static int ade7759_spi_read_reg_16(struct device *dev,
82 u8 reg_address,
83 u16 *val)
84{
85 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86 struct ade7759_state *st = iio_priv(indio_dev);
87 int ret;
88
89 ret = spi_w8r16be(st->us, ADE7759_READ_REG(reg_address));
90 if (ret < 0) {
91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92 reg_address);
93 return ret;
94 }
95
96 *val = ret;
97
98 return 0;
99}
100
101static int ade7759_spi_read_reg_40(struct device *dev,
102 u8 reg_address,
103 u64 *val)
104{
105 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
106 struct ade7759_state *st = iio_priv(indio_dev);
107 int ret;
108 struct spi_transfer xfers[] = {
109 {
110 .tx_buf = st->tx,
111 .rx_buf = st->rx,
112 .bits_per_word = 8,
113 .len = 6,
114 },
115 };
116
117 mutex_lock(&st->buf_lock);
118 st->tx[0] = ADE7759_READ_REG(reg_address);
119 memset(&st->tx[1], 0 , 5);
120
121 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
122 if (ret) {
123 dev_err(&st->us->dev, "problem when reading 40 bit register 0x%02X",
124 reg_address);
125 goto error_ret;
126 }
127 *val = ((u64)st->rx[1] << 32) | (st->rx[2] << 24) |
128 (st->rx[3] << 16) | (st->rx[4] << 8) | st->rx[5];
129
130error_ret:
131 mutex_unlock(&st->buf_lock);
132 return ret;
133}
134
135static ssize_t ade7759_read_8bit(struct device *dev,
136 struct device_attribute *attr,
137 char *buf)
138{
139 int ret;
140 u8 val = 0;
141 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
142
143 ret = ade7759_spi_read_reg_8(dev, this_attr->address, &val);
144 if (ret)
145 return ret;
146
147 return sprintf(buf, "%u\n", val);
148}
149
150static ssize_t ade7759_read_16bit(struct device *dev,
151 struct device_attribute *attr,
152 char *buf)
153{
154 int ret;
155 u16 val = 0;
156 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
157
158 ret = ade7759_spi_read_reg_16(dev, this_attr->address, &val);
159 if (ret)
160 return ret;
161
162 return sprintf(buf, "%u\n", val);
163}
164
165static ssize_t ade7759_read_40bit(struct device *dev,
166 struct device_attribute *attr,
167 char *buf)
168{
169 int ret;
170 u64 val = 0;
171 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
172
173 ret = ade7759_spi_read_reg_40(dev, this_attr->address, &val);
174 if (ret)
175 return ret;
176
177 return sprintf(buf, "%llu\n", val);
178}
179
180static ssize_t ade7759_write_8bit(struct device *dev,
181 struct device_attribute *attr,
182 const char *buf,
183 size_t len)
184{
185 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
186 int ret;
187 u8 val;
188
189 ret = kstrtou8(buf, 10, &val);
190 if (ret)
191 goto error_ret;
192 ret = ade7759_spi_write_reg_8(dev, this_attr->address, val);
193
194error_ret:
195 return ret ? ret : len;
196}
197
198static ssize_t ade7759_write_16bit(struct device *dev,
199 struct device_attribute *attr,
200 const char *buf,
201 size_t len)
202{
203 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
204 int ret;
205 u16 val;
206
207 ret = kstrtou16(buf, 10, &val);
208 if (ret)
209 goto error_ret;
210 ret = ade7759_spi_write_reg_16(dev, this_attr->address, val);
211
212error_ret:
213 return ret ? ret : len;
214}
215
216static int ade7759_reset(struct device *dev)
217{
218 int ret;
219 u16 val;
220 ade7759_spi_read_reg_16(dev,
221 ADE7759_MODE,
222 &val);
223 val |= 1 << 6;
224 ret = ade7759_spi_write_reg_16(dev,
225 ADE7759_MODE,
226 val);
227
228 return ret;
229}
230
231static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
232static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
233 ade7759_read_16bit,
234 ade7759_write_16bit,
235 ADE7759_CFDEN);
236static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
237 ade7759_read_8bit,
238 ade7759_write_8bit,
239 ADE7759_CFNUM);
240static IIO_DEV_ATTR_CHKSUM(ade7759_read_8bit, ADE7759_CHKSUM);
241static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
242 ade7759_read_16bit,
243 ade7759_write_16bit,
244 ADE7759_PHCAL);
245static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
246 ade7759_read_16bit,
247 ade7759_write_16bit,
248 ADE7759_APOS);
249static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
250 ade7759_read_8bit,
251 ade7759_write_8bit,
252 ADE7759_SAGCYC);
253static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
254 ade7759_read_8bit,
255 ade7759_write_8bit,
256 ADE7759_SAGLVL);
257static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
258 ade7759_read_8bit,
259 ade7759_write_8bit,
260 ADE7759_LINECYC);
261static IIO_DEV_ATTR_LENERGY(ade7759_read_40bit, ADE7759_LENERGY);
262static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
263 ade7759_read_8bit,
264 ade7759_write_8bit,
265 ADE7759_GAIN);
266static IIO_DEV_ATTR_ACTIVE_POWER_GAIN(S_IWUSR | S_IRUGO,
267 ade7759_read_16bit,
268 ade7759_write_16bit,
269 ADE7759_APGAIN);
270static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
271 ade7759_read_8bit,
272 ade7759_write_8bit,
273 ADE7759_CH1OS);
274static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
275 ade7759_read_8bit,
276 ade7759_write_8bit,
277 ADE7759_CH2OS);
278
279static int ade7759_set_irq(struct device *dev, bool enable)
280{
281 int ret;
282 u8 irqen;
283 ret = ade7759_spi_read_reg_8(dev, ADE7759_IRQEN, &irqen);
284 if (ret)
285 goto error_ret;
286
287 if (enable)
288 irqen |= 1 << 3;
289
290 else
291 irqen &= ~(1 << 3);
292
293 ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
294
295error_ret:
296 return ret;
297}
298
299
300static int ade7759_stop_device(struct device *dev)
301{
302 u16 val;
303
304 ade7759_spi_read_reg_16(dev,
305 ADE7759_MODE,
306 &val);
307 val |= 1 << 4;
308
309 return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
310}
311
312static int ade7759_initial_setup(struct iio_dev *indio_dev)
313{
314 int ret;
315 struct ade7759_state *st = iio_priv(indio_dev);
316 struct device *dev = &indio_dev->dev;
317
318
319 st->us->mode = SPI_MODE_3;
320 spi_setup(st->us);
321
322
323 ret = ade7759_set_irq(dev, false);
324 if (ret) {
325 dev_err(dev, "disable irq failed");
326 goto err_ret;
327 }
328
329 ade7759_reset(dev);
330 msleep(ADE7759_STARTUP_DELAY);
331
332err_ret:
333 return ret;
334}
335
336static ssize_t ade7759_read_frequency(struct device *dev,
337 struct device_attribute *attr,
338 char *buf)
339{
340 int ret;
341 u16 t;
342 int sps;
343 ret = ade7759_spi_read_reg_16(dev,
344 ADE7759_MODE,
345 &t);
346 if (ret)
347 return ret;
348
349 t = (t >> 3) & 0x3;
350 sps = 27900 / (1 + t);
351
352 return sprintf(buf, "%d\n", sps);
353}
354
355static ssize_t ade7759_write_frequency(struct device *dev,
356 struct device_attribute *attr,
357 const char *buf,
358 size_t len)
359{
360 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
361 struct ade7759_state *st = iio_priv(indio_dev);
362 u16 val;
363 int ret;
364 u16 reg, t;
365
366 ret = kstrtou16(buf, 10, &val);
367 if (ret)
368 return ret;
369 if (val == 0)
370 return -EINVAL;
371
372 mutex_lock(&indio_dev->mlock);
373
374 t = (27900 / val);
375 if (t > 0)
376 t--;
377
378 if (t > 1)
379 st->us->max_speed_hz = ADE7759_SPI_SLOW;
380 else
381 st->us->max_speed_hz = ADE7759_SPI_FAST;
382
383 ret = ade7759_spi_read_reg_16(dev, ADE7759_MODE, ®);
384 if (ret)
385 goto out;
386
387 reg &= ~(3 << 13);
388 reg |= t << 13;
389
390 ret = ade7759_spi_write_reg_16(dev, ADE7759_MODE, reg);
391
392out:
393 mutex_unlock(&indio_dev->mlock);
394
395 return ret ? ret : len;
396}
397static IIO_DEV_ATTR_TEMP_RAW(ade7759_read_8bit);
398static IIO_CONST_ATTR(in_temp_offset, "70 C");
399static IIO_CONST_ATTR(in_temp_scale, "1 C");
400
401static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
402 ade7759_read_frequency,
403 ade7759_write_frequency);
404
405static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
406
407static struct attribute *ade7759_attributes[] = {
408 &iio_dev_attr_in_temp_raw.dev_attr.attr,
409 &iio_const_attr_in_temp_offset.dev_attr.attr,
410 &iio_const_attr_in_temp_scale.dev_attr.attr,
411 &iio_dev_attr_sampling_frequency.dev_attr.attr,
412 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
413 &iio_dev_attr_phcal.dev_attr.attr,
414 &iio_dev_attr_cfden.dev_attr.attr,
415 &iio_dev_attr_aenergy.dev_attr.attr,
416 &iio_dev_attr_cfnum.dev_attr.attr,
417 &iio_dev_attr_apos.dev_attr.attr,
418 &iio_dev_attr_sagcyc.dev_attr.attr,
419 &iio_dev_attr_saglvl.dev_attr.attr,
420 &iio_dev_attr_linecyc.dev_attr.attr,
421 &iio_dev_attr_lenergy.dev_attr.attr,
422 &iio_dev_attr_chksum.dev_attr.attr,
423 &iio_dev_attr_pga_gain.dev_attr.attr,
424 &iio_dev_attr_active_power_gain.dev_attr.attr,
425 &iio_dev_attr_choff_1.dev_attr.attr,
426 &iio_dev_attr_choff_2.dev_attr.attr,
427 NULL,
428};
429
430static const struct attribute_group ade7759_attribute_group = {
431 .attrs = ade7759_attributes,
432};
433
434static const struct iio_info ade7759_info = {
435 .attrs = &ade7759_attribute_group,
436 .driver_module = THIS_MODULE,
437};
438
439static int ade7759_probe(struct spi_device *spi)
440{
441 int ret;
442 struct ade7759_state *st;
443 struct iio_dev *indio_dev;
444
445
446 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
447 if (!indio_dev)
448 return -ENOMEM;
449
450 spi_set_drvdata(spi, indio_dev);
451
452 st = iio_priv(indio_dev);
453 st->us = spi;
454 mutex_init(&st->buf_lock);
455 indio_dev->name = spi->dev.driver->name;
456 indio_dev->dev.parent = &spi->dev;
457 indio_dev->info = &ade7759_info;
458 indio_dev->modes = INDIO_DIRECT_MODE;
459
460
461 ret = ade7759_initial_setup(indio_dev);
462 if (ret)
463 return ret;
464
465 ret = iio_device_register(indio_dev);
466 if (ret)
467 return ret;
468
469 return 0;
470}
471
472
473static int ade7759_remove(struct spi_device *spi)
474{
475 struct iio_dev *indio_dev = spi_get_drvdata(spi);
476
477 iio_device_unregister(indio_dev);
478 ade7759_stop_device(&indio_dev->dev);
479
480 return 0;
481}
482
483static struct spi_driver ade7759_driver = {
484 .driver = {
485 .name = "ade7759",
486 .owner = THIS_MODULE,
487 },
488 .probe = ade7759_probe,
489 .remove = ade7759_remove,
490};
491module_spi_driver(ade7759_driver);
492
493MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
494MODULE_DESCRIPTION("Analog Devices ADE7759 Active Energy Metering IC Driver");
495MODULE_LICENSE("GPL v2");
496MODULE_ALIAS("spi:ad7759");
497
