1/* 2 * Copyright (C) 2006 Intel Corp. 3 * Tom Long Nguyen (tom.l.nguyen@intel.com) 4 * Zhang Yanmin (yanmin.zhang@intel.com) 5 */ 6 7#ifndef _AER_H_ 8#define _AER_H_ 9 10#define AER_NONFATAL 0 11#define AER_FATAL 1 12#define AER_CORRECTABLE 2 13 14struct aer_header_log_regs { 15 unsigned int dw0; 16 unsigned int dw1; 17 unsigned int dw2; 18 unsigned int dw3; 19}; 20 21struct aer_capability_regs { 22 u32 header; 23 u32 uncor_status; 24 u32 uncor_mask; 25 u32 uncor_severity; 26 u32 cor_status; 27 u32 cor_mask; 28 u32 cap_control; 29 struct aer_header_log_regs header_log; 30 u32 root_command; 31 u32 root_status; 32 u16 cor_err_source; 33 u16 uncor_err_source; 34}; 35 36#if defined(CONFIG_PCIEAER) 37/* pci-e port driver needs this function to enable aer */ 38int pci_enable_pcie_error_reporting(struct pci_dev *dev); 39int pci_disable_pcie_error_reporting(struct pci_dev *dev); 40int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 41#else 42static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) 43{ 44 return -EINVAL; 45} 46static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev) 47{ 48 return -EINVAL; 49} 50static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 51{ 52 return -EINVAL; 53} 54#endif 55 56void cper_print_aer(struct pci_dev *dev, int cper_severity, 57 struct aer_capability_regs *aer); 58int cper_severity_to_aer(int cper_severity); 59void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, 60 int severity, 61 struct aer_capability_regs *aer_regs); 62#endif //_AER_H_ 63 64