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29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <asm/byteorder.h>
36
37
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42
43 ATA_MAX_DEVICES = 2,
44 ATA_MAX_PRD = 256,
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_LBA48 = 65535,
49 ATA_MAX_SECTORS_TAPE = 65535,
50
51 ATA_ID_WORDS = 256,
52 ATA_ID_CONFIG = 0,
53 ATA_ID_CYLS = 1,
54 ATA_ID_HEADS = 3,
55 ATA_ID_SECTORS = 6,
56 ATA_ID_SERNO = 10,
57 ATA_ID_BUF_SIZE = 21,
58 ATA_ID_FW_REV = 23,
59 ATA_ID_PROD = 27,
60 ATA_ID_MAX_MULTSECT = 47,
61 ATA_ID_DWORD_IO = 48,
62 ATA_ID_CAPABILITY = 49,
63 ATA_ID_OLD_PIO_MODES = 51,
64 ATA_ID_OLD_DMA_MODES = 52,
65 ATA_ID_FIELD_VALID = 53,
66 ATA_ID_CUR_CYLS = 54,
67 ATA_ID_CUR_HEADS = 55,
68 ATA_ID_CUR_SECTORS = 56,
69 ATA_ID_MULTSECT = 59,
70 ATA_ID_LBA_CAPACITY = 60,
71 ATA_ID_SWDMA_MODES = 62,
72 ATA_ID_MWDMA_MODES = 63,
73 ATA_ID_PIO_MODES = 64,
74 ATA_ID_EIDE_DMA_MIN = 65,
75 ATA_ID_EIDE_DMA_TIME = 66,
76 ATA_ID_EIDE_PIO = 67,
77 ATA_ID_EIDE_PIO_IORDY = 68,
78 ATA_ID_ADDITIONAL_SUPP = 69,
79 ATA_ID_QUEUE_DEPTH = 75,
80 ATA_ID_SATA_CAPABILITY = 76,
81 ATA_ID_SATA_CAPABILITY_2 = 77,
82 ATA_ID_FEATURE_SUPP = 78,
83 ATA_ID_MAJOR_VER = 80,
84 ATA_ID_COMMAND_SET_1 = 82,
85 ATA_ID_COMMAND_SET_2 = 83,
86 ATA_ID_CFSSE = 84,
87 ATA_ID_CFS_ENABLE_1 = 85,
88 ATA_ID_CFS_ENABLE_2 = 86,
89 ATA_ID_CSF_DEFAULT = 87,
90 ATA_ID_UDMA_MODES = 88,
91 ATA_ID_HW_CONFIG = 93,
92 ATA_ID_SPG = 98,
93 ATA_ID_LBA_CAPACITY_2 = 100,
94 ATA_ID_SECTOR_SIZE = 106,
95 ATA_ID_WWN = 108,
96 ATA_ID_LOGICAL_SECTOR_SIZE = 117,
97 ATA_ID_LAST_LUN = 126,
98 ATA_ID_DLF = 128,
99 ATA_ID_CSFO = 129,
100 ATA_ID_CFA_POWER = 160,
101 ATA_ID_CFA_KEY_MGMT = 162,
102 ATA_ID_CFA_MODES = 163,
103 ATA_ID_DATA_SET_MGMT = 169,
104 ATA_ID_ROT_SPEED = 217,
105 ATA_ID_PIO4 = (1 << 1),
106
107 ATA_ID_SERNO_LEN = 20,
108 ATA_ID_FW_REV_LEN = 8,
109 ATA_ID_PROD_LEN = 40,
110 ATA_ID_WWN_LEN = 8,
111
112 ATA_PCI_CTL_OFS = 2,
113
114 ATA_PIO0 = (1 << 0),
115 ATA_PIO1 = ATA_PIO0 | (1 << 1),
116 ATA_PIO2 = ATA_PIO1 | (1 << 2),
117 ATA_PIO3 = ATA_PIO2 | (1 << 3),
118 ATA_PIO4 = ATA_PIO3 | (1 << 4),
119 ATA_PIO5 = ATA_PIO4 | (1 << 5),
120 ATA_PIO6 = ATA_PIO5 | (1 << 6),
121
122 ATA_PIO4_ONLY = (1 << 4),
123
124 ATA_SWDMA0 = (1 << 0),
125 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
126 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
127
128 ATA_SWDMA2_ONLY = (1 << 2),
129
130 ATA_MWDMA0 = (1 << 0),
131 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
132 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
133 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
134 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
135
136 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
137 ATA_MWDMA2_ONLY = (1 << 2),
138
139 ATA_UDMA0 = (1 << 0),
140 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
141 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
142 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
143 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
144 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
145 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
146 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
147
148
149 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
150
151 ATA_UDMA_MASK_40C = ATA_UDMA2,
152
153
154 ATA_PRD_SZ = 8,
155 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
156 ATA_PRD_EOT = (1 << 31),
157
158 ATA_DMA_TABLE_OFS = 4,
159 ATA_DMA_STATUS = 2,
160 ATA_DMA_CMD = 0,
161 ATA_DMA_WR = (1 << 3),
162 ATA_DMA_START = (1 << 0),
163 ATA_DMA_INTR = (1 << 2),
164 ATA_DMA_ERR = (1 << 1),
165 ATA_DMA_ACTIVE = (1 << 0),
166
167
168 ATA_HOB = (1 << 7),
169 ATA_NIEN = (1 << 1),
170 ATA_LBA = (1 << 6),
171 ATA_DEV1 = (1 << 4),
172 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
173 ATA_DEVCTL_OBS = (1 << 3),
174 ATA_BUSY = (1 << 7),
175 ATA_DRDY = (1 << 6),
176 ATA_DF = (1 << 5),
177 ATA_DSC = (1 << 4),
178 ATA_DRQ = (1 << 3),
179 ATA_CORR = (1 << 2),
180 ATA_IDX = (1 << 1),
181 ATA_ERR = (1 << 0),
182 ATA_SRST = (1 << 2),
183 ATA_ICRC = (1 << 7),
184 ATA_BBK = ATA_ICRC,
185 ATA_UNC = (1 << 6),
186 ATA_MC = (1 << 5),
187 ATA_IDNF = (1 << 4),
188 ATA_MCR = (1 << 3),
189 ATA_ABORTED = (1 << 2),
190 ATA_TRK0NF = (1 << 1),
191 ATA_AMNF = (1 << 0),
192 ATAPI_LFS = 0xF0,
193 ATAPI_EOM = ATA_TRK0NF,
194 ATAPI_ILI = ATA_AMNF,
195 ATAPI_IO = (1 << 1),
196 ATAPI_COD = (1 << 0),
197
198
199 ATA_REG_DATA = 0x00,
200 ATA_REG_ERR = 0x01,
201 ATA_REG_NSECT = 0x02,
202 ATA_REG_LBAL = 0x03,
203 ATA_REG_LBAM = 0x04,
204 ATA_REG_LBAH = 0x05,
205 ATA_REG_DEVICE = 0x06,
206 ATA_REG_STATUS = 0x07,
207
208 ATA_REG_FEATURE = ATA_REG_ERR,
209 ATA_REG_CMD = ATA_REG_STATUS,
210 ATA_REG_BYTEL = ATA_REG_LBAM,
211 ATA_REG_BYTEH = ATA_REG_LBAH,
212 ATA_REG_DEVSEL = ATA_REG_DEVICE,
213 ATA_REG_IRQ = ATA_REG_NSECT,
214
215
216 ATA_CMD_DEV_RESET = 0x08,
217 ATA_CMD_CHK_POWER = 0xE5,
218 ATA_CMD_STANDBY = 0xE2,
219 ATA_CMD_IDLE = 0xE3,
220 ATA_CMD_EDD = 0x90,
221 ATA_CMD_DOWNLOAD_MICRO = 0x92,
222 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
223 ATA_CMD_NOP = 0x00,
224 ATA_CMD_FLUSH = 0xE7,
225 ATA_CMD_FLUSH_EXT = 0xEA,
226 ATA_CMD_ID_ATA = 0xEC,
227 ATA_CMD_ID_ATAPI = 0xA1,
228 ATA_CMD_SERVICE = 0xA2,
229 ATA_CMD_READ = 0xC8,
230 ATA_CMD_READ_EXT = 0x25,
231 ATA_CMD_READ_QUEUED = 0x26,
232 ATA_CMD_READ_STREAM_EXT = 0x2B,
233 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
234 ATA_CMD_WRITE = 0xCA,
235 ATA_CMD_WRITE_EXT = 0x35,
236 ATA_CMD_WRITE_QUEUED = 0x36,
237 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
238 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
239 ATA_CMD_WRITE_FUA_EXT = 0x3D,
240 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
241 ATA_CMD_FPDMA_READ = 0x60,
242 ATA_CMD_FPDMA_WRITE = 0x61,
243 ATA_CMD_FPDMA_SEND = 0x64,
244 ATA_CMD_FPDMA_RECV = 0x65,
245 ATA_CMD_PIO_READ = 0x20,
246 ATA_CMD_PIO_READ_EXT = 0x24,
247 ATA_CMD_PIO_WRITE = 0x30,
248 ATA_CMD_PIO_WRITE_EXT = 0x34,
249 ATA_CMD_READ_MULTI = 0xC4,
250 ATA_CMD_READ_MULTI_EXT = 0x29,
251 ATA_CMD_WRITE_MULTI = 0xC5,
252 ATA_CMD_WRITE_MULTI_EXT = 0x39,
253 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
254 ATA_CMD_SET_FEATURES = 0xEF,
255 ATA_CMD_SET_MULTI = 0xC6,
256 ATA_CMD_PACKET = 0xA0,
257 ATA_CMD_VERIFY = 0x40,
258 ATA_CMD_VERIFY_EXT = 0x42,
259 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
260 ATA_CMD_STANDBYNOW1 = 0xE0,
261 ATA_CMD_IDLEIMMEDIATE = 0xE1,
262 ATA_CMD_SLEEP = 0xE6,
263 ATA_CMD_INIT_DEV_PARAMS = 0x91,
264 ATA_CMD_READ_NATIVE_MAX = 0xF8,
265 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
266 ATA_CMD_SET_MAX = 0xF9,
267 ATA_CMD_SET_MAX_EXT = 0x37,
268 ATA_CMD_READ_LOG_EXT = 0x2F,
269 ATA_CMD_WRITE_LOG_EXT = 0x3F,
270 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
271 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
272 ATA_CMD_TRUSTED_NONDATA = 0x5B,
273 ATA_CMD_TRUSTED_RCV = 0x5C,
274 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
275 ATA_CMD_TRUSTED_SND = 0x5E,
276 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
277 ATA_CMD_PMP_READ = 0xE4,
278 ATA_CMD_PMP_READ_DMA = 0xE9,
279 ATA_CMD_PMP_WRITE = 0xE8,
280 ATA_CMD_PMP_WRITE_DMA = 0xEB,
281 ATA_CMD_CONF_OVERLAY = 0xB1,
282 ATA_CMD_SEC_SET_PASS = 0xF1,
283 ATA_CMD_SEC_UNLOCK = 0xF2,
284 ATA_CMD_SEC_ERASE_PREP = 0xF3,
285 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
286 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
287 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
288 ATA_CMD_CONFIG_STREAM = 0x51,
289 ATA_CMD_SMART = 0xB0,
290 ATA_CMD_MEDIA_LOCK = 0xDE,
291 ATA_CMD_MEDIA_UNLOCK = 0xDF,
292 ATA_CMD_DSM = 0x06,
293 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
294 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
295 ATA_CMD_CFA_WRITE_NE = 0x38,
296 ATA_CMD_CFA_TRANS_SECT = 0x87,
297 ATA_CMD_CFA_ERASE = 0xC0,
298 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
299 ATA_CMD_REQ_SENSE_DATA = 0x0B,
300 ATA_CMD_SANITIZE_DEVICE = 0xB4,
301
302
303 ATA_CMD_RESTORE = 0x10,
304
305
306 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
307 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
308
309
310 ATA_LOG_SATA_NCQ = 0x10,
311 ATA_LOG_NCQ_SEND_RECV = 0x13,
312 ATA_LOG_SATA_ID_DEV_DATA = 0x30,
313 ATA_LOG_SATA_SETTINGS = 0x08,
314 ATA_LOG_DEVSLP_OFFSET = 0x30,
315 ATA_LOG_DEVSLP_SIZE = 0x08,
316 ATA_LOG_DEVSLP_MDAT = 0x00,
317 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
318 ATA_LOG_DEVSLP_DETO = 0x01,
319 ATA_LOG_DEVSLP_VALID = 0x07,
320 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
321
322
323 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
324 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
325 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
326 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
327 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
328 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
329 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x10,
330
331
332 ATA_CMD_READ_LONG = 0x22,
333 ATA_CMD_READ_LONG_ONCE = 0x23,
334 ATA_CMD_WRITE_LONG = 0x32,
335 ATA_CMD_WRITE_LONG_ONCE = 0x33,
336
337
338 SETFEATURES_XFER = 0x03,
339 XFER_UDMA_7 = 0x47,
340 XFER_UDMA_6 = 0x46,
341 XFER_UDMA_5 = 0x45,
342 XFER_UDMA_4 = 0x44,
343 XFER_UDMA_3 = 0x43,
344 XFER_UDMA_2 = 0x42,
345 XFER_UDMA_1 = 0x41,
346 XFER_UDMA_0 = 0x40,
347 XFER_MW_DMA_4 = 0x24,
348 XFER_MW_DMA_3 = 0x23,
349 XFER_MW_DMA_2 = 0x22,
350 XFER_MW_DMA_1 = 0x21,
351 XFER_MW_DMA_0 = 0x20,
352 XFER_SW_DMA_2 = 0x12,
353 XFER_SW_DMA_1 = 0x11,
354 XFER_SW_DMA_0 = 0x10,
355 XFER_PIO_6 = 0x0E,
356 XFER_PIO_5 = 0x0D,
357 XFER_PIO_4 = 0x0C,
358 XFER_PIO_3 = 0x0B,
359 XFER_PIO_2 = 0x0A,
360 XFER_PIO_1 = 0x09,
361 XFER_PIO_0 = 0x08,
362 XFER_PIO_SLOW = 0x00,
363
364 SETFEATURES_WC_ON = 0x02,
365 SETFEATURES_WC_OFF = 0x82,
366
367
368 SETFEATURES_AAM_ON = 0x42,
369 SETFEATURES_AAM_OFF = 0xC2,
370
371 SETFEATURES_SPINUP = 0x07,
372
373 SETFEATURES_SATA_ENABLE = 0x10,
374 SETFEATURES_SATA_DISABLE = 0x90,
375
376
377 SATA_FPDMA_OFFSET = 0x01,
378 SATA_FPDMA_AA = 0x02,
379 SATA_DIPM = 0x03,
380 SATA_FPDMA_IN_ORDER = 0x04,
381 SATA_AN = 0x05,
382 SATA_SSP = 0x06,
383 SATA_DEVSLP = 0x09,
384
385
386 ATA_SET_MAX_ADDR = 0x00,
387 ATA_SET_MAX_PASSWD = 0x01,
388 ATA_SET_MAX_LOCK = 0x02,
389 ATA_SET_MAX_UNLOCK = 0x03,
390 ATA_SET_MAX_FREEZE_LOCK = 0x04,
391
392
393 ATA_DCO_RESTORE = 0xC0,
394 ATA_DCO_FREEZE_LOCK = 0xC1,
395 ATA_DCO_IDENTIFY = 0xC2,
396 ATA_DCO_SET = 0xC3,
397
398
399 ATA_SMART_ENABLE = 0xD8,
400 ATA_SMART_READ_VALUES = 0xD0,
401 ATA_SMART_READ_THRESHOLDS = 0xD1,
402
403
404 ATA_DSM_TRIM = 0x01,
405
406
407 ATA_SMART_LBAM_PASS = 0x4F,
408 ATA_SMART_LBAH_PASS = 0xC2,
409
410
411 ATAPI_PKT_DMA = (1 << 0),
412 ATAPI_DMADIR = (1 << 2),
413
414 ATAPI_CDB_LEN = 16,
415
416
417 SATA_PMP_MAX_PORTS = 15,
418 SATA_PMP_CTRL_PORT = 15,
419
420 SATA_PMP_GSCR_DWORDS = 128,
421 SATA_PMP_GSCR_PROD_ID = 0,
422 SATA_PMP_GSCR_REV = 1,
423 SATA_PMP_GSCR_PORT_INFO = 2,
424 SATA_PMP_GSCR_ERROR = 32,
425 SATA_PMP_GSCR_ERROR_EN = 33,
426 SATA_PMP_GSCR_FEAT = 64,
427 SATA_PMP_GSCR_FEAT_EN = 96,
428
429 SATA_PMP_PSCR_STATUS = 0,
430 SATA_PMP_PSCR_ERROR = 1,
431 SATA_PMP_PSCR_CONTROL = 2,
432
433 SATA_PMP_FEAT_BIST = (1 << 0),
434 SATA_PMP_FEAT_PMREQ = (1 << 1),
435 SATA_PMP_FEAT_DYNSSC = (1 << 2),
436 SATA_PMP_FEAT_NOTIFY = (1 << 3),
437
438
439 ATA_CBL_NONE = 0,
440 ATA_CBL_PATA40 = 1,
441 ATA_CBL_PATA80 = 2,
442 ATA_CBL_PATA40_SHORT = 3,
443 ATA_CBL_PATA_UNK = 4,
444 ATA_CBL_PATA_IGN = 5,
445 ATA_CBL_SATA = 6,
446
447
448 SCR_STATUS = 0,
449 SCR_ERROR = 1,
450 SCR_CONTROL = 2,
451 SCR_ACTIVE = 3,
452 SCR_NOTIFICATION = 4,
453
454
455 SERR_DATA_RECOVERED = (1 << 0),
456 SERR_COMM_RECOVERED = (1 << 1),
457 SERR_DATA = (1 << 8),
458 SERR_PERSISTENT = (1 << 9),
459 SERR_PROTOCOL = (1 << 10),
460 SERR_INTERNAL = (1 << 11),
461 SERR_PHYRDY_CHG = (1 << 16),
462 SERR_PHY_INT_ERR = (1 << 17),
463 SERR_COMM_WAKE = (1 << 18),
464 SERR_10B_8B_ERR = (1 << 19),
465 SERR_DISPARITY = (1 << 20),
466 SERR_CRC = (1 << 21),
467 SERR_HANDSHAKE = (1 << 22),
468 SERR_LINK_SEQ_ERR = (1 << 23),
469 SERR_TRANS_ST_ERROR = (1 << 24),
470 SERR_UNRECOG_FIS = (1 << 25),
471 SERR_DEV_XCHG = (1 << 26),
472};
473
474enum ata_tf_protocols {
475
476 ATA_PROT_UNKNOWN,
477 ATA_PROT_NODATA,
478 ATA_PROT_PIO,
479 ATA_PROT_DMA,
480 ATA_PROT_NCQ,
481 ATAPI_PROT_NODATA,
482 ATAPI_PROT_PIO,
483 ATAPI_PROT_DMA,
484};
485
486enum ata_ioctls {
487 ATA_IOC_GET_IO32 = 0x309,
488 ATA_IOC_SET_IO32 = 0x324,
489};
490
491
492
493struct ata_bmdma_prd {
494 __le32 addr;
495 __le32 flags_len;
496};
497
498
499
500
501#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
502#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
503#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
504#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
505#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
506#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
507#define ata_id_has_atapi_AN(id) \
508 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
509 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
510 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
511#define ata_id_has_fpdma_aa(id) \
512 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
513 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
514 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
515#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
516#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
517#define ata_id_u32(id,n) \
518 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
519#define ata_id_u64(id,n) \
520 ( ((u64) (id)[(n) + 3] << 48) | \
521 ((u64) (id)[(n) + 2] << 32) | \
522 ((u64) (id)[(n) + 1] << 16) | \
523 ((u64) (id)[(n) + 0]) )
524
525#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
526#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
527#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
528
529static inline bool ata_id_has_hipm(const u16 *id)
530{
531 u16 val = id[ATA_ID_SATA_CAPABILITY];
532
533 if (val == 0 || val == 0xffff)
534 return false;
535
536 return val & (1 << 9);
537}
538
539static inline bool ata_id_has_dipm(const u16 *id)
540{
541 u16 val = id[ATA_ID_FEATURE_SUPP];
542
543 if (val == 0 || val == 0xffff)
544 return false;
545
546 return val & (1 << 3);
547}
548
549
550static inline bool ata_id_has_fua(const u16 *id)
551{
552 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
553 return false;
554 return id[ATA_ID_CFSSE] & (1 << 6);
555}
556
557static inline bool ata_id_has_flush(const u16 *id)
558{
559 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
560 return false;
561 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
562}
563
564static inline bool ata_id_flush_enabled(const u16 *id)
565{
566 if (ata_id_has_flush(id) == 0)
567 return false;
568 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
569 return false;
570 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
571}
572
573static inline bool ata_id_has_flush_ext(const u16 *id)
574{
575 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
576 return false;
577 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
578}
579
580static inline bool ata_id_flush_ext_enabled(const u16 *id)
581{
582 if (ata_id_has_flush_ext(id) == 0)
583 return false;
584 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
585 return false;
586
587
588
589
590 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
591}
592
593static inline u32 ata_id_logical_sector_size(const u16 *id)
594{
595
596
597
598
599 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
600 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
601 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
602 return ATA_SECT_SIZE;
603}
604
605static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
606{
607
608
609
610
611 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
612 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
613 return 0;
614}
615
616
617
618
619
620
621
622
623
624
625static inline u16 ata_id_logical_sector_offset(const u16 *id,
626 u8 log2_per_phys)
627{
628 u16 word_209 = id[209];
629
630 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
631 u16 first = word_209 & 0x3fff;
632 if (first > 0)
633 return (1 << log2_per_phys) - first;
634 }
635 return 0;
636}
637
638static inline bool ata_id_has_lba48(const u16 *id)
639{
640 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
641 return false;
642 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
643 return false;
644 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
645}
646
647static inline bool ata_id_lba48_enabled(const u16 *id)
648{
649 if (ata_id_has_lba48(id) == 0)
650 return false;
651 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
652 return false;
653 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
654}
655
656static inline bool ata_id_hpa_enabled(const u16 *id)
657{
658
659 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
660 return false;
661
662 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
663 return false;
664
665 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
666 return false;
667 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
668}
669
670static inline bool ata_id_has_wcache(const u16 *id)
671{
672
673 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
674 return false;
675 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
676}
677
678static inline bool ata_id_has_pm(const u16 *id)
679{
680 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
681 return false;
682 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
683}
684
685static inline bool ata_id_rahead_enabled(const u16 *id)
686{
687 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
688 return false;
689 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
690}
691
692static inline bool ata_id_wcache_enabled(const u16 *id)
693{
694 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
695 return false;
696 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
697}
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712static inline unsigned int ata_id_major_version(const u16 *id)
713{
714 unsigned int mver;
715
716 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
717 return 0;
718
719 for (mver = 14; mver >= 1; mver--)
720 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
721 break;
722 return mver;
723}
724
725static inline bool ata_id_is_sata(const u16 *id)
726{
727
728
729
730
731
732
733 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
734 return true;
735 return false;
736}
737
738static inline bool ata_id_has_tpm(const u16 *id)
739{
740
741 if (ata_id_major_version(id) < 8)
742 return false;
743 if ((id[48] & 0xC000) != 0x4000)
744 return false;
745 return id[48] & (1 << 0);
746}
747
748static inline bool ata_id_has_dword_io(const u16 *id)
749{
750
751 if (ata_id_major_version(id) > 7)
752 return false;
753 return id[ATA_ID_DWORD_IO] & (1 << 0);
754}
755
756static inline bool ata_id_has_unload(const u16 *id)
757{
758 if (ata_id_major_version(id) >= 7 &&
759 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
760 id[ATA_ID_CFSSE] & (1 << 13))
761 return true;
762 return false;
763}
764
765static inline bool ata_id_has_wwn(const u16 *id)
766{
767 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
768}
769
770static inline int ata_id_form_factor(const u16 *id)
771{
772 u16 val = id[168];
773
774 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
775 return 0;
776
777 val &= 0xf;
778
779 if (val > 5)
780 return 0;
781
782 return val;
783}
784
785static inline int ata_id_rotation_rate(const u16 *id)
786{
787 u16 val = id[217];
788
789 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
790 return 0;
791
792 if (val > 1 && val < 0x401)
793 return 0;
794
795 return val;
796}
797
798static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
799{
800 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
801}
802
803static inline bool ata_id_has_trim(const u16 *id)
804{
805 if (ata_id_major_version(id) >= 7 &&
806 (id[ATA_ID_DATA_SET_MGMT] & 1))
807 return true;
808 return false;
809}
810
811static inline bool ata_id_has_zero_after_trim(const u16 *id)
812{
813
814 if (ata_id_has_trim(id) &&
815 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
816 return true;
817
818 return false;
819}
820
821static inline bool ata_id_current_chs_valid(const u16 *id)
822{
823
824
825
826 return (id[ATA_ID_FIELD_VALID] & 1) &&
827 id[ATA_ID_CUR_CYLS] &&
828 id[ATA_ID_CUR_HEADS] &&
829 id[ATA_ID_CUR_HEADS] <= 16 &&
830 id[ATA_ID_CUR_SECTORS];
831}
832
833static inline bool ata_id_is_cfa(const u16 *id)
834{
835 if ((id[ATA_ID_CONFIG] == 0x848A) ||
836 (id[ATA_ID_CONFIG] == 0x844A))
837 return true;
838
839
840
841
842
843
844
845
846 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
847}
848
849static inline bool ata_id_is_ssd(const u16 *id)
850{
851 return id[ATA_ID_ROT_SPEED] == 0x01;
852}
853
854static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
855{
856
857 if (pio > 4 && ata_id_is_cfa(id))
858 return false;
859
860 if (pio > 2)
861 return true;
862
863 return ata_id_has_iordy(id);
864}
865
866static inline bool ata_drive_40wire(const u16 *dev_id)
867{
868 if (ata_id_is_sata(dev_id))
869 return false;
870 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
871 return false;
872 return true;
873}
874
875static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
876{
877 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
878 return false;
879 return true;
880}
881
882static inline int atapi_cdb_len(const u16 *dev_id)
883{
884 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
885 switch (tmp) {
886 case 0: return 12;
887 case 1: return 16;
888 default: return -1;
889 }
890}
891
892static inline int atapi_command_packet_set(const u16 *dev_id)
893{
894 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
895}
896
897static inline bool atapi_id_dmadir(const u16 *dev_id)
898{
899 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
900}
901
902
903
904
905
906
907
908
909
910static inline bool ata_id_is_lba_capacity_ok(u16 *id)
911{
912 unsigned long lba_sects, chs_sects, head, tail;
913
914
915 if (id[ATA_ID_CYLS] == 0)
916 return true;
917
918 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
919
920
921
922
923
924
925
926 if ((id[ATA_ID_CYLS] == 16383 ||
927 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
928 id[ATA_ID_SECTORS] == 63 &&
929 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
930 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
931 return true;
932
933 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
934
935
936 if (lba_sects - chs_sects < chs_sects/10)
937 return true;
938
939
940 head = (lba_sects >> 16) & 0xffff;
941 tail = lba_sects & 0xffff;
942 lba_sects = head | (tail << 16);
943
944 if (lba_sects - chs_sects < chs_sects/10) {
945 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
946 return true;
947 }
948
949 return false;
950}
951
952static inline void ata_id_to_hd_driveid(u16 *id)
953{
954#ifdef __BIG_ENDIAN
955
956 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
957 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
958 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
959 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
960 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
961
962
963 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
964 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
965
966
967 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
968 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
969#endif
970}
971
972
973
974
975
976
977static inline unsigned ata_set_lba_range_entries(void *_buffer,
978 unsigned buf_size, u64 sector, unsigned long count)
979{
980 __le64 *buffer = _buffer;
981 unsigned i = 0, used_bytes;
982
983 while (i < buf_size / 8 ) {
984 u64 entry = sector |
985 ((u64)(count > 0xffff ? 0xffff : count) << 48);
986 buffer[i++] = __cpu_to_le64(entry);
987 if (count <= 0xffff)
988 break;
989 count -= 0xffff;
990 sector += 0xffff;
991 }
992
993 used_bytes = ALIGN(i * 8, 512);
994 memset(buffer + i, 0, used_bytes - i * 8);
995 return used_bytes;
996}
997
998static inline bool ata_ok(u8 status)
999{
1000 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1001 == ATA_DRDY);
1002}
1003
1004static inline bool lba_28_ok(u64 block, u32 n_block)
1005{
1006
1007 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
1008}
1009
1010static inline bool lba_48_ok(u64 block, u32 n_block)
1011{
1012
1013 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1014}
1015
1016#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1017#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1018#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1019#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1020
1021#endif
1022