linux/include/linux/platform_data/mtd-nand-pxa3xx.h
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   1#ifndef __ASM_ARCH_PXA3XX_NAND_H
   2#define __ASM_ARCH_PXA3XX_NAND_H
   3
   4#include <linux/mtd/mtd.h>
   5#include <linux/mtd/partitions.h>
   6
   7struct pxa3xx_nand_timing {
   8        unsigned int    tCH;  /* Enable signal hold time */
   9        unsigned int    tCS;  /* Enable signal setup time */
  10        unsigned int    tWH;  /* ND_nWE high duration */
  11        unsigned int    tWP;  /* ND_nWE pulse time */
  12        unsigned int    tRH;  /* ND_nRE high duration */
  13        unsigned int    tRP;  /* ND_nRE pulse width */
  14        unsigned int    tR;   /* ND_nWE high to ND_nRE low for read */
  15        unsigned int    tWHR; /* ND_nWE high to ND_nRE low for status read */
  16        unsigned int    tAR;  /* ND_ALE low to ND_nRE low delay */
  17};
  18
  19struct pxa3xx_nand_flash {
  20        char            *name;
  21        uint32_t        chip_id;
  22        unsigned int    page_per_block; /* Pages per block (PG_PER_BLK) */
  23        unsigned int    page_size;      /* Page size in bytes (PAGE_SZ) */
  24        unsigned int    flash_width;    /* Width of Flash memory (DWIDTH_M) */
  25        unsigned int    dfc_width;      /* Width of flash controller(DWIDTH_C) */
  26        unsigned int    num_blocks;     /* Number of physical blocks in Flash */
  27
  28        struct pxa3xx_nand_timing *timing;      /* NAND Flash timing */
  29};
  30
  31/*
  32 * Current pxa3xx_nand controller has two chip select which
  33 * both be workable.
  34 *
  35 * Notice should be taken that:
  36 * When you want to use this feature, you should not enable the
  37 * keep configuration feature, for two chip select could be
  38 * attached with different nand chip. The different page size
  39 * and timing requirement make the keep configuration impossible.
  40 */
  41
  42/* The max num of chip select current support */
  43#define NUM_CHIP_SELECT         (2)
  44struct pxa3xx_nand_platform_data {
  45
  46        /* the data flash bus is shared between the Static Memory
  47         * Controller and the Data Flash Controller,  the arbiter
  48         * controls the ownership of the bus
  49         */
  50        int     enable_arbiter;
  51
  52        /* allow platform code to keep OBM/bootloader defined NFC config */
  53        int     keep_config;
  54
  55        /* indicate how many chip selects will be used */
  56        int     num_cs;
  57
  58        /* use an flash-based bad block table */
  59        bool    flash_bbt;
  60
  61        /* requested ECC strength and ECC step size */
  62        int ecc_strength, ecc_step_size;
  63
  64        const struct mtd_partition              *parts[NUM_CHIP_SELECT];
  65        unsigned int                            nr_parts[NUM_CHIP_SELECT];
  66
  67        const struct pxa3xx_nand_flash *        flash;
  68        size_t                                  num_flash;
  69};
  70
  71extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
  72#endif /* __ASM_ARCH_PXA3XX_NAND_H */
  73