LXR linux/sound/pci/echoaudio/darla24

   1/***************************************************************************
   2
   3   Copyright Echo Digital Audio Corporation (c) 1998 - 2004
   4   All rights reserved
   5   www.echoaudio.com
   6
   7   This file is part of Echo Digital Audio's generic driver library.
   8
   9   Echo Digital Audio's generic driver library is free software;
  10   you can redistribute it and/or modify it under the terms of
  11   the GNU General Public License as published by the Free Software
  12   Foundation.
  13
  14   This program is distributed in the hope that it will be useful,
  15   but WITHOUT ANY WARRANTY; without even the implied warranty of
  16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17   GNU General Public License for more details.
  18
  19   You should have received a copy of the GNU General Public License
  20   along with this program; if not, write to the Free Software
  21   Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  22   MA  02111-1307, USA.
  23
  24   *************************************************************************
  25
  26 Translation from C++ and adaptation for use in ALSA-Driver
  27 were made by Giuliano Pochini <pochini@shiny.it>
  28
  29****************************************************************************/
  30
  31
  32static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
  33{
  34        int err;
  35
  36        DE_INIT(("init_hw() - Darla24\n"));
  37        if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
  38                return -ENODEV;
  39
  40        if ((err = init_dsp_comm_page(chip))) {
  41                DE_INIT(("init_hw - could not initialize DSP comm page\n"));
  42                return err;
  43        }
  44
  45        chip->device_id = device_id;
  46        chip->subdevice_id = subdevice_id;
  47        chip->bad_board = TRUE;
  48        chip->dsp_code_to_load = FW_DARLA24_DSP;
  49        /* Since this card has no ASIC, mark it as loaded so everything
  50           works OK */
  51        chip->asic_loaded = TRUE;
  52        chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
  53                ECHO_CLOCK_BIT_ESYNC;
  54
  55        if ((err = load_firmware(chip)) < 0)
  56                return err;
  57        chip->bad_board = FALSE;
  58
  59        DE_INIT(("init_hw done\n"));
  60        return err;
  61}
  62
  63
  64
  65static int set_mixer_defaults(struct echoaudio *chip)
  66{
  67        return init_line_levels(chip);
  68}
  69
  70
  71
  72static u32 detect_input_clocks(const struct echoaudio *chip)
  73{
  74        u32 clocks_from_dsp, clock_bits;
  75
  76        /* Map the DSP clock detect bits to the generic driver clock
  77           detect bits */
  78        clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
  79
  80        clock_bits = ECHO_CLOCK_BIT_INTERNAL;
  81
  82        if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
  83                clock_bits |= ECHO_CLOCK_BIT_ESYNC;
  84
  85        return clock_bits;
  86}
  87
  88
  89
  90/* The Darla24 has no ASIC. Just do nothing */
  91static int load_asic(struct echoaudio *chip)
  92{
  93        return 0;
  94}
  95
  96
  97
  98static int set_sample_rate(struct echoaudio *chip, u32 rate)
  99{
 100        u8 clock;
 101
 102        switch (rate) {
 103        case 96000:
 104                clock = GD24_96000;
 105                break;
 106        case 88200:
 107                clock = GD24_88200;
 108                break;
 109        case 48000:
 110                clock = GD24_48000;
 111                break;
 112        case 44100:
 113                clock = GD24_44100;
 114                break;
 115        case 32000:
 116                clock = GD24_32000;
 117                break;
 118        case 22050:
 119                clock = GD24_22050;
 120                break;
 121        case 16000:
 122                clock = GD24_16000;
 123                break;
 124        case 11025:
 125                clock = GD24_11025;
 126                break;
 127        case 8000:
 128                clock = GD24_8000;
 129                break;
 130        default:
 131                DE_ACT(("set_sample_rate: Error, invalid sample rate %d\n",
 132                        rate));
 133                return -EINVAL;
 134        }
 135
 136        if (wait_handshake(chip))
 137                return -EIO;
 138
 139        DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock));
 140        chip->sample_rate = rate;
 141
 142        /* Override the sample rate if this card is set to Echo sync. */
 143        if (chip->input_clock == ECHO_CLOCK_ESYNC)
 144                clock = GD24_EXT_SYNC;
 145
 146        chip->comm_page->sample_rate = cpu_to_le32(rate);       /* ignored by the DSP ? */
 147        chip->comm_page->gd_clock_state = clock;
 148        clear_handshake(chip);
 149        return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
 150}
 151
 152
 153
 154static int set_input_clock(struct echoaudio *chip, u16 clock)
 155{
 156        if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
 157                       clock != ECHO_CLOCK_ESYNC))
 158                return -EINVAL;
 159        chip->input_clock = clock;
 160        return set_sample_rate(chip, chip->sample_rate);
 161}
 162
 163