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11#ifndef _ASM_MMU_CONTEXT_H
12#define _ASM_MMU_CONTEXT_H
13
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/smp.h>
17#include <linux/slab.h>
18#include <asm/cacheflush.h>
19#include <asm/hazards.h>
20#include <asm/tlbflush.h>
21#include <asm-generic/mm_hooks.h>
22
23#define htw_set_pwbase(pgd) \
24do { \
25 if (cpu_has_htw) { \
26 write_c0_pwbase(pgd); \
27 back_to_back_c0_hazard(); \
28 htw_reset(); \
29 } \
30} while (0)
31
32#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
33do { \
34 extern void tlbmiss_handler_setup_pgd(unsigned long); \
35 tlbmiss_handler_setup_pgd((unsigned long)(pgd)); \
36 htw_set_pwbase((unsigned long)pgd); \
37} while (0)
38
39#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
40
41#define TLBMISS_HANDLER_RESTORE() \
42 write_c0_xcontext((unsigned long) smp_processor_id() << \
43 SMP_CPUID_REGSHIFT)
44
45#define TLBMISS_HANDLER_SETUP() \
46 do { \
47 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir); \
48 TLBMISS_HANDLER_RESTORE(); \
49 } while (0)
50
51#else
52
53
54
55
56
57
58extern unsigned long pgd_current[];
59
60#define TLBMISS_HANDLER_RESTORE() \
61 write_c0_context((unsigned long) smp_processor_id() << \
62 SMP_CPUID_REGSHIFT)
63
64#define TLBMISS_HANDLER_SETUP() \
65 TLBMISS_HANDLER_RESTORE(); \
66 back_to_back_c0_hazard(); \
67 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
68#endif
69#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
70
71#define ASID_INC 0x40
72#define ASID_MASK 0xfc0
73
74#elif defined(CONFIG_CPU_R8000)
75
76#define ASID_INC 0x10
77#define ASID_MASK 0xff0
78
79#else
80
81#define ASID_INC 0x1
82#define ASID_MASK 0xff
83
84#endif
85
86#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
87#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
88#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
89
90static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
91{
92}
93
94
95
96
97
98#define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
99#define ASID_FIRST_VERSION ((unsigned long)(~ASID_VERSION_MASK) + 1)
100
101
102static inline void
103get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
104{
105 extern void kvm_local_flush_tlb_all(void);
106 unsigned long asid = asid_cache(cpu);
107
108 if (! ((asid += ASID_INC) & ASID_MASK) ) {
109 if (cpu_has_vtag_icache)
110 flush_icache_all();
111#ifdef CONFIG_KVM
112 kvm_local_flush_tlb_all();
113#else
114 local_flush_tlb_all();
115#endif
116 if (!asid)
117 asid = ASID_FIRST_VERSION;
118 }
119
120 cpu_context(cpu, mm) = asid_cache(cpu) = asid;
121}
122
123
124
125
126
127static inline int
128init_new_context(struct task_struct *tsk, struct mm_struct *mm)
129{
130 int i;
131
132 for_each_possible_cpu(i)
133 cpu_context(i, mm) = 0;
134
135 return 0;
136}
137
138static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
139 struct task_struct *tsk)
140{
141 unsigned int cpu = smp_processor_id();
142 unsigned long flags;
143 local_irq_save(flags);
144
145
146 if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
147 get_new_mmu_context(next, cpu);
148 write_c0_entryhi(cpu_asid(cpu, next));
149 TLBMISS_HANDLER_SETUP_PGD(next->pgd);
150
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153
154
155 cpumask_clear_cpu(cpu, mm_cpumask(prev));
156 cpumask_set_cpu(cpu, mm_cpumask(next));
157
158 local_irq_restore(flags);
159}
160
161
162
163
164
165static inline void destroy_context(struct mm_struct *mm)
166{
167}
168
169#define deactivate_mm(tsk, mm) do { } while (0)
170
171
172
173
174
175static inline void
176activate_mm(struct mm_struct *prev, struct mm_struct *next)
177{
178 unsigned long flags;
179 unsigned int cpu = smp_processor_id();
180
181 local_irq_save(flags);
182
183
184 get_new_mmu_context(next, cpu);
185
186 write_c0_entryhi(cpu_asid(cpu, next));
187 TLBMISS_HANDLER_SETUP_PGD(next->pgd);
188
189
190 cpumask_clear_cpu(cpu, mm_cpumask(prev));
191 cpumask_set_cpu(cpu, mm_cpumask(next));
192
193 local_irq_restore(flags);
194}
195
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197
198
199
200static inline void
201drop_mmu_context(struct mm_struct *mm, unsigned cpu)
202{
203 unsigned long flags;
204
205 local_irq_save(flags);
206
207 if (cpumask_test_cpu(cpu, mm_cpumask(mm))) {
208 get_new_mmu_context(mm, cpu);
209 write_c0_entryhi(cpu_asid(cpu, mm));
210 } else {
211
212 cpu_context(cpu, mm) = 0;
213 }
214 local_irq_restore(flags);
215}
216
217#endif
218