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21#ifndef _ASM_IOMMU_H
22#define _ASM_IOMMU_H
23#ifdef __KERNEL__
24
25#include <linux/compiler.h>
26#include <linux/spinlock.h>
27#include <linux/device.h>
28#include <linux/dma-mapping.h>
29#include <linux/bitops.h>
30#include <asm/machdep.h>
31#include <asm/types.h>
32
33#define IOMMU_PAGE_SHIFT_4K 12
34#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
35#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
36#define IOMMU_PAGE_ALIGN_4K(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE_4K)
37
38#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
39#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
40#define IOMMU_PAGE_ALIGN(addr, tblptr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE(tblptr))
41
42
43extern int iommu_is_off;
44extern int iommu_force_on;
45
46
47
48
49
50
51#define IOMAP_MAX_ORDER 13
52
53#define IOMMU_POOL_HASHBITS 2
54#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS)
55
56struct iommu_pool {
57 unsigned long start;
58 unsigned long end;
59 unsigned long hint;
60 spinlock_t lock;
61} ____cacheline_aligned_in_smp;
62
63struct iommu_table {
64 unsigned long it_busno;
65 unsigned long it_size;
66 unsigned long it_offset;
67 unsigned long it_base;
68 unsigned long it_index;
69 unsigned long it_type;
70 unsigned long it_blocksize;
71 unsigned long poolsize;
72 unsigned long nr_pools;
73 struct iommu_pool large_pool;
74 struct iommu_pool pools[IOMMU_NR_POOLS];
75 unsigned long *it_map;
76 unsigned long it_page_shift;
77#ifdef CONFIG_IOMMU_API
78 struct iommu_group *it_group;
79#endif
80 void (*set_bypass)(struct iommu_table *tbl, bool enable);
81};
82
83
84static inline __attribute_const__
85int get_iommu_order(unsigned long size, struct iommu_table *tbl)
86{
87 return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
88}
89
90
91struct scatterlist;
92
93static inline void set_iommu_table_base(struct device *dev, void *base)
94{
95 dev->archdata.dma_data.iommu_table_base = base;
96}
97
98static inline void *get_iommu_table_base(struct device *dev)
99{
100 return dev->archdata.dma_data.iommu_table_base;
101}
102
103
104extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
105
106
107
108
109extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
110 int nid);
111#ifdef CONFIG_IOMMU_API
112extern void iommu_register_group(struct iommu_table *tbl,
113 int pci_domain_number, unsigned long pe_num);
114extern int iommu_add_device(struct device *dev);
115extern void iommu_del_device(struct device *dev);
116#else
117static inline void iommu_register_group(struct iommu_table *tbl,
118 int pci_domain_number,
119 unsigned long pe_num)
120{
121}
122
123static inline int iommu_add_device(struct device *dev)
124{
125 return 0;
126}
127
128static inline void iommu_del_device(struct device *dev)
129{
130}
131#endif
132
133static inline void set_iommu_table_base_and_group(struct device *dev,
134 void *base)
135{
136 set_iommu_table_base(dev, base);
137 iommu_add_device(dev);
138}
139
140extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
141 struct scatterlist *sglist, int nelems,
142 unsigned long mask, enum dma_data_direction direction,
143 struct dma_attrs *attrs);
144extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
145 int nelems, enum dma_data_direction direction,
146 struct dma_attrs *attrs);
147
148extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
149 size_t size, dma_addr_t *dma_handle,
150 unsigned long mask, gfp_t flag, int node);
151extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
152 void *vaddr, dma_addr_t dma_handle);
153extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
154 struct page *page, unsigned long offset,
155 size_t size, unsigned long mask,
156 enum dma_data_direction direction,
157 struct dma_attrs *attrs);
158extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
159 size_t size, enum dma_data_direction direction,
160 struct dma_attrs *attrs);
161
162extern void iommu_init_early_pSeries(void);
163extern void iommu_init_early_dart(void);
164extern void iommu_init_early_pasemi(void);
165
166extern void alloc_dart_table(void);
167#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
168static inline void iommu_save(void)
169{
170 if (ppc_md.iommu_save)
171 ppc_md.iommu_save();
172}
173
174static inline void iommu_restore(void)
175{
176 if (ppc_md.iommu_restore)
177 ppc_md.iommu_restore();
178}
179#endif
180
181
182extern int iommu_tce_clear_param_check(struct iommu_table *tbl,
183 unsigned long ioba, unsigned long tce_value,
184 unsigned long npages);
185extern int iommu_tce_put_param_check(struct iommu_table *tbl,
186 unsigned long ioba, unsigned long tce);
187extern int iommu_tce_build(struct iommu_table *tbl, unsigned long entry,
188 unsigned long hwaddr, enum dma_data_direction direction);
189extern unsigned long iommu_clear_tce(struct iommu_table *tbl,
190 unsigned long entry);
191extern int iommu_clear_tces_and_put_pages(struct iommu_table *tbl,
192 unsigned long entry, unsigned long pages);
193extern int iommu_put_tce_user_mode(struct iommu_table *tbl,
194 unsigned long entry, unsigned long tce);
195
196extern void iommu_flush_tce(struct iommu_table *tbl);
197extern int iommu_take_ownership(struct iommu_table *tbl);
198extern void iommu_release_ownership(struct iommu_table *tbl);
199
200extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
201
202#endif
203#endif
204