LXR linux/arch/powerpc/include/asm/xics.h

   1/*
   2 * Common definitions accross all variants of ICP and ICS interrupt
   3 * controllers.
   4 */
   5
   6#ifndef _XICS_H
   7#define _XICS_H
   8
   9#include <linux/interrupt.h>
  10
  11#define XICS_IPI                2
  12#define XICS_IRQ_SPURIOUS       0
  13
  14/* Want a priority other than 0.  Various HW issues require this. */
  15#define DEFAULT_PRIORITY        5
  16
  17/*
  18 * Mark IPIs as higher priority so we can take them inside interrupts
  19 * FIXME: still true now?
  20 */
  21#define IPI_PRIORITY            4
  22
  23/* The least favored priority */
  24#define LOWEST_PRIORITY         0xFF
  25
  26/* The number of priorities defined above */
  27#define MAX_NUM_PRIORITIES      3
  28
  29/* Native ICP */
  30#ifdef CONFIG_PPC_ICP_NATIVE
  31extern int icp_native_init(void);
  32#else
  33static inline int icp_native_init(void) { return -ENODEV; }
  34#endif
  35
  36/* PAPR ICP */
  37#ifdef CONFIG_PPC_ICP_HV
  38extern int icp_hv_init(void);
  39#else
  40static inline int icp_hv_init(void) { return -ENODEV; }
  41#endif
  42
  43/* ICP ops */
  44struct icp_ops {
  45        unsigned int (*get_irq)(void);
  46        void (*eoi)(struct irq_data *d);
  47        void (*set_priority)(unsigned char prio);
  48        void (*teardown_cpu)(void);
  49        void (*flush_ipi)(void);
  50#ifdef CONFIG_SMP
  51        void (*cause_ipi)(int cpu, unsigned long data);
  52        irq_handler_t ipi_action;
  53#endif
  54};
  55
  56extern const struct icp_ops *icp_ops;
  57
  58/* Native ICS */
  59extern int ics_native_init(void);
  60
  61/* RTAS ICS */
  62#ifdef CONFIG_PPC_ICS_RTAS
  63extern int ics_rtas_init(void);
  64#else
  65static inline int ics_rtas_init(void) { return -ENODEV; }
  66#endif
  67
  68/* HAL ICS */
  69#ifdef CONFIG_PPC_POWERNV
  70extern int ics_opal_init(void);
  71#else
  72static inline int ics_opal_init(void) { return -ENODEV; }
  73#endif
  74
  75/* ICS instance, hooked up to chip_data of an irq */
  76struct ics {
  77        struct list_head link;
  78        int (*map)(struct ics *ics, unsigned int virq);
  79        void (*mask_unknown)(struct ics *ics, unsigned long vec);
  80        long (*get_server)(struct ics *ics, unsigned long vec);
  81        int (*host_match)(struct ics *ics, struct device_node *node);
  82        char data[];
  83};
  84
  85/* Commons */
  86extern unsigned int xics_default_server;
  87extern unsigned int xics_default_distrib_server;
  88extern unsigned int xics_interrupt_server_size;
  89extern struct irq_domain *xics_host;
  90
  91struct xics_cppr {
  92        unsigned char stack[MAX_NUM_PRIORITIES];
  93        int index;
  94};
  95
  96DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
  97
  98static inline void xics_push_cppr(unsigned int vec)
  99{
 100        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
 101
 102        if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
 103                return;
 104
 105        if (vec == XICS_IPI)
 106                os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
 107        else
 108                os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
 109}
 110
 111static inline unsigned char xics_pop_cppr(void)
 112{
 113        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
 114
 115        if (WARN_ON(os_cppr->index < 1))
 116                return LOWEST_PRIORITY;
 117
 118        return os_cppr->stack[--os_cppr->index];
 119}
 120
 121static inline void xics_set_base_cppr(unsigned char cppr)
 122{
 123        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
 124
 125        /* we only really want to set the priority when there's
 126         * just one cppr value on the stack
 127         */
 128        WARN_ON(os_cppr->index != 0);
 129
 130        os_cppr->stack[0] = cppr;
 131}
 132
 133static inline unsigned char xics_cppr_top(void)
 134{
 135        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
 136        
 137        return os_cppr->stack[os_cppr->index];
 138}
 139
 140DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
 141
 142extern void xics_init(void);
 143extern void xics_setup_cpu(void);
 144extern void xics_update_irq_servers(void);
 145extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
 146extern void xics_mask_unknown_vec(unsigned int vec);
 147extern irqreturn_t xics_ipi_dispatch(int cpu);
 148extern int xics_smp_probe(void);
 149extern void xics_register_ics(struct ics *ics);
 150extern void xics_teardown_cpu(void);
 151extern void xics_kexec_teardown_cpu(int secondary);
 152extern void xics_migrate_irqs_away(void);
 153extern void icp_native_eoi(struct irq_data *d);
 154#ifdef CONFIG_SMP
 155extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
 156                               unsigned int strict_check);
 157#else
 158#define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
 159#endif
 160
 161
 162#endif /* _XICS_H */
 163