LXR linux/arch/powerpc/mm/hugepage-hash64.c

   1/*
   2 * Copyright IBM Corporation, 2013
   3 * Author Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2.1 of the GNU Lesser General Public License
   7 * as published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it would be useful, but
  10 * WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12 *
  13 */
  14
  15/*
  16 * PPC64 THP Support for hash based MMUs
  17 */
  18#include <linux/mm.h>
  19#include <asm/machdep.h>
  20
  21static void invalidate_old_hpte(unsigned long vsid, unsigned long addr,
  22                                pmd_t *pmdp, unsigned int psize, int ssize)
  23{
  24        int i, max_hpte_count, valid;
  25        unsigned long s_addr;
  26        unsigned char *hpte_slot_array;
  27        unsigned long hidx, shift, vpn, hash, slot;
  28
  29        s_addr = addr & HPAGE_PMD_MASK;
  30        hpte_slot_array = get_hpte_slot_array(pmdp);
  31        /*
  32         * IF we try to do a HUGE PTE update after a withdraw is done.
  33         * we will find the below NULL. This happens when we do
  34         * split_huge_page_pmd
  35         */
  36        if (!hpte_slot_array)
  37                return;
  38
  39        if (ppc_md.hugepage_invalidate)
  40                return ppc_md.hugepage_invalidate(vsid, s_addr, hpte_slot_array,
  41                                                  psize, ssize);
  42        /*
  43         * No bluk hpte removal support, invalidate each entry
  44         */
  45        shift = mmu_psize_defs[psize].shift;
  46        max_hpte_count = HPAGE_PMD_SIZE >> shift;
  47        for (i = 0; i < max_hpte_count; i++) {
  48                /*
  49                 * 8 bits per each hpte entries
  50                 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
  51                 */
  52                valid = hpte_valid(hpte_slot_array, i);
  53                if (!valid)
  54                        continue;
  55                hidx =  hpte_hash_index(hpte_slot_array, i);
  56
  57                /* get the vpn */
  58                addr = s_addr + (i * (1ul << shift));
  59                vpn = hpt_vpn(addr, vsid, ssize);
  60                hash = hpt_hash(vpn, shift, ssize);
  61                if (hidx & _PTEIDX_SECONDARY)
  62                        hash = ~hash;
  63
  64                slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  65                slot += hidx & _PTEIDX_GROUP_IX;
  66                ppc_md.hpte_invalidate(slot, vpn, psize,
  67                                       MMU_PAGE_16M, ssize, 0);
  68        }
  69}
  70
  71
  72int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
  73                    pmd_t *pmdp, unsigned long trap, int local, int ssize,
  74                    unsigned int psize)
  75{
  76        unsigned int index, valid;
  77        unsigned char *hpte_slot_array;
  78        unsigned long rflags, pa, hidx;
  79        unsigned long old_pmd, new_pmd;
  80        int ret, lpsize = MMU_PAGE_16M;
  81        unsigned long vpn, hash, shift, slot;
  82
  83        /*
  84         * atomically mark the linux large page PMD busy and dirty
  85         */
  86        do {
  87                pmd_t pmd = ACCESS_ONCE(*pmdp);
  88
  89                old_pmd = pmd_val(pmd);
  90                /* If PMD busy, retry the access */
  91                if (unlikely(old_pmd & _PAGE_BUSY))
  92                        return 0;
  93                /* If PMD is trans splitting retry the access */
  94                if (unlikely(old_pmd & _PAGE_SPLITTING))
  95                        return 0;
  96                /* If PMD permissions don't match, take page fault */
  97                if (unlikely(access & ~old_pmd))
  98                        return 1;
  99                /*
 100                 * Try to lock the PTE, add ACCESSED and DIRTY if it was
 101                 * a write access
 102                 */
 103                new_pmd = old_pmd | _PAGE_BUSY | _PAGE_ACCESSED;
 104                if (access & _PAGE_RW)
 105                        new_pmd |= _PAGE_DIRTY;
 106        } while (old_pmd != __cmpxchg_u64((unsigned long *)pmdp,
 107                                          old_pmd, new_pmd));
 108        /*
 109         * PP bits. _PAGE_USER is already PP bit 0x2, so we only
 110         * need to add in 0x1 if it's a read-only user page
 111         */
 112        rflags = new_pmd & _PAGE_USER;
 113        if ((new_pmd & _PAGE_USER) && !((new_pmd & _PAGE_RW) &&
 114                                           (new_pmd & _PAGE_DIRTY)))
 115                rflags |= 0x1;
 116        /*
 117         * _PAGE_EXEC -> HW_NO_EXEC since it's inverted
 118         */
 119        rflags |= ((new_pmd & _PAGE_EXEC) ? 0 : HPTE_R_N);
 120
 121#if 0
 122        if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
 123
 124                /*
 125                 * No CPU has hugepages but lacks no execute, so we
 126                 * don't need to worry about that case
 127                 */
 128                rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
 129        }
 130#endif
 131        /*
 132         * Find the slot index details for this ea, using base page size.
 133         */
 134        shift = mmu_psize_defs[psize].shift;
 135        index = (ea & ~HPAGE_PMD_MASK) >> shift;
 136        BUG_ON(index >= 4096);
 137
 138        vpn = hpt_vpn(ea, vsid, ssize);
 139        hash = hpt_hash(vpn, shift, ssize);
 140        hpte_slot_array = get_hpte_slot_array(pmdp);
 141        if (psize == MMU_PAGE_4K) {
 142                /*
 143                 * invalidate the old hpte entry if we have that mapped via 64K
 144                 * base page size. This is because demote_segment won't flush
 145                 * hash page table entries.
 146                 */
 147                if ((old_pmd & _PAGE_HASHPTE) && !(old_pmd & _PAGE_COMBO))
 148                        invalidate_old_hpte(vsid, ea, pmdp, MMU_PAGE_64K, ssize);
 149        }
 150
 151        valid = hpte_valid(hpte_slot_array, index);
 152        if (valid) {
 153                /* update the hpte bits */
 154                hidx =  hpte_hash_index(hpte_slot_array, index);
 155                if (hidx & _PTEIDX_SECONDARY)
 156                        hash = ~hash;
 157                slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
 158                slot += hidx & _PTEIDX_GROUP_IX;
 159
 160                ret = ppc_md.hpte_updatepp(slot, rflags, vpn,
 161                                           psize, lpsize, ssize, local);
 162                /*
 163                 * We failed to update, try to insert a new entry.
 164                 */
 165                if (ret == -1) {
 166                        /*
 167                         * large pte is marked busy, so we can be sure
 168                         * nobody is looking at hpte_slot_array. hence we can
 169                         * safely update this here.
 170                         */
 171                        valid = 0;
 172                        hpte_slot_array[index] = 0;
 173                }
 174        }
 175
 176        if (!valid) {
 177                unsigned long hpte_group;
 178
 179                /* insert new entry */
 180                pa = pmd_pfn(__pmd(old_pmd)) << PAGE_SHIFT;
 181                new_pmd |= _PAGE_HASHPTE;
 182
 183                /* Add in WIMG bits */
 184                rflags |= (new_pmd & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
 185                                      _PAGE_GUARDED));
 186                /*
 187                 * enable the memory coherence always
 188                 */
 189                rflags |= HPTE_R_M;
 190repeat:
 191                hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
 192
 193                /* Insert into the hash table, primary slot */
 194                slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0,
 195                                          psize, lpsize, ssize);
 196                /*
 197                 * Primary is full, try the secondary
 198                 */
 199                if (unlikely(slot == -1)) {
 200                        hpte_group = ((~hash & htab_hash_mask) *
 201                                      HPTES_PER_GROUP) & ~0x7UL;
 202                        slot = ppc_md.hpte_insert(hpte_group, vpn, pa,
 203                                                  rflags, HPTE_V_SECONDARY,
 204                                                  psize, lpsize, ssize);
 205                        if (slot == -1) {
 206                                if (mftb() & 0x1)
 207                                        hpte_group = ((hash & htab_hash_mask) *
 208                                                      HPTES_PER_GROUP) & ~0x7UL;
 209
 210                                ppc_md.hpte_remove(hpte_group);
 211                                goto repeat;
 212                        }
 213                }
 214                /*
 215                 * Hypervisor failure. Restore old pmd and return -1
 216                 * similar to __hash_page_*
 217                 */
 218                if (unlikely(slot == -2)) {
 219                        *pmdp = __pmd(old_pmd);
 220                        hash_failure_debug(ea, access, vsid, trap, ssize,
 221                                           psize, lpsize, old_pmd);
 222                        return -1;
 223                }
 224                /*
 225                 * large pte is marked busy, so we can be sure
 226                 * nobody is looking at hpte_slot_array. hence we can
 227                 * safely update this here.
 228                 */
 229                mark_hpte_slot_valid(hpte_slot_array, index, slot);
 230        }
 231        /*
 232         * Mark the pte with _PAGE_COMBO, if we are trying to hash it with
 233         * base page size 4k.
 234         */
 235        if (psize == MMU_PAGE_4K)
 236                new_pmd |= _PAGE_COMBO;
 237        /*
 238         * The hpte valid is stored in the pgtable whose address is in the
 239         * second half of the PMD. Order this against clearing of the busy bit in
 240         * huge pmd.
 241         */
 242        smp_wmb();
 243        *pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
 244        return 0;
 245}
 246