LXR linux/drivers/gpu/drm/nouveau/core/engine/software/nv50.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24
  25#include <core/os.h>
  26#include <core/engctx.h>
  27#include <core/namedb.h>
  28#include <core/handle.h>
  29#include <core/gpuobj.h>
  30#include <core/event.h>
  31#include <nvif/event.h>
  32
  33#include <subdev/bar.h>
  34
  35#include <engine/disp.h>
  36
  37#include "nv50.h"
  38
  39/*******************************************************************************
  40 * software object classes
  41 ******************************************************************************/
  42
  43static int
  44nv50_software_mthd_dma_vblsem(struct nouveau_object *object, u32 mthd,
  45                              void *args, u32 size)
  46{
  47        struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
  48        struct nouveau_fifo_chan *fifo = (void *)nv_object(chan)->parent;
  49        struct nouveau_handle *handle;
  50        int ret = -EINVAL;
  51
  52        handle = nouveau_namedb_get(nv_namedb(fifo), *(u32 *)args);
  53        if (!handle)
  54                return -ENOENT;
  55
  56        if (nv_iclass(handle->object, NV_GPUOBJ_CLASS)) {
  57                struct nouveau_gpuobj *gpuobj = nv_gpuobj(handle->object);
  58                chan->vblank.ctxdma = gpuobj->node->offset >> 4;
  59                ret = 0;
  60        }
  61        nouveau_namedb_put(handle);
  62        return ret;
  63}
  64
  65static int
  66nv50_software_mthd_vblsem_offset(struct nouveau_object *object, u32 mthd,
  67                                 void *args, u32 size)
  68{
  69        struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
  70        chan->vblank.offset = *(u32 *)args;
  71        return 0;
  72}
  73
  74int
  75nv50_software_mthd_vblsem_value(struct nouveau_object *object, u32 mthd,
  76                                void *args, u32 size)
  77{
  78        struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
  79        chan->vblank.value = *(u32 *)args;
  80        return 0;
  81}
  82
  83int
  84nv50_software_mthd_vblsem_release(struct nouveau_object *object, u32 mthd,
  85                                  void *args, u32 size)
  86{
  87        struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
  88        u32 head = *(u32 *)args;
  89        if (head >= nouveau_disp(chan)->vblank.index_nr)
  90                return -EINVAL;
  91
  92        nvkm_notify_get(&chan->vblank.notify[head]);
  93        return 0;
  94}
  95
  96int
  97nv50_software_mthd_flip(struct nouveau_object *object, u32 mthd,
  98                        void *args, u32 size)
  99{
 100        struct nv50_software_chan *chan = (void *)nv_engctx(object->parent);
 101        if (chan->base.flip)
 102                return chan->base.flip(chan->base.flip_data);
 103        return -EINVAL;
 104}
 105
 106static struct nouveau_omthds
 107nv50_software_omthds[] = {
 108        { 0x018c, 0x018c, nv50_software_mthd_dma_vblsem },
 109        { 0x0400, 0x0400, nv50_software_mthd_vblsem_offset },
 110        { 0x0404, 0x0404, nv50_software_mthd_vblsem_value },
 111        { 0x0408, 0x0408, nv50_software_mthd_vblsem_release },
 112        { 0x0500, 0x0500, nv50_software_mthd_flip },
 113        {}
 114};
 115
 116static struct nouveau_oclass
 117nv50_software_sclass[] = {
 118        { 0x506e, &nouveau_object_ofuncs, nv50_software_omthds },
 119        {}
 120};
 121
 122/*******************************************************************************
 123 * software context
 124 ******************************************************************************/
 125
 126static int
 127nv50_software_vblsem_release(struct nvkm_notify *notify)
 128{
 129        struct nv50_software_chan *chan =
 130                container_of(notify, typeof(*chan), vblank.notify[notify->index]);
 131        struct nv50_software_priv *priv = (void *)nv_object(chan)->engine;
 132        struct nouveau_bar *bar = nouveau_bar(priv);
 133
 134        nv_wr32(priv, 0x001704, chan->vblank.channel);
 135        nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
 136        bar->flush(bar);
 137
 138        if (nv_device(priv)->chipset == 0x50) {
 139                nv_wr32(priv, 0x001570, chan->vblank.offset);
 140                nv_wr32(priv, 0x001574, chan->vblank.value);
 141        } else {
 142                nv_wr32(priv, 0x060010, chan->vblank.offset);
 143                nv_wr32(priv, 0x060014, chan->vblank.value);
 144        }
 145
 146        return NVKM_NOTIFY_DROP;
 147}
 148
 149void
 150nv50_software_context_dtor(struct nouveau_object *object)
 151{
 152        struct nv50_software_chan *chan = (void *)object;
 153        int i;
 154
 155        for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++)
 156                nvkm_notify_fini(&chan->vblank.notify[i]);
 157
 158        nouveau_software_context_destroy(&chan->base);
 159}
 160
 161int
 162nv50_software_context_ctor(struct nouveau_object *parent,
 163                           struct nouveau_object *engine,
 164                           struct nouveau_oclass *oclass, void *data, u32 size,
 165                           struct nouveau_object **pobject)
 166{
 167        struct nouveau_disp *pdisp = nouveau_disp(parent);
 168        struct nv50_software_cclass *pclass = (void *)oclass;
 169        struct nv50_software_chan *chan;
 170        int ret, i;
 171
 172        ret = nouveau_software_context_create(parent, engine, oclass, &chan);
 173        *pobject = nv_object(chan);
 174        if (ret)
 175                return ret;
 176
 177        for (i = 0; pdisp && i < pdisp->vblank.index_nr; i++) {
 178                ret = nvkm_notify_init(&pdisp->vblank, pclass->vblank, false,
 179                                       &(struct nvif_notify_head_req_v0) {
 180                                        .head = i,
 181                                       },
 182                                       sizeof(struct nvif_notify_head_req_v0),
 183                                       sizeof(struct nvif_notify_head_rep_v0),
 184                                       &chan->vblank.notify[i]);
 185                if (ret)
 186                        return ret;
 187        }
 188
 189        chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12;
 190        return 0;
 191}
 192
 193static struct nv50_software_cclass
 194nv50_software_cclass = {
 195        .base.handle = NV_ENGCTX(SW, 0x50),
 196        .base.ofuncs = &(struct nouveau_ofuncs) {
 197                .ctor = nv50_software_context_ctor,
 198                .dtor = nv50_software_context_dtor,
 199                .init = _nouveau_software_context_init,
 200                .fini = _nouveau_software_context_fini,
 201        },
 202        .vblank = nv50_software_vblsem_release,
 203};
 204
 205/*******************************************************************************
 206 * software engine/subdev functions
 207 ******************************************************************************/
 208
 209int
 210nv50_software_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 211                   struct nouveau_oclass *oclass, void *data, u32 size,
 212                   struct nouveau_object **pobject)
 213{
 214        struct nv50_software_oclass *pclass = (void *)oclass;
 215        struct nv50_software_priv *priv;
 216        int ret;
 217
 218        ret = nouveau_software_create(parent, engine, oclass, &priv);
 219        *pobject = nv_object(priv);
 220        if (ret)
 221                return ret;
 222
 223        nv_engine(priv)->cclass = pclass->cclass;
 224        nv_engine(priv)->sclass = pclass->sclass;
 225        nv_subdev(priv)->intr = nv04_software_intr;
 226        return 0;
 227}
 228
 229struct nouveau_oclass *
 230nv50_software_oclass = &(struct nv50_software_oclass) {
 231        .base.handle = NV_ENGINE(SW, 0x50),
 232        .base.ofuncs = &(struct nouveau_ofuncs) {
 233                .ctor = nv50_software_ctor,
 234                .dtor = _nouveau_software_dtor,
 235                .init = _nouveau_software_init,
 236                .fini = _nouveau_software_fini,
 237        },
 238        .cclass = &nv50_software_cclass.base,
 239        .sclass =  nv50_software_sclass,
 240}.base;
 241