LXR linux/drivers/gpu/drm/nouveau/core/subdev/fb/ramnv1a.c

   1/*
   2 * Copyright 2013 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24
  25#include "priv.h"
  26
  27static int
  28nv1a_ram_create(struct nouveau_object *parent, struct nouveau_object *engine,
  29                struct nouveau_oclass *oclass, void *data, u32 size,
  30                struct nouveau_object **pobject)
  31{
  32        struct nouveau_fb *pfb = nouveau_fb(parent);
  33        struct nouveau_ram *ram;
  34        struct pci_dev *bridge;
  35        u32 mem, mib;
  36        int ret;
  37
  38        bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1));
  39        if (!bridge) {
  40                nv_fatal(pfb, "no bridge device\n");
  41                return -ENODEV;
  42        }
  43
  44        ret = nouveau_ram_create(parent, engine, oclass, &ram);
  45        *pobject = nv_object(ram);
  46        if (ret)
  47                return ret;
  48
  49        if (nv_device(pfb)->chipset == 0x1a) {
  50                pci_read_config_dword(bridge, 0x7c, &mem);
  51                mib = ((mem >> 6) & 31) + 1;
  52        } else {
  53                pci_read_config_dword(bridge, 0x84, &mem);
  54                mib = ((mem >> 4) & 127) + 1;
  55        }
  56
  57        ram->type = NV_MEM_TYPE_STOLEN;
  58        ram->size = mib * 1024 * 1024;
  59        return 0;
  60}
  61
  62struct nouveau_oclass
  63nv1a_ram_oclass = {
  64        .handle = 0,
  65        .ofuncs = &(struct nouveau_ofuncs) {
  66                .ctor = nv1a_ram_create,
  67                .dtor = _nouveau_ram_dtor,
  68                .init = _nouveau_ram_init,
  69                .fini = _nouveau_ram_fini,
  70        }
  71};
  72