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20#include <linux/module.h>
21#include <linux/mdio-bitbang.h>
22#include <linux/types.h>
23#include <linux/delay.h>
24
25#define MDIO_READ 2
26#define MDIO_WRITE 1
27
28#define MDIO_C45 (1<<15)
29#define MDIO_C45_ADDR (MDIO_C45 | 0)
30#define MDIO_C45_READ (MDIO_C45 | 3)
31#define MDIO_C45_WRITE (MDIO_C45 | 1)
32
33#define MDIO_SETUP_TIME 10
34#define MDIO_HOLD_TIME 10
35
36
37
38
39#define MDIO_DELAY 250
40
41
42
43
44#define MDIO_READ_DELAY 350
45
46
47static void mdiobb_send_bit(struct mdiobb_ctrl *ctrl, int val)
48{
49 const struct mdiobb_ops *ops = ctrl->ops;
50
51 ops->set_mdio_data(ctrl, val);
52 ndelay(MDIO_DELAY);
53 ops->set_mdc(ctrl, 1);
54 ndelay(MDIO_DELAY);
55 ops->set_mdc(ctrl, 0);
56}
57
58
59static int mdiobb_get_bit(struct mdiobb_ctrl *ctrl)
60{
61 const struct mdiobb_ops *ops = ctrl->ops;
62
63 ndelay(MDIO_DELAY);
64 ops->set_mdc(ctrl, 1);
65 ndelay(MDIO_READ_DELAY);
66 ops->set_mdc(ctrl, 0);
67
68 return ops->get_mdio_data(ctrl);
69}
70
71
72static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
73{
74 int i;
75
76 for (i = bits - 1; i >= 0; i--)
77 mdiobb_send_bit(ctrl, (val >> i) & 1);
78}
79
80
81static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
82{
83 int i;
84 u16 ret = 0;
85
86 for (i = bits - 1; i >= 0; i--) {
87 ret <<= 1;
88 ret |= mdiobb_get_bit(ctrl);
89 }
90
91 return ret;
92}
93
94
95
96
97static void mdiobb_cmd(struct mdiobb_ctrl *ctrl, int op, u8 phy, u8 reg)
98{
99 const struct mdiobb_ops *ops = ctrl->ops;
100 int i;
101
102 ops->set_mdio_dir(ctrl, 1);
103
104
105
106
107
108
109
110
111
112
113 for (i = 0; i < 32; i++)
114 mdiobb_send_bit(ctrl, 1);
115
116
117
118
119 mdiobb_send_bit(ctrl, 0);
120 if (op & MDIO_C45)
121 mdiobb_send_bit(ctrl, 0);
122 else
123 mdiobb_send_bit(ctrl, 1);
124 mdiobb_send_bit(ctrl, (op >> 1) & 1);
125 mdiobb_send_bit(ctrl, (op >> 0) & 1);
126
127 mdiobb_send_num(ctrl, phy, 5);
128 mdiobb_send_num(ctrl, reg, 5);
129}
130
131
132
133
134
135
136
137static int mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, u32 addr)
138{
139 unsigned int dev_addr = (addr >> 16) & 0x1F;
140 unsigned int reg = addr & 0xFFFF;
141 mdiobb_cmd(ctrl, MDIO_C45_ADDR, phy, dev_addr);
142
143
144 mdiobb_send_bit(ctrl, 1);
145 mdiobb_send_bit(ctrl, 0);
146
147 mdiobb_send_num(ctrl, reg, 16);
148
149 ctrl->ops->set_mdio_dir(ctrl, 0);
150 mdiobb_get_bit(ctrl);
151
152 return dev_addr;
153}
154
155static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
156{
157 struct mdiobb_ctrl *ctrl = bus->priv;
158 int ret, i;
159
160 if (reg & MII_ADDR_C45) {
161 reg = mdiobb_cmd_addr(ctrl, phy, reg);
162 mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
163 } else
164 mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
165
166 ctrl->ops->set_mdio_dir(ctrl, 0);
167
168
169 if (mdiobb_get_bit(ctrl) != 0) {
170
171
172
173 for (i = 0; i < 32; i++)
174 mdiobb_get_bit(ctrl);
175
176 return 0xffff;
177 }
178
179 ret = mdiobb_get_num(ctrl, 16);
180 mdiobb_get_bit(ctrl);
181 return ret;
182}
183
184static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
185{
186 struct mdiobb_ctrl *ctrl = bus->priv;
187
188 if (reg & MII_ADDR_C45) {
189 reg = mdiobb_cmd_addr(ctrl, phy, reg);
190 mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
191 } else
192 mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
193
194
195 mdiobb_send_bit(ctrl, 1);
196 mdiobb_send_bit(ctrl, 0);
197
198 mdiobb_send_num(ctrl, val, 16);
199
200 ctrl->ops->set_mdio_dir(ctrl, 0);
201 mdiobb_get_bit(ctrl);
202 return 0;
203}
204
205static int mdiobb_reset(struct mii_bus *bus)
206{
207 struct mdiobb_ctrl *ctrl = bus->priv;
208 if (ctrl->reset)
209 ctrl->reset(bus);
210 return 0;
211}
212
213struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
214{
215 struct mii_bus *bus;
216
217 bus = mdiobus_alloc();
218 if (!bus)
219 return NULL;
220
221 __module_get(ctrl->ops->owner);
222
223 bus->read = mdiobb_read;
224 bus->write = mdiobb_write;
225 bus->reset = mdiobb_reset;
226 bus->priv = ctrl;
227
228 return bus;
229}
230EXPORT_SYMBOL(alloc_mdio_bitbang);
231
232void free_mdio_bitbang(struct mii_bus *bus)
233{
234 struct mdiobb_ctrl *ctrl = bus->priv;
235
236 module_put(ctrl->ops->owner);
237 mdiobus_free(bus);
238}
239EXPORT_SYMBOL(free_mdio_bitbang);
240
241MODULE_LICENSE("GPL");
242