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11#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12#define SUPPORT_SYSRQ
13#endif
14
15#define DRIVER_NAME "bfin-uart"
16#define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18#include <linux/module.h>
19#include <linux/ioport.h>
20#include <linux/gfp.h>
21#include <linux/io.h>
22#include <linux/init.h>
23#include <linux/console.h>
24#include <linux/sysrq.h>
25#include <linux/platform_device.h>
26#include <linux/tty.h>
27#include <linux/tty_flip.h>
28#include <linux/serial_core.h>
29#include <linux/gpio.h>
30#include <linux/irq.h>
31#include <linux/kgdb.h>
32#include <linux/slab.h>
33#include <linux/dma-mapping.h>
34
35#include <asm/portmux.h>
36#include <asm/cacheflush.h>
37#include <asm/dma.h>
38#include <asm/bfin_serial.h>
39
40#ifdef CONFIG_SERIAL_BFIN_MODULE
41# undef CONFIG_EARLY_PRINTK
42#endif
43
44
45#define BFIN_SERIAL_DEV_NAME "ttyBF"
46#define BFIN_SERIAL_MAJOR 204
47#define BFIN_SERIAL_MINOR 64
48
49static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
50
51#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
52 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
53
54# ifndef CONFIG_SERIAL_BFIN_PIO
55# error KGDB only support UART in PIO mode.
56# endif
57
58static int kgdboc_port_line;
59static int kgdboc_break_enabled;
60#endif
61
62
63
64#define DMA_RX_XCOUNT 512
65#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
66
67#define DMA_RX_FLUSH_JIFFIES (HZ / 50)
68
69#ifdef CONFIG_SERIAL_BFIN_DMA
70static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
71#else
72static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
73#endif
74
75static void bfin_serial_reset_irda(struct uart_port *port);
76
77#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
78 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
79static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
80{
81 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
82 if (uart->cts_pin < 0)
83 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
84
85
86 if (UART_GET_CTS(uart))
87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
88 else
89 return TIOCM_DSR | TIOCM_CAR;
90}
91
92static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
93{
94 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
95 if (uart->rts_pin < 0)
96 return;
97
98
99 if (mctrl & TIOCM_RTS)
100 UART_ENABLE_RTS(uart);
101 else
102 UART_DISABLE_RTS(uart);
103}
104
105
106
107
108static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
109{
110 struct bfin_serial_port *uart = dev_id;
111 unsigned int status = bfin_serial_get_mctrl(&uart->port);
112#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
113 struct tty_struct *tty = uart->port.state->port.tty;
114
115 UART_CLEAR_SCTS(uart);
116 if (tty->hw_stopped) {
117 if (status) {
118 tty->hw_stopped = 0;
119 uart_write_wakeup(&uart->port);
120 }
121 } else {
122 if (!status)
123 tty->hw_stopped = 1;
124 }
125#endif
126 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
127
128 return IRQ_HANDLED;
129}
130#else
131static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
132{
133 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
134}
135
136static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
137{
138}
139#endif
140
141
142
143
144static void bfin_serial_stop_tx(struct uart_port *port)
145{
146 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
147#ifdef CONFIG_SERIAL_BFIN_DMA
148 struct circ_buf *xmit = &uart->port.state->xmit;
149#endif
150
151 while (!(UART_GET_LSR(uart) & TEMT))
152 cpu_relax();
153
154#ifdef CONFIG_SERIAL_BFIN_DMA
155 disable_dma(uart->tx_dma_channel);
156 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
157 uart->port.icount.tx += uart->tx_count;
158 uart->tx_count = 0;
159 uart->tx_done = 1;
160#else
161#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
162
163 UART_PUT_LSR(uart, TFI);
164#endif
165 UART_CLEAR_IER(uart, ETBEI);
166#endif
167}
168
169
170
171
172static void bfin_serial_start_tx(struct uart_port *port)
173{
174 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
175 struct tty_struct *tty = uart->port.state->port.tty;
176
177
178
179
180
181 if (tty->termios.c_line == N_IRDA)
182 bfin_serial_reset_irda(port);
183
184#ifdef CONFIG_SERIAL_BFIN_DMA
185 if (uart->tx_done)
186 bfin_serial_dma_tx_chars(uart);
187#else
188 UART_SET_IER(uart, ETBEI);
189 bfin_serial_tx_chars(uart);
190#endif
191}
192
193
194
195
196static void bfin_serial_stop_rx(struct uart_port *port)
197{
198 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
199
200 UART_CLEAR_IER(uart, ERBFI);
201}
202
203#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
204# define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
205# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
206#else
207# define UART_GET_ANOMALY_THRESHOLD(uart) 0
208# define UART_SET_ANOMALY_THRESHOLD(uart, v)
209#endif
210
211#ifdef CONFIG_SERIAL_BFIN_PIO
212static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
213{
214 unsigned int status, ch, flg;
215 static struct timeval anomaly_start = { .tv_sec = 0 };
216
217 status = UART_GET_LSR(uart);
218 UART_CLEAR_LSR(uart);
219
220 ch = UART_GET_CHAR(uart);
221 uart->port.icount.rx++;
222
223#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
224 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
225 if (kgdb_connected && kgdboc_port_line == uart->port.line
226 && kgdboc_break_enabled)
227 if (ch == 0x3) {
228 kgdb_breakpoint();
229 return;
230 }
231
232 if (!uart->port.state)
233 return;
234#endif
235 if (ANOMALY_05000363) {
236
237
238
239
240
241
242
243
244
245
246
247
248 if (anomaly_start.tv_sec) {
249 struct timeval curr;
250 suseconds_t usecs;
251
252 if ((~ch & (~ch + 1)) & 0xff)
253 goto known_good_char;
254
255 do_gettimeofday(&curr);
256 if (curr.tv_sec - anomaly_start.tv_sec > 1)
257 goto known_good_char;
258
259 usecs = 0;
260 if (curr.tv_sec != anomaly_start.tv_sec)
261 usecs += USEC_PER_SEC;
262 usecs += curr.tv_usec - anomaly_start.tv_usec;
263
264 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
265 goto known_good_char;
266
267 if (ch)
268 anomaly_start.tv_sec = 0;
269 else
270 anomaly_start = curr;
271
272 return;
273
274 known_good_char:
275 status &= ~BI;
276 anomaly_start.tv_sec = 0;
277 }
278 }
279
280 if (status & BI) {
281 if (ANOMALY_05000363)
282 if (bfin_revid() < 5)
283 do_gettimeofday(&anomaly_start);
284 uart->port.icount.brk++;
285 if (uart_handle_break(&uart->port))
286 goto ignore_char;
287 status &= ~(PE | FE);
288 }
289 if (status & PE)
290 uart->port.icount.parity++;
291 if (status & OE)
292 uart->port.icount.overrun++;
293 if (status & FE)
294 uart->port.icount.frame++;
295
296 status &= uart->port.read_status_mask;
297
298 if (status & BI)
299 flg = TTY_BREAK;
300 else if (status & PE)
301 flg = TTY_PARITY;
302 else if (status & FE)
303 flg = TTY_FRAME;
304 else
305 flg = TTY_NORMAL;
306
307 if (uart_handle_sysrq_char(&uart->port, ch))
308 goto ignore_char;
309
310 uart_insert_char(&uart->port, status, OE, ch, flg);
311
312 ignore_char:
313 tty_flip_buffer_push(&uart->port.state->port);
314}
315
316static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
317{
318 struct circ_buf *xmit = &uart->port.state->xmit;
319
320 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
321#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
322
323 UART_PUT_LSR(uart, TFI);
324#endif
325
326
327
328
329
330 UART_CLEAR_IER(uart, ETBEI);
331 return;
332 }
333
334 if (uart->port.x_char) {
335 UART_PUT_CHAR(uart, uart->port.x_char);
336 uart->port.icount.tx++;
337 uart->port.x_char = 0;
338 }
339
340 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
341 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
342 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
343 uart->port.icount.tx++;
344 }
345
346 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
347 uart_write_wakeup(&uart->port);
348}
349
350static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
351{
352 struct bfin_serial_port *uart = dev_id;
353
354 while (UART_GET_LSR(uart) & DR)
355 bfin_serial_rx_chars(uart);
356
357 return IRQ_HANDLED;
358}
359
360static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
361{
362 struct bfin_serial_port *uart = dev_id;
363
364 spin_lock(&uart->port.lock);
365 if (UART_GET_LSR(uart) & THRE)
366 bfin_serial_tx_chars(uart);
367 spin_unlock(&uart->port.lock);
368
369 return IRQ_HANDLED;
370}
371#endif
372
373#ifdef CONFIG_SERIAL_BFIN_DMA
374static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
375{
376 struct circ_buf *xmit = &uart->port.state->xmit;
377
378 uart->tx_done = 0;
379
380 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
381 uart->tx_count = 0;
382 uart->tx_done = 1;
383 return;
384 }
385
386 if (uart->port.x_char) {
387 UART_PUT_CHAR(uart, uart->port.x_char);
388 uart->port.icount.tx++;
389 uart->port.x_char = 0;
390 }
391
392 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
393 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
394 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
395 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
396 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
397 set_dma_config(uart->tx_dma_channel,
398 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
399 INTR_ON_BUF,
400 DIMENSION_LINEAR,
401 DATA_SIZE_8,
402 DMA_SYNC_RESTART));
403 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
404 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
405 set_dma_x_modify(uart->tx_dma_channel, 1);
406 SSYNC();
407 enable_dma(uart->tx_dma_channel);
408
409 UART_SET_IER(uart, ETBEI);
410}
411
412static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
413{
414 int i, flg, status;
415
416 status = UART_GET_LSR(uart);
417 UART_CLEAR_LSR(uart);
418
419 uart->port.icount.rx +=
420 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
421 UART_XMIT_SIZE);
422
423 if (status & BI) {
424 uart->port.icount.brk++;
425 if (uart_handle_break(&uart->port))
426 goto dma_ignore_char;
427 status &= ~(PE | FE);
428 }
429 if (status & PE)
430 uart->port.icount.parity++;
431 if (status & OE)
432 uart->port.icount.overrun++;
433 if (status & FE)
434 uart->port.icount.frame++;
435
436 status &= uart->port.read_status_mask;
437
438 if (status & BI)
439 flg = TTY_BREAK;
440 else if (status & PE)
441 flg = TTY_PARITY;
442 else if (status & FE)
443 flg = TTY_FRAME;
444 else
445 flg = TTY_NORMAL;
446
447 for (i = uart->rx_dma_buf.tail; ; i++) {
448 if (i >= UART_XMIT_SIZE)
449 i = 0;
450 if (i == uart->rx_dma_buf.head)
451 break;
452 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
453 uart_insert_char(&uart->port, status, OE,
454 uart->rx_dma_buf.buf[i], flg);
455 }
456
457 dma_ignore_char:
458 tty_flip_buffer_push(&uart->port.state->port);
459}
460
461void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
462{
463 int x_pos, pos;
464 unsigned long flags;
465
466 spin_lock_irqsave(&uart->rx_lock, flags);
467
468
469
470
471
472
473
474
475
476
477 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
478 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
479 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
480 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
481 uart->rx_dma_nrows = 0;
482 x_pos = DMA_RX_XCOUNT - x_pos;
483 if (x_pos == DMA_RX_XCOUNT)
484 x_pos = 0;
485
486 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
487
488
489
490 if (pos > uart->rx_dma_buf.tail ||
491 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
492 uart->rx_dma_buf.head = pos;
493 bfin_serial_dma_rx_chars(uart);
494 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
495 }
496
497 spin_unlock_irqrestore(&uart->rx_lock, flags);
498
499 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
500}
501
502static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
503{
504 struct bfin_serial_port *uart = dev_id;
505 struct circ_buf *xmit = &uart->port.state->xmit;
506
507 spin_lock(&uart->port.lock);
508 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
509 disable_dma(uart->tx_dma_channel);
510 clear_dma_irqstat(uart->tx_dma_channel);
511
512
513
514
515
516 UART_CLEAR_IER(uart, ETBEI);
517 uart->port.icount.tx += uart->tx_count;
518 if (!(xmit->tail == 0 && xmit->head == 0)) {
519 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
520
521 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
522 uart_write_wakeup(&uart->port);
523 }
524
525 bfin_serial_dma_tx_chars(uart);
526 }
527
528 spin_unlock(&uart->port.lock);
529 return IRQ_HANDLED;
530}
531
532static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
533{
534 struct bfin_serial_port *uart = dev_id;
535 unsigned int irqstat;
536 int x_pos, pos;
537
538 spin_lock(&uart->rx_lock);
539 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
540 clear_dma_irqstat(uart->rx_dma_channel);
541
542 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
543 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
544 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
545 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
546 uart->rx_dma_nrows = 0;
547
548 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
549 if (pos > uart->rx_dma_buf.tail ||
550 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
551 uart->rx_dma_buf.head = pos;
552 bfin_serial_dma_rx_chars(uart);
553 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
554 }
555
556 spin_unlock(&uart->rx_lock);
557
558 return IRQ_HANDLED;
559}
560#endif
561
562
563
564
565static unsigned int bfin_serial_tx_empty(struct uart_port *port)
566{
567 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
568 unsigned int lsr;
569
570 lsr = UART_GET_LSR(uart);
571 if (lsr & TEMT)
572 return TIOCSER_TEMT;
573 else
574 return 0;
575}
576
577static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
578{
579 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
580 u32 lcr = UART_GET_LCR(uart);
581 if (break_state)
582 lcr |= SB;
583 else
584 lcr &= ~SB;
585 UART_PUT_LCR(uart, lcr);
586 SSYNC();
587}
588
589static int bfin_serial_startup(struct uart_port *port)
590{
591 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
592
593#ifdef CONFIG_SERIAL_BFIN_DMA
594 dma_addr_t dma_handle;
595
596 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
597 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
598 return -EBUSY;
599 }
600
601 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
602 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
603 free_dma(uart->rx_dma_channel);
604 return -EBUSY;
605 }
606
607 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
608 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
609
610 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
611 uart->rx_dma_buf.head = 0;
612 uart->rx_dma_buf.tail = 0;
613 uart->rx_dma_nrows = 0;
614
615 set_dma_config(uart->rx_dma_channel,
616 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
617 INTR_ON_ROW, DIMENSION_2D,
618 DATA_SIZE_8,
619 DMA_SYNC_RESTART));
620 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
621 set_dma_x_modify(uart->rx_dma_channel, 1);
622 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
623 set_dma_y_modify(uart->rx_dma_channel, 1);
624 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
625 enable_dma(uart->rx_dma_channel);
626
627 uart->rx_dma_timer.data = (unsigned long)(uart);
628 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
629 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
630 add_timer(&(uart->rx_dma_timer));
631#else
632# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
633 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
634 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
635 kgdboc_break_enabled = 0;
636 else {
637# endif
638 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
639 "BFIN_UART_RX", uart)) {
640 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
641 return -EBUSY;
642 }
643
644 if (request_irq
645 (uart->tx_irq, bfin_serial_tx_int, 0,
646 "BFIN_UART_TX", uart)) {
647 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
648 free_irq(uart->rx_irq, uart);
649 return -EBUSY;
650 }
651
652# ifdef CONFIG_BF54x
653 {
654
655
656
657
658
659
660
661 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
662
663 switch (uart->rx_irq) {
664 case IRQ_UART3_RX:
665 uart_dma_ch_rx = CH_UART3_RX;
666 uart_dma_ch_tx = CH_UART3_TX;
667 break;
668 case IRQ_UART2_RX:
669 uart_dma_ch_rx = CH_UART2_RX;
670 uart_dma_ch_tx = CH_UART2_TX;
671 break;
672 default:
673 uart_dma_ch_rx = uart_dma_ch_tx = 0;
674 break;
675 }
676
677 if (uart_dma_ch_rx &&
678 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
679 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
680 free_irq(uart->rx_irq, uart);
681 free_irq(uart->tx_irq, uart);
682 return -EBUSY;
683 }
684 if (uart_dma_ch_tx &&
685 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
686 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
687 free_dma(uart_dma_ch_rx);
688 free_irq(uart->rx_irq, uart);
689 free_irq(uart->tx_irq, uart);
690 return -EBUSY;
691 }
692 }
693# endif
694# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
695 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
696 }
697# endif
698#endif
699
700#ifdef CONFIG_SERIAL_BFIN_CTSRTS
701 if (uart->cts_pin >= 0) {
702 if (request_irq(gpio_to_irq(uart->cts_pin),
703 bfin_serial_mctrl_cts_int,
704 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
705 0, "BFIN_UART_CTS", uart)) {
706 uart->cts_pin = -1;
707 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
708 }
709 }
710 if (uart->rts_pin >= 0) {
711 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
712 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
713 uart->rts_pin = -1;
714 } else
715 gpio_direction_output(uart->rts_pin, 0);
716 }
717#endif
718#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
719 if (uart->cts_pin >= 0) {
720 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
721 0, "BFIN_UART_MODEM_STATUS", uart)) {
722 uart->cts_pin = -1;
723 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
724 }
725
726
727 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
728 UART_SET_IER(uart, EDSSI);
729 }
730#endif
731
732 UART_SET_IER(uart, ERBFI);
733 return 0;
734}
735
736static void bfin_serial_shutdown(struct uart_port *port)
737{
738 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
739
740#ifdef CONFIG_SERIAL_BFIN_DMA
741 disable_dma(uart->tx_dma_channel);
742 free_dma(uart->tx_dma_channel);
743 disable_dma(uart->rx_dma_channel);
744 free_dma(uart->rx_dma_channel);
745 del_timer(&(uart->rx_dma_timer));
746 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
747#else
748#ifdef CONFIG_BF54x
749 switch (uart->port.irq) {
750 case IRQ_UART3_RX:
751 free_dma(CH_UART3_RX);
752 free_dma(CH_UART3_TX);
753 break;
754 case IRQ_UART2_RX:
755 free_dma(CH_UART2_RX);
756 free_dma(CH_UART2_TX);
757 break;
758 default:
759 break;
760 }
761#endif
762 free_irq(uart->rx_irq, uart);
763 free_irq(uart->tx_irq, uart);
764#endif
765
766#ifdef CONFIG_SERIAL_BFIN_CTSRTS
767 if (uart->cts_pin >= 0)
768 free_irq(gpio_to_irq(uart->cts_pin), uart);
769 if (uart->rts_pin >= 0)
770 gpio_free(uart->rts_pin);
771#endif
772#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
773 if (uart->cts_pin >= 0)
774 free_irq(uart->status_irq, uart);
775#endif
776}
777
778static void
779bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
780 struct ktermios *old)
781{
782 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
783 unsigned long flags;
784 unsigned int baud, quot;
785 unsigned int ier, lcr = 0;
786 unsigned long timeout;
787
788#ifdef CONFIG_SERIAL_BFIN_CTSRTS
789 if (old == NULL && uart->cts_pin != -1)
790 termios->c_cflag |= CRTSCTS;
791 else if (uart->cts_pin == -1)
792 termios->c_cflag &= ~CRTSCTS;
793#endif
794
795 switch (termios->c_cflag & CSIZE) {
796 case CS8:
797 lcr = WLS(8);
798 break;
799 case CS7:
800 lcr = WLS(7);
801 break;
802 case CS6:
803 lcr = WLS(6);
804 break;
805 case CS5:
806 lcr = WLS(5);
807 break;
808 default:
809 printk(KERN_ERR "%s: word length not supported\n",
810 __func__);
811 }
812
813
814
815
816 if (termios->c_cflag & CSTOPB) {
817 if (ANOMALY_05000231)
818 printk(KERN_WARNING "STOP bits other than 1 is not "
819 "supported in case of anomaly 05000231.\n");
820 else
821 lcr |= STB;
822 }
823 if (termios->c_cflag & PARENB)
824 lcr |= PEN;
825 if (!(termios->c_cflag & PARODD))
826 lcr |= EPS;
827 if (termios->c_cflag & CMSPAR)
828 lcr |= STP;
829
830 spin_lock_irqsave(&uart->port.lock, flags);
831
832 port->read_status_mask = OE;
833 if (termios->c_iflag & INPCK)
834 port->read_status_mask |= (FE | PE);
835 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
836 port->read_status_mask |= BI;
837
838
839
840
841 port->ignore_status_mask = 0;
842 if (termios->c_iflag & IGNPAR)
843 port->ignore_status_mask |= FE | PE;
844 if (termios->c_iflag & IGNBRK) {
845 port->ignore_status_mask |= BI;
846
847
848
849
850 if (termios->c_iflag & IGNPAR)
851 port->ignore_status_mask |= OE;
852 }
853
854 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
855 quot = uart_get_divisor(port, baud);
856
857
858 if (termios->c_line != N_IRDA)
859 quot -= ANOMALY_05000230;
860
861 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
862
863
864 timeout = jiffies + msecs_to_jiffies(10);
865 while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
866 if (time_after(jiffies, timeout)) {
867 dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
868 break;
869 }
870
871
872 ier = UART_GET_IER(uart);
873 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
874 UART_DISABLE_INTS(uart);
875
876
877 UART_SET_DLAB(uart);
878
879 UART_PUT_CLK(uart, quot);
880 SSYNC();
881
882
883 UART_CLEAR_DLAB(uart);
884
885 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
886
887
888 UART_ENABLE_INTS(uart, ier);
889 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
890
891
892 uart_update_timeout(port, termios->c_cflag, baud);
893
894 spin_unlock_irqrestore(&uart->port.lock, flags);
895}
896
897static const char *bfin_serial_type(struct uart_port *port)
898{
899 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
900
901 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
902}
903
904
905
906
907static void bfin_serial_release_port(struct uart_port *port)
908{
909}
910
911
912
913
914static int bfin_serial_request_port(struct uart_port *port)
915{
916 return 0;
917}
918
919
920
921
922static void bfin_serial_config_port(struct uart_port *port, int flags)
923{
924 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
925
926 if (flags & UART_CONFIG_TYPE &&
927 bfin_serial_request_port(&uart->port) == 0)
928 uart->port.type = PORT_BFIN;
929}
930
931
932
933
934
935
936static int
937bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
938{
939 return 0;
940}
941
942
943
944
945
946static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
947{
948 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
949 unsigned int val;
950
951 switch (ld) {
952 case N_IRDA:
953 val = UART_GET_GCTL(uart);
954 val |= (UMOD_IRDA | RPOLC);
955 UART_PUT_GCTL(uart, val);
956 break;
957 default:
958 val = UART_GET_GCTL(uart);
959 val &= ~(UMOD_MASK | RPOLC);
960 UART_PUT_GCTL(uart, val);
961 }
962}
963
964static void bfin_serial_reset_irda(struct uart_port *port)
965{
966 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
967 unsigned int val;
968
969 val = UART_GET_GCTL(uart);
970 val &= ~(UMOD_MASK | RPOLC);
971 UART_PUT_GCTL(uart, val);
972 SSYNC();
973 val |= (UMOD_IRDA | RPOLC);
974 UART_PUT_GCTL(uart, val);
975 SSYNC();
976}
977
978#ifdef CONFIG_CONSOLE_POLL
979
980
981
982
983static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
984{
985 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
986
987 while (!(UART_GET_LSR(uart) & THRE))
988 cpu_relax();
989
990 UART_CLEAR_DLAB(uart);
991 UART_PUT_CHAR(uart, (unsigned char)chr);
992}
993
994static int bfin_serial_poll_get_char(struct uart_port *port)
995{
996 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
997 unsigned char chr;
998
999 while (!(UART_GET_LSR(uart) & DR))
1000 cpu_relax();
1001
1002 UART_CLEAR_DLAB(uart);
1003 chr = UART_GET_CHAR(uart);
1004
1005 return chr;
1006}
1007#endif
1008
1009static struct uart_ops bfin_serial_pops = {
1010 .tx_empty = bfin_serial_tx_empty,
1011 .set_mctrl = bfin_serial_set_mctrl,
1012 .get_mctrl = bfin_serial_get_mctrl,
1013 .stop_tx = bfin_serial_stop_tx,
1014 .start_tx = bfin_serial_start_tx,
1015 .stop_rx = bfin_serial_stop_rx,
1016 .break_ctl = bfin_serial_break_ctl,
1017 .startup = bfin_serial_startup,
1018 .shutdown = bfin_serial_shutdown,
1019 .set_termios = bfin_serial_set_termios,
1020 .set_ldisc = bfin_serial_set_ldisc,
1021 .type = bfin_serial_type,
1022 .release_port = bfin_serial_release_port,
1023 .request_port = bfin_serial_request_port,
1024 .config_port = bfin_serial_config_port,
1025 .verify_port = bfin_serial_verify_port,
1026#ifdef CONFIG_CONSOLE_POLL
1027 .poll_put_char = bfin_serial_poll_put_char,
1028 .poll_get_char = bfin_serial_poll_get_char,
1029#endif
1030};
1031
1032#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1033
1034
1035
1036
1037static void __init
1038bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1039 int *parity, int *bits)
1040{
1041 unsigned int status;
1042
1043 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1044 if (status == (ERBFI | ETBEI)) {
1045
1046 u32 lcr, clk;
1047
1048 lcr = UART_GET_LCR(uart);
1049
1050 *parity = 'n';
1051 if (lcr & PEN) {
1052 if (lcr & EPS)
1053 *parity = 'e';
1054 else
1055 *parity = 'o';
1056 }
1057 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1058
1059
1060 UART_SET_DLAB(uart);
1061
1062 clk = UART_GET_CLK(uart);
1063
1064
1065 UART_CLEAR_DLAB(uart);
1066
1067 *baud = get_sclk() / (16*clk);
1068 }
1069 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1070}
1071
1072static struct uart_driver bfin_serial_reg;
1073
1074static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1075{
1076 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1077 while (!(UART_GET_LSR(uart) & THRE))
1078 barrier();
1079 UART_PUT_CHAR(uart, ch);
1080}
1081
1082#endif
1083
1084
1085#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1086#define CLASS_BFIN_CONSOLE "bfin-console"
1087
1088
1089
1090static void
1091bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1092{
1093 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1094 unsigned long flags;
1095
1096 spin_lock_irqsave(&uart->port.lock, flags);
1097 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1098 spin_unlock_irqrestore(&uart->port.lock, flags);
1099
1100}
1101
1102static int __init
1103bfin_serial_console_setup(struct console *co, char *options)
1104{
1105 struct bfin_serial_port *uart;
1106 int baud = 57600;
1107 int bits = 8;
1108 int parity = 'n';
1109# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1110 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1111 int flow = 'r';
1112# else
1113 int flow = 'n';
1114# endif
1115
1116
1117
1118
1119
1120
1121 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1122 return -ENODEV;
1123
1124 uart = bfin_serial_ports[co->index];
1125 if (!uart)
1126 return -ENODEV;
1127
1128 if (options)
1129 uart_parse_options(options, &baud, &parity, &bits, &flow);
1130 else
1131 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1132
1133 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1134}
1135
1136static struct console bfin_serial_console = {
1137 .name = BFIN_SERIAL_DEV_NAME,
1138 .write = bfin_serial_console_write,
1139 .device = uart_console_device,
1140 .setup = bfin_serial_console_setup,
1141 .flags = CON_PRINTBUFFER,
1142 .index = -1,
1143 .data = &bfin_serial_reg,
1144};
1145#define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1146#else
1147#define BFIN_SERIAL_CONSOLE NULL
1148#endif
1149
1150#ifdef CONFIG_EARLY_PRINTK
1151static struct bfin_serial_port bfin_earlyprintk_port;
1152#define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1153
1154
1155
1156
1157static void
1158bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1159{
1160 unsigned long flags;
1161
1162 if (bfin_earlyprintk_port.port.line != co->index)
1163 return;
1164
1165 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1166 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1167 bfin_serial_console_putchar);
1168 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1169}
1170
1171
1172
1173
1174
1175
1176
1177static struct console bfin_early_serial_console __initdata = {
1178 .name = "early_BFuart",
1179 .write = bfin_earlyprintk_console_write,
1180 .device = uart_console_device,
1181 .flags = CON_PRINTBUFFER,
1182 .index = -1,
1183 .data = &bfin_serial_reg,
1184};
1185#endif
1186
1187static struct uart_driver bfin_serial_reg = {
1188 .owner = THIS_MODULE,
1189 .driver_name = DRIVER_NAME,
1190 .dev_name = BFIN_SERIAL_DEV_NAME,
1191 .major = BFIN_SERIAL_MAJOR,
1192 .minor = BFIN_SERIAL_MINOR,
1193 .nr = BFIN_UART_NR_PORTS,
1194 .cons = BFIN_SERIAL_CONSOLE,
1195};
1196
1197static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1198{
1199 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1200
1201 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1202}
1203
1204static int bfin_serial_resume(struct platform_device *pdev)
1205{
1206 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1207
1208 return uart_resume_port(&bfin_serial_reg, &uart->port);
1209}
1210
1211static int bfin_serial_probe(struct platform_device *pdev)
1212{
1213 struct resource *res;
1214 struct bfin_serial_port *uart = NULL;
1215 int ret = 0;
1216
1217 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1218 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1219 return -ENOENT;
1220 }
1221
1222 if (bfin_serial_ports[pdev->id] == NULL) {
1223
1224 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1225 if (!uart) {
1226 dev_err(&pdev->dev,
1227 "fail to malloc bfin_serial_port\n");
1228 return -ENOMEM;
1229 }
1230 bfin_serial_ports[pdev->id] = uart;
1231
1232#ifdef CONFIG_EARLY_PRINTK
1233 if (!(bfin_earlyprintk_port.port.membase
1234 && bfin_earlyprintk_port.port.line == pdev->id)) {
1235
1236
1237
1238
1239#endif
1240 ret = peripheral_request_list(
1241 dev_get_platdata(&pdev->dev),
1242 DRIVER_NAME);
1243 if (ret) {
1244 dev_err(&pdev->dev,
1245 "fail to request bfin serial peripherals\n");
1246 goto out_error_free_mem;
1247 }
1248#ifdef CONFIG_EARLY_PRINTK
1249 }
1250#endif
1251
1252 spin_lock_init(&uart->port.lock);
1253 uart->port.uartclk = get_sclk();
1254 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1255 uart->port.ops = &bfin_serial_pops;
1256 uart->port.line = pdev->id;
1257 uart->port.iotype = UPIO_MEM;
1258 uart->port.flags = UPF_BOOT_AUTOCONF;
1259
1260 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1261 if (res == NULL) {
1262 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1263 ret = -ENOENT;
1264 goto out_error_free_peripherals;
1265 }
1266
1267 uart->port.membase = ioremap(res->start, resource_size(res));
1268 if (!uart->port.membase) {
1269 dev_err(&pdev->dev, "Cannot map uart IO\n");
1270 ret = -ENXIO;
1271 goto out_error_free_peripherals;
1272 }
1273 uart->port.mapbase = res->start;
1274
1275 uart->tx_irq = platform_get_irq(pdev, 0);
1276 if (uart->tx_irq < 0) {
1277 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1278 ret = -ENOENT;
1279 goto out_error_unmap;
1280 }
1281
1282 uart->rx_irq = platform_get_irq(pdev, 1);
1283 if (uart->rx_irq < 0) {
1284 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1285 ret = -ENOENT;
1286 goto out_error_unmap;
1287 }
1288 uart->port.irq = uart->rx_irq;
1289
1290 uart->status_irq = platform_get_irq(pdev, 2);
1291 if (uart->status_irq < 0) {
1292 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1293 ret = -ENOENT;
1294 goto out_error_unmap;
1295 }
1296
1297#ifdef CONFIG_SERIAL_BFIN_DMA
1298 spin_lock_init(&uart->rx_lock);
1299 uart->tx_done = 1;
1300 uart->tx_count = 0;
1301
1302 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1303 if (res == NULL) {
1304 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1305 ret = -ENOENT;
1306 goto out_error_unmap;
1307 }
1308 uart->tx_dma_channel = res->start;
1309
1310 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1311 if (res == NULL) {
1312 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1313 ret = -ENOENT;
1314 goto out_error_unmap;
1315 }
1316 uart->rx_dma_channel = res->start;
1317
1318 init_timer(&(uart->rx_dma_timer));
1319#endif
1320
1321#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1322 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1323 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1324 if (res == NULL)
1325 uart->cts_pin = -1;
1326 else
1327 uart->cts_pin = res->start;
1328
1329 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1330 if (res == NULL)
1331 uart->rts_pin = -1;
1332 else
1333 uart->rts_pin = res->start;
1334#endif
1335 }
1336
1337#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1338 if (!is_early_platform_device(pdev)) {
1339#endif
1340 uart = bfin_serial_ports[pdev->id];
1341 uart->port.dev = &pdev->dev;
1342 dev_set_drvdata(&pdev->dev, uart);
1343 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1344#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1345 }
1346#endif
1347
1348 if (!ret)
1349 return 0;
1350
1351 if (uart) {
1352out_error_unmap:
1353 iounmap(uart->port.membase);
1354out_error_free_peripherals:
1355 peripheral_free_list(dev_get_platdata(&pdev->dev));
1356out_error_free_mem:
1357 kfree(uart);
1358 bfin_serial_ports[pdev->id] = NULL;
1359 }
1360
1361 return ret;
1362}
1363
1364static int bfin_serial_remove(struct platform_device *pdev)
1365{
1366 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1367
1368 dev_set_drvdata(&pdev->dev, NULL);
1369
1370 if (uart) {
1371 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1372 iounmap(uart->port.membase);
1373 peripheral_free_list(dev_get_platdata(&pdev->dev));
1374 kfree(uart);
1375 bfin_serial_ports[pdev->id] = NULL;
1376 }
1377
1378 return 0;
1379}
1380
1381static struct platform_driver bfin_serial_driver = {
1382 .probe = bfin_serial_probe,
1383 .remove = bfin_serial_remove,
1384 .suspend = bfin_serial_suspend,
1385 .resume = bfin_serial_resume,
1386 .driver = {
1387 .name = DRIVER_NAME,
1388 .owner = THIS_MODULE,
1389 },
1390};
1391
1392#if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1393static struct early_platform_driver early_bfin_serial_driver __initdata = {
1394 .class_str = CLASS_BFIN_CONSOLE,
1395 .pdrv = &bfin_serial_driver,
1396 .requested_id = EARLY_PLATFORM_ID_UNSET,
1397};
1398
1399static int __init bfin_serial_rs_console_init(void)
1400{
1401 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1402
1403 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1404
1405 register_console(&bfin_serial_console);
1406
1407 return 0;
1408}
1409console_initcall(bfin_serial_rs_console_init);
1410#endif
1411
1412#ifdef CONFIG_EARLY_PRINTK
1413
1414
1415
1416
1417static int bfin_earlyprintk_probe(struct platform_device *pdev)
1418{
1419 struct resource *res;
1420 int ret;
1421
1422 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1423 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1424 return -ENOENT;
1425 }
1426
1427 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1428 DRIVER_NAME);
1429 if (ret) {
1430 dev_err(&pdev->dev,
1431 "fail to request bfin serial peripherals\n");
1432 return ret;
1433 }
1434
1435 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1436 if (res == NULL) {
1437 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1438 ret = -ENOENT;
1439 goto out_error_free_peripherals;
1440 }
1441
1442 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1443 resource_size(res));
1444 if (!bfin_earlyprintk_port.port.membase) {
1445 dev_err(&pdev->dev, "Cannot map uart IO\n");
1446 ret = -ENXIO;
1447 goto out_error_free_peripherals;
1448 }
1449 bfin_earlyprintk_port.port.mapbase = res->start;
1450 bfin_earlyprintk_port.port.line = pdev->id;
1451 bfin_earlyprintk_port.port.uartclk = get_sclk();
1452 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1453 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1454
1455 return 0;
1456
1457out_error_free_peripherals:
1458 peripheral_free_list(dev_get_platdata(&pdev->dev));
1459
1460 return ret;
1461}
1462
1463static struct platform_driver bfin_earlyprintk_driver = {
1464 .probe = bfin_earlyprintk_probe,
1465 .driver = {
1466 .name = DRIVER_NAME,
1467 .owner = THIS_MODULE,
1468 },
1469};
1470
1471static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1472 .class_str = CLASS_BFIN_EARLYPRINTK,
1473 .pdrv = &bfin_earlyprintk_driver,
1474 .requested_id = EARLY_PLATFORM_ID_UNSET,
1475};
1476
1477struct console __init *bfin_earlyserial_init(unsigned int port,
1478 unsigned int cflag)
1479{
1480 struct ktermios t;
1481 char port_name[20];
1482
1483 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1484 return NULL;
1485
1486
1487
1488
1489
1490 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1491 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1492 port_name);
1493 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1494
1495 if (!bfin_earlyprintk_port.port.membase)
1496 return NULL;
1497
1498#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1499
1500
1501
1502
1503 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1504#endif
1505
1506 bfin_early_serial_console.index = port;
1507 t.c_cflag = cflag;
1508 t.c_iflag = 0;
1509 t.c_oflag = 0;
1510 t.c_lflag = ICANON;
1511 t.c_line = port;
1512 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1513
1514 return &bfin_early_serial_console;
1515}
1516#endif
1517
1518static int __init bfin_serial_init(void)
1519{
1520 int ret;
1521
1522 pr_info("Blackfin serial driver\n");
1523
1524 ret = uart_register_driver(&bfin_serial_reg);
1525 if (ret) {
1526 pr_err("failed to register %s:%d\n",
1527 bfin_serial_reg.driver_name, ret);
1528 }
1529
1530 ret = platform_driver_register(&bfin_serial_driver);
1531 if (ret) {
1532 pr_err("fail to register bfin uart\n");
1533 uart_unregister_driver(&bfin_serial_reg);
1534 }
1535
1536 return ret;
1537}
1538
1539static void __exit bfin_serial_exit(void)
1540{
1541 platform_driver_unregister(&bfin_serial_driver);
1542 uart_unregister_driver(&bfin_serial_reg);
1543}
1544
1545
1546module_init(bfin_serial_init);
1547module_exit(bfin_serial_exit);
1548
1549MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1550MODULE_DESCRIPTION("Blackfin generic serial port driver");
1551MODULE_LICENSE("GPL");
1552MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1553MODULE_ALIAS("platform:bfin-uart");
1554