linux/drivers/usb/gadget/udc/pxa27x_udc.c
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   1/*
   2 * Handles the Intel 27x USB Device Controller (UDC)
   3 *
   4 * Inspired by original driver by Frank Becker, David Brownell, and others.
   5 * Copyright (C) 2008 Robert Jarzmik
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 */
  12#include <linux/module.h>
  13#include <linux/kernel.h>
  14#include <linux/types.h>
  15#include <linux/errno.h>
  16#include <linux/err.h>
  17#include <linux/platform_device.h>
  18#include <linux/delay.h>
  19#include <linux/list.h>
  20#include <linux/interrupt.h>
  21#include <linux/proc_fs.h>
  22#include <linux/clk.h>
  23#include <linux/irq.h>
  24#include <linux/gpio.h>
  25#include <linux/slab.h>
  26#include <linux/prefetch.h>
  27#include <linux/byteorder/generic.h>
  28#include <linux/platform_data/pxa2xx_udc.h>
  29
  30#include <linux/usb.h>
  31#include <linux/usb/ch9.h>
  32#include <linux/usb/gadget.h>
  33
  34#include "pxa27x_udc.h"
  35
  36/*
  37 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
  38 * series processors.
  39 *
  40 * Such controller drivers work with a gadget driver.  The gadget driver
  41 * returns descriptors, implements configuration and data protocols used
  42 * by the host to interact with this device, and allocates endpoints to
  43 * the different protocol interfaces.  The controller driver virtualizes
  44 * usb hardware so that the gadget drivers will be more portable.
  45 *
  46 * This UDC hardware wants to implement a bit too much USB protocol. The
  47 * biggest issues are:  that the endpoints have to be set up before the
  48 * controller can be enabled (minor, and not uncommon); and each endpoint
  49 * can only have one configuration, interface and alternative interface
  50 * number (major, and very unusual). Once set up, these cannot be changed
  51 * without a controller reset.
  52 *
  53 * The workaround is to setup all combinations necessary for the gadgets which
  54 * will work with this driver. This is done in pxa_udc structure, statically.
  55 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
  56 * (You could modify this if needed.  Some drivers have a "fifo_mode" module
  57 * parameter to facilitate such changes.)
  58 *
  59 * The combinations have been tested with these gadgets :
  60 *  - zero gadget
  61 *  - file storage gadget
  62 *  - ether gadget
  63 *
  64 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
  65 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
  66 *
  67 * All the requests are handled the same way :
  68 *  - the drivers tries to handle the request directly to the IO
  69 *  - if the IO fifo is not big enough, the remaining is send/received in
  70 *    interrupt handling.
  71 */
  72
  73#define DRIVER_VERSION  "2008-04-18"
  74#define DRIVER_DESC     "PXA 27x USB Device Controller driver"
  75
  76static const char driver_name[] = "pxa27x_udc";
  77static struct pxa_udc *the_controller;
  78
  79static void handle_ep(struct pxa_ep *ep);
  80
  81/*
  82 * Debug filesystem
  83 */
  84#ifdef CONFIG_USB_GADGET_DEBUG_FS
  85
  86#include <linux/debugfs.h>
  87#include <linux/uaccess.h>
  88#include <linux/seq_file.h>
  89
  90static int state_dbg_show(struct seq_file *s, void *p)
  91{
  92        struct pxa_udc *udc = s->private;
  93        int pos = 0, ret;
  94        u32 tmp;
  95
  96        ret = -ENODEV;
  97        if (!udc->driver)
  98                goto out;
  99
 100        /* basic device status */
 101        pos += seq_printf(s, DRIVER_DESC "\n"
 102                         "%s version: %s\nGadget driver: %s\n",
 103                         driver_name, DRIVER_VERSION,
 104                         udc->driver ? udc->driver->driver.name : "(none)");
 105
 106        tmp = udc_readl(udc, UDCCR);
 107        pos += seq_printf(s,
 108                         "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
 109                         "con=%d,inter=%d,altinter=%d\n", tmp,
 110                         (tmp & UDCCR_OEN) ? " oen":"",
 111                         (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
 112                         (tmp & UDCCR_AHNP) ? " rem" : "",
 113                         (tmp & UDCCR_BHNP) ? " rstir" : "",
 114                         (tmp & UDCCR_DWRE) ? " dwre" : "",
 115                         (tmp & UDCCR_SMAC) ? " smac" : "",
 116                         (tmp & UDCCR_EMCE) ? " emce" : "",
 117                         (tmp & UDCCR_UDR) ? " udr" : "",
 118                         (tmp & UDCCR_UDA) ? " uda" : "",
 119                         (tmp & UDCCR_UDE) ? " ude" : "",
 120                         (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
 121                         (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
 122                         (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
 123        /* registers for device and ep0 */
 124        pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
 125                        udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
 126        pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
 127                        udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
 128        pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
 129        pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
 130                        "reconfig=%lu\n",
 131                        udc->stats.irqs_reset, udc->stats.irqs_suspend,
 132                        udc->stats.irqs_resume, udc->stats.irqs_reconfig);
 133
 134        ret = 0;
 135out:
 136        return ret;
 137}
 138
 139static int queues_dbg_show(struct seq_file *s, void *p)
 140{
 141        struct pxa_udc *udc = s->private;
 142        struct pxa_ep *ep;
 143        struct pxa27x_request *req;
 144        int pos = 0, i, maxpkt, ret;
 145
 146        ret = -ENODEV;
 147        if (!udc->driver)
 148                goto out;
 149
 150        /* dump endpoint queues */
 151        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
 152                ep = &udc->pxa_ep[i];
 153                maxpkt = ep->fifo_size;
 154                pos += seq_printf(s,  "%-12s max_pkt=%d %s\n",
 155                                EPNAME(ep), maxpkt, "pio");
 156
 157                if (list_empty(&ep->queue)) {
 158                        pos += seq_printf(s, "\t(nothing queued)\n");
 159                        continue;
 160                }
 161
 162                list_for_each_entry(req, &ep->queue, queue) {
 163                        pos += seq_printf(s,  "\treq %p len %d/%d buf %p\n",
 164                                        &req->req, req->req.actual,
 165                                        req->req.length, req->req.buf);
 166                }
 167        }
 168
 169        ret = 0;
 170out:
 171        return ret;
 172}
 173
 174static int eps_dbg_show(struct seq_file *s, void *p)
 175{
 176        struct pxa_udc *udc = s->private;
 177        struct pxa_ep *ep;
 178        int pos = 0, i, ret;
 179        u32 tmp;
 180
 181        ret = -ENODEV;
 182        if (!udc->driver)
 183                goto out;
 184
 185        ep = &udc->pxa_ep[0];
 186        tmp = udc_ep_readl(ep, UDCCSR);
 187        pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
 188                         (tmp & UDCCSR0_SA) ? " sa" : "",
 189                         (tmp & UDCCSR0_RNE) ? " rne" : "",
 190                         (tmp & UDCCSR0_FST) ? " fst" : "",
 191                         (tmp & UDCCSR0_SST) ? " sst" : "",
 192                         (tmp & UDCCSR0_DME) ? " dme" : "",
 193                         (tmp & UDCCSR0_IPR) ? " ipr" : "",
 194                         (tmp & UDCCSR0_OPC) ? " opc" : "");
 195        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
 196                ep = &udc->pxa_ep[i];
 197                tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
 198                pos += seq_printf(s, "%-12s: "
 199                                "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
 200                                "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
 201                                "udcbcr=%d\n",
 202                                EPNAME(ep),
 203                                ep->stats.in_bytes, ep->stats.in_ops,
 204                                ep->stats.out_bytes, ep->stats.out_ops,
 205                                ep->stats.irqs,
 206                                tmp, udc_ep_readl(ep, UDCCSR),
 207                                udc_ep_readl(ep, UDCBCR));
 208        }
 209
 210        ret = 0;
 211out:
 212        return ret;
 213}
 214
 215static int eps_dbg_open(struct inode *inode, struct file *file)
 216{
 217        return single_open(file, eps_dbg_show, inode->i_private);
 218}
 219
 220static int queues_dbg_open(struct inode *inode, struct file *file)
 221{
 222        return single_open(file, queues_dbg_show, inode->i_private);
 223}
 224
 225static int state_dbg_open(struct inode *inode, struct file *file)
 226{
 227        return single_open(file, state_dbg_show, inode->i_private);
 228}
 229
 230static const struct file_operations state_dbg_fops = {
 231        .owner          = THIS_MODULE,
 232        .open           = state_dbg_open,
 233        .llseek         = seq_lseek,
 234        .read           = seq_read,
 235        .release        = single_release,
 236};
 237
 238static const struct file_operations queues_dbg_fops = {
 239        .owner          = THIS_MODULE,
 240        .open           = queues_dbg_open,
 241        .llseek         = seq_lseek,
 242        .read           = seq_read,
 243        .release        = single_release,
 244};
 245
 246static const struct file_operations eps_dbg_fops = {
 247        .owner          = THIS_MODULE,
 248        .open           = eps_dbg_open,
 249        .llseek         = seq_lseek,
 250        .read           = seq_read,
 251        .release        = single_release,
 252};
 253
 254static void pxa_init_debugfs(struct pxa_udc *udc)
 255{
 256        struct dentry *root, *state, *queues, *eps;
 257
 258        root = debugfs_create_dir(udc->gadget.name, NULL);
 259        if (IS_ERR(root) || !root)
 260                goto err_root;
 261
 262        state = debugfs_create_file("udcstate", 0400, root, udc,
 263                        &state_dbg_fops);
 264        if (!state)
 265                goto err_state;
 266        queues = debugfs_create_file("queues", 0400, root, udc,
 267                        &queues_dbg_fops);
 268        if (!queues)
 269                goto err_queues;
 270        eps = debugfs_create_file("epstate", 0400, root, udc,
 271                        &eps_dbg_fops);
 272        if (!eps)
 273                goto err_eps;
 274
 275        udc->debugfs_root = root;
 276        udc->debugfs_state = state;
 277        udc->debugfs_queues = queues;
 278        udc->debugfs_eps = eps;
 279        return;
 280err_eps:
 281        debugfs_remove(eps);
 282err_queues:
 283        debugfs_remove(queues);
 284err_state:
 285        debugfs_remove(root);
 286err_root:
 287        dev_err(udc->dev, "debugfs is not available\n");
 288}
 289
 290static void pxa_cleanup_debugfs(struct pxa_udc *udc)
 291{
 292        debugfs_remove(udc->debugfs_eps);
 293        debugfs_remove(udc->debugfs_queues);
 294        debugfs_remove(udc->debugfs_state);
 295        debugfs_remove(udc->debugfs_root);
 296        udc->debugfs_eps = NULL;
 297        udc->debugfs_queues = NULL;
 298        udc->debugfs_state = NULL;
 299        udc->debugfs_root = NULL;
 300}
 301
 302#else
 303static inline void pxa_init_debugfs(struct pxa_udc *udc)
 304{
 305}
 306
 307static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
 308{
 309}
 310#endif
 311
 312/**
 313 * is_match_usb_pxa - check if usb_ep and pxa_ep match
 314 * @udc_usb_ep: usb endpoint
 315 * @ep: pxa endpoint
 316 * @config: configuration required in pxa_ep
 317 * @interface: interface required in pxa_ep
 318 * @altsetting: altsetting required in pxa_ep
 319 *
 320 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
 321 */
 322static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
 323                int config, int interface, int altsetting)
 324{
 325        if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
 326                return 0;
 327        if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
 328                return 0;
 329        if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
 330                return 0;
 331        if ((ep->config != config) || (ep->interface != interface)
 332                        || (ep->alternate != altsetting))
 333                return 0;
 334        return 1;
 335}
 336
 337/**
 338 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
 339 * @udc: pxa udc
 340 * @udc_usb_ep: udc_usb_ep structure
 341 *
 342 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
 343 * This is necessary because of the strong pxa hardware restriction requiring
 344 * that once pxa endpoints are initialized, their configuration is freezed, and
 345 * no change can be made to their address, direction, or in which configuration,
 346 * interface or altsetting they are active ... which differs from more usual
 347 * models which have endpoints be roughly just addressable fifos, and leave
 348 * configuration events up to gadget drivers (like all control messages).
 349 *
 350 * Note that there is still a blurred point here :
 351 *   - we rely on UDCCR register "active interface" and "active altsetting".
 352 *     This is a nonsense in regard of USB spec, where multiple interfaces are
 353 *     active at the same time.
 354 *   - if we knew for sure that the pxa can handle multiple interface at the
 355 *     same time, assuming Intel's Developer Guide is wrong, this function
 356 *     should be reviewed, and a cache of couples (iface, altsetting) should
 357 *     be kept in the pxa_udc structure. In this case this function would match
 358 *     against the cache of couples instead of the "last altsetting" set up.
 359 *
 360 * Returns the matched pxa_ep structure or NULL if none found
 361 */
 362static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
 363                struct udc_usb_ep *udc_usb_ep)
 364{
 365        int i;
 366        struct pxa_ep *ep;
 367        int cfg = udc->config;
 368        int iface = udc->last_interface;
 369        int alt = udc->last_alternate;
 370
 371        if (udc_usb_ep == &udc->udc_usb_ep[0])
 372                return &udc->pxa_ep[0];
 373
 374        for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
 375                ep = &udc->pxa_ep[i];
 376                if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
 377                        return ep;
 378        }
 379        return NULL;
 380}
 381
 382/**
 383 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
 384 * @udc: pxa udc
 385 *
 386 * Context: in_interrupt()
 387 *
 388 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
 389 * previously set up (and is not NULL). The update is necessary is a
 390 * configuration change or altsetting change was issued by the USB host.
 391 */
 392static void update_pxa_ep_matches(struct pxa_udc *udc)
 393{
 394        int i;
 395        struct udc_usb_ep *udc_usb_ep;
 396
 397        for (i = 1; i < NR_USB_ENDPOINTS; i++) {
 398                udc_usb_ep = &udc->udc_usb_ep[i];
 399                if (udc_usb_ep->pxa_ep)
 400                        udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
 401        }
 402}
 403
 404/**
 405 * pio_irq_enable - Enables irq generation for one endpoint
 406 * @ep: udc endpoint
 407 */
 408static void pio_irq_enable(struct pxa_ep *ep)
 409{
 410        struct pxa_udc *udc = ep->dev;
 411        int index = EPIDX(ep);
 412        u32 udcicr0 = udc_readl(udc, UDCICR0);
 413        u32 udcicr1 = udc_readl(udc, UDCICR1);
 414
 415        if (index < 16)
 416                udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
 417        else
 418                udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
 419}
 420
 421/**
 422 * pio_irq_disable - Disables irq generation for one endpoint
 423 * @ep: udc endpoint
 424 */
 425static void pio_irq_disable(struct pxa_ep *ep)
 426{
 427        struct pxa_udc *udc = ep->dev;
 428        int index = EPIDX(ep);
 429        u32 udcicr0 = udc_readl(udc, UDCICR0);
 430        u32 udcicr1 = udc_readl(udc, UDCICR1);
 431
 432        if (index < 16)
 433                udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
 434        else
 435                udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
 436}
 437
 438/**
 439 * udc_set_mask_UDCCR - set bits in UDCCR
 440 * @udc: udc device
 441 * @mask: bits to set in UDCCR
 442 *
 443 * Sets bits in UDCCR, leaving DME and FST bits as they were.
 444 */
 445static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
 446{
 447        u32 udccr = udc_readl(udc, UDCCR);
 448        udc_writel(udc, UDCCR,
 449                        (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
 450}
 451
 452/**
 453 * udc_clear_mask_UDCCR - clears bits in UDCCR
 454 * @udc: udc device
 455 * @mask: bit to clear in UDCCR
 456 *
 457 * Clears bits in UDCCR, leaving DME and FST bits as they were.
 458 */
 459static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
 460{
 461        u32 udccr = udc_readl(udc, UDCCR);
 462        udc_writel(udc, UDCCR,
 463                        (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
 464}
 465
 466/**
 467 * ep_write_UDCCSR - set bits in UDCCSR
 468 * @udc: udc device
 469 * @mask: bits to set in UDCCR
 470 *
 471 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
 472 *
 473 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
 474 * SET_INTERFACE and SET_CONFIGURATION.
 475 */
 476static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
 477{
 478        if (is_ep0(ep))
 479                mask |= UDCCSR0_ACM;
 480        udc_ep_writel(ep, UDCCSR, mask);
 481}
 482
 483/**
 484 * ep_count_bytes_remain - get how many bytes in udc endpoint
 485 * @ep: udc endpoint
 486 *
 487 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
 488 */
 489static int ep_count_bytes_remain(struct pxa_ep *ep)
 490{
 491        if (ep->dir_in)
 492                return -EOPNOTSUPP;
 493        return udc_ep_readl(ep, UDCBCR) & 0x3ff;
 494}
 495
 496/**
 497 * ep_is_empty - checks if ep has byte ready for reading
 498 * @ep: udc endpoint
 499 *
 500 * If endpoint is the control endpoint, checks if there are bytes in the
 501 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
 502 * are ready for reading on OUT endpoint.
 503 *
 504 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
 505 */
 506static int ep_is_empty(struct pxa_ep *ep)
 507{
 508        int ret;
 509
 510        if (!is_ep0(ep) && ep->dir_in)
 511                return -EOPNOTSUPP;
 512        if (is_ep0(ep))
 513                ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
 514        else
 515                ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
 516        return ret;
 517}
 518
 519/**
 520 * ep_is_full - checks if ep has place to write bytes
 521 * @ep: udc endpoint
 522 *
 523 * If endpoint is not the control endpoint and is an IN endpoint, checks if
 524 * there is place to write bytes into the endpoint.
 525 *
 526 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
 527 */
 528static int ep_is_full(struct pxa_ep *ep)
 529{
 530        if (is_ep0(ep))
 531                return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
 532        if (!ep->dir_in)
 533                return -EOPNOTSUPP;
 534        return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
 535}
 536
 537/**
 538 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
 539 * @ep: pxa endpoint
 540 *
 541 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
 542 */
 543static int epout_has_pkt(struct pxa_ep *ep)
 544{
 545        if (!is_ep0(ep) && ep->dir_in)
 546                return -EOPNOTSUPP;
 547        if (is_ep0(ep))
 548                return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
 549        return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
 550}
 551
 552/**
 553 * set_ep0state - Set ep0 automata state
 554 * @dev: udc device
 555 * @state: state
 556 */
 557static void set_ep0state(struct pxa_udc *udc, int state)
 558{
 559        struct pxa_ep *ep = &udc->pxa_ep[0];
 560        char *old_stname = EP0_STNAME(udc);
 561
 562        udc->ep0state = state;
 563        ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
 564                EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
 565                udc_ep_readl(ep, UDCBCR));
 566}
 567
 568/**
 569 * ep0_idle - Put control endpoint into idle state
 570 * @dev: udc device
 571 */
 572static void ep0_idle(struct pxa_udc *dev)
 573{
 574        set_ep0state(dev, WAIT_FOR_SETUP);
 575}
 576
 577/**
 578 * inc_ep_stats_reqs - Update ep stats counts
 579 * @ep: physical endpoint
 580 * @req: usb request
 581 * @is_in: ep direction (USB_DIR_IN or 0)
 582 *
 583 */
 584static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
 585{
 586        if (is_in)
 587                ep->stats.in_ops++;
 588        else
 589                ep->stats.out_ops++;
 590}
 591
 592/**
 593 * inc_ep_stats_bytes - Update ep stats counts
 594 * @ep: physical endpoint
 595 * @count: bytes transferred on endpoint
 596 * @is_in: ep direction (USB_DIR_IN or 0)
 597 */
 598static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
 599{
 600        if (is_in)
 601                ep->stats.in_bytes += count;
 602        else
 603                ep->stats.out_bytes += count;
 604}
 605
 606/**
 607 * pxa_ep_setup - Sets up an usb physical endpoint
 608 * @ep: pxa27x physical endpoint
 609 *
 610 * Find the physical pxa27x ep, and setup its UDCCR
 611 */
 612static void pxa_ep_setup(struct pxa_ep *ep)
 613{
 614        u32 new_udccr;
 615
 616        new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
 617                | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
 618                | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
 619                | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
 620                | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
 621                | ((ep->dir_in) ? UDCCONR_ED : 0)
 622                | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
 623                | UDCCONR_EE;
 624
 625        udc_ep_writel(ep, UDCCR, new_udccr);
 626}
 627
 628/**
 629 * pxa_eps_setup - Sets up all usb physical endpoints
 630 * @dev: udc device
 631 *
 632 * Setup all pxa physical endpoints, except ep0
 633 */
 634static void pxa_eps_setup(struct pxa_udc *dev)
 635{
 636        unsigned int i;
 637
 638        dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
 639
 640        for (i = 1; i < NR_PXA_ENDPOINTS; i++)
 641                pxa_ep_setup(&dev->pxa_ep[i]);
 642}
 643
 644/**
 645 * pxa_ep_alloc_request - Allocate usb request
 646 * @_ep: usb endpoint
 647 * @gfp_flags:
 648 *
 649 * For the pxa27x, these can just wrap kmalloc/kfree.  gadget drivers
 650 * must still pass correctly initialized endpoints, since other controller
 651 * drivers may care about how it's currently set up (dma issues etc).
 652  */
 653static struct usb_request *
 654pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 655{
 656        struct pxa27x_request *req;
 657
 658        req = kzalloc(sizeof *req, gfp_flags);
 659        if (!req)
 660                return NULL;
 661
 662        INIT_LIST_HEAD(&req->queue);
 663        req->in_use = 0;
 664        req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
 665
 666        return &req->req;
 667}
 668
 669/**
 670 * pxa_ep_free_request - Free usb request
 671 * @_ep: usb endpoint
 672 * @_req: usb request
 673 *
 674 * Wrapper around kfree to free _req
 675 */
 676static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 677{
 678        struct pxa27x_request *req;
 679
 680        req = container_of(_req, struct pxa27x_request, req);
 681        WARN_ON(!list_empty(&req->queue));
 682        kfree(req);
 683}
 684
 685/**
 686 * ep_add_request - add a request to the endpoint's queue
 687 * @ep: usb endpoint
 688 * @req: usb request
 689 *
 690 * Context: ep->lock held
 691 *
 692 * Queues the request in the endpoint's queue, and enables the interrupts
 693 * on the endpoint.
 694 */
 695static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
 696{
 697        if (unlikely(!req))
 698                return;
 699        ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
 700                req->req.length, udc_ep_readl(ep, UDCCSR));
 701
 702        req->in_use = 1;
 703        list_add_tail(&req->queue, &ep->queue);
 704        pio_irq_enable(ep);
 705}
 706
 707/**
 708 * ep_del_request - removes a request from the endpoint's queue
 709 * @ep: usb endpoint
 710 * @req: usb request
 711 *
 712 * Context: ep->lock held
 713 *
 714 * Unqueue the request from the endpoint's queue. If there are no more requests
 715 * on the endpoint, and if it's not the control endpoint, interrupts are
 716 * disabled on the endpoint.
 717 */
 718static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
 719{
 720        if (unlikely(!req))
 721                return;
 722        ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
 723                req->req.length, udc_ep_readl(ep, UDCCSR));
 724
 725        list_del_init(&req->queue);
 726        req->in_use = 0;
 727        if (!is_ep0(ep) && list_empty(&ep->queue))
 728                pio_irq_disable(ep);
 729}
 730
 731/**
 732 * req_done - Complete an usb request
 733 * @ep: pxa physical endpoint
 734 * @req: pxa request
 735 * @status: usb request status sent to gadget API
 736 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 737 *
 738 * Context: ep->lock held if flags not NULL, else ep->lock released
 739 *
 740 * Retire a pxa27x usb request. Endpoint must be locked.
 741 */
 742static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
 743        unsigned long *pflags)
 744{
 745        unsigned long   flags;
 746
 747        ep_del_request(ep, req);
 748        if (likely(req->req.status == -EINPROGRESS))
 749                req->req.status = status;
 750        else
 751                status = req->req.status;
 752
 753        if (status && status != -ESHUTDOWN)
 754                ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
 755                        &req->req, status,
 756                        req->req.actual, req->req.length);
 757
 758        if (pflags)
 759                spin_unlock_irqrestore(&ep->lock, *pflags);
 760        local_irq_save(flags);
 761        req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
 762        local_irq_restore(flags);
 763        if (pflags)
 764                spin_lock_irqsave(&ep->lock, *pflags);
 765}
 766
 767/**
 768 * ep_end_out_req - Ends endpoint OUT request
 769 * @ep: physical endpoint
 770 * @req: pxa request
 771 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 772 *
 773 * Context: ep->lock held or released (see req_done())
 774 *
 775 * Ends endpoint OUT request (completes usb request).
 776 */
 777static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
 778        unsigned long *pflags)
 779{
 780        inc_ep_stats_reqs(ep, !USB_DIR_IN);
 781        req_done(ep, req, 0, pflags);
 782}
 783
 784/**
 785 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
 786 * @ep: physical endpoint
 787 * @req: pxa request
 788 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 789 *
 790 * Context: ep->lock held or released (see req_done())
 791 *
 792 * Ends control endpoint OUT request (completes usb request), and puts
 793 * control endpoint into idle state
 794 */
 795static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
 796        unsigned long *pflags)
 797{
 798        set_ep0state(ep->dev, OUT_STATUS_STAGE);
 799        ep_end_out_req(ep, req, pflags);
 800        ep0_idle(ep->dev);
 801}
 802
 803/**
 804 * ep_end_in_req - Ends endpoint IN request
 805 * @ep: physical endpoint
 806 * @req: pxa request
 807 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 808 *
 809 * Context: ep->lock held or released (see req_done())
 810 *
 811 * Ends endpoint IN request (completes usb request).
 812 */
 813static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
 814        unsigned long *pflags)
 815{
 816        inc_ep_stats_reqs(ep, USB_DIR_IN);
 817        req_done(ep, req, 0, pflags);
 818}
 819
 820/**
 821 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
 822 * @ep: physical endpoint
 823 * @req: pxa request
 824 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
 825 *
 826 * Context: ep->lock held or released (see req_done())
 827 *
 828 * Ends control endpoint IN request (completes usb request), and puts
 829 * control endpoint into status state
 830 */
 831static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
 832        unsigned long *pflags)
 833{
 834        set_ep0state(ep->dev, IN_STATUS_STAGE);
 835        ep_end_in_req(ep, req, pflags);
 836}
 837
 838/**
 839 * nuke - Dequeue all requests
 840 * @ep: pxa endpoint
 841 * @status: usb request status
 842 *
 843 * Context: ep->lock released
 844 *
 845 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
 846 * disabled on that endpoint (because no more requests).
 847 */
 848static void nuke(struct pxa_ep *ep, int status)
 849{
 850        struct pxa27x_request   *req;
 851        unsigned long           flags;
 852
 853        spin_lock_irqsave(&ep->lock, flags);
 854        while (!list_empty(&ep->queue)) {
 855                req = list_entry(ep->queue.next, struct pxa27x_request, queue);
 856                req_done(ep, req, status, &flags);
 857        }
 858        spin_unlock_irqrestore(&ep->lock, flags);
 859}
 860
 861/**
 862 * read_packet - transfer 1 packet from an OUT endpoint into request
 863 * @ep: pxa physical endpoint
 864 * @req: usb request
 865 *
 866 * Takes bytes from OUT endpoint and transfers them info the usb request.
 867 * If there is less space in request than bytes received in OUT endpoint,
 868 * bytes are left in the OUT endpoint.
 869 *
 870 * Returns how many bytes were actually transferred
 871 */
 872static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
 873{
 874        u32 *buf;
 875        int bytes_ep, bufferspace, count, i;
 876
 877        bytes_ep = ep_count_bytes_remain(ep);
 878        bufferspace = req->req.length - req->req.actual;
 879
 880        buf = (u32 *)(req->req.buf + req->req.actual);
 881        prefetchw(buf);
 882
 883        if (likely(!ep_is_empty(ep)))
 884                count = min(bytes_ep, bufferspace);
 885        else /* zlp */
 886                count = 0;
 887
 888        for (i = count; i > 0; i -= 4)
 889                *buf++ = udc_ep_readl(ep, UDCDR);
 890        req->req.actual += count;
 891
 892        ep_write_UDCCSR(ep, UDCCSR_PC);
 893
 894        return count;
 895}
 896
 897/**
 898 * write_packet - transfer 1 packet from request into an IN endpoint
 899 * @ep: pxa physical endpoint
 900 * @req: usb request
 901 * @max: max bytes that fit into endpoint
 902 *
 903 * Takes bytes from usb request, and transfers them into the physical
 904 * endpoint. If there are no bytes to transfer, doesn't write anything
 905 * to physical endpoint.
 906 *
 907 * Returns how many bytes were actually transferred.
 908 */
 909static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
 910                        unsigned int max)
 911{
 912        int length, count, remain, i;
 913        u32 *buf;
 914        u8 *buf_8;
 915
 916        buf = (u32 *)(req->req.buf + req->req.actual);
 917        prefetch(buf);
 918
 919        length = min(req->req.length - req->req.actual, max);
 920        req->req.actual += length;
 921
 922        remain = length & 0x3;
 923        count = length & ~(0x3);
 924        for (i = count; i > 0 ; i -= 4)
 925                udc_ep_writel(ep, UDCDR, *buf++);
 926
 927        buf_8 = (u8 *)buf;
 928        for (i = remain; i > 0; i--)
 929                udc_ep_writeb(ep, UDCDR, *buf_8++);
 930
 931        ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
 932                udc_ep_readl(ep, UDCCSR));
 933
 934        return length;
 935}
 936
 937/**
 938 * read_fifo - Transfer packets from OUT endpoint into usb request
 939 * @ep: pxa physical endpoint
 940 * @req: usb request
 941 *
 942 * Context: callable when in_interrupt()
 943 *
 944 * Unload as many packets as possible from the fifo we use for usb OUT
 945 * transfers and put them into the request. Caller should have made sure
 946 * there's at least one packet ready.
 947 * Doesn't complete the request, that's the caller's job
 948 *
 949 * Returns 1 if the request completed, 0 otherwise
 950 */
 951static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
 952{
 953        int count, is_short, completed = 0;
 954
 955        while (epout_has_pkt(ep)) {
 956                count = read_packet(ep, req);
 957                inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
 958
 959                is_short = (count < ep->fifo_size);
 960                ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
 961                        udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
 962                        &req->req, req->req.actual, req->req.length);
 963
 964                /* completion */
 965                if (is_short || req->req.actual == req->req.length) {
 966                        completed = 1;
 967                        break;
 968                }
 969                /* finished that packet.  the next one may be waiting... */
 970        }
 971        return completed;
 972}
 973
 974/**
 975 * write_fifo - transfer packets from usb request into an IN endpoint
 976 * @ep: pxa physical endpoint
 977 * @req: pxa usb request
 978 *
 979 * Write to an IN endpoint fifo, as many packets as possible.
 980 * irqs will use this to write the rest later.
 981 * caller guarantees at least one packet buffer is ready (or a zlp).
 982 * Doesn't complete the request, that's the caller's job
 983 *
 984 * Returns 1 if request fully transferred, 0 if partial transfer
 985 */
 986static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
 987{
 988        unsigned max;
 989        int count, is_short, is_last = 0, completed = 0, totcount = 0;
 990        u32 udccsr;
 991
 992        max = ep->fifo_size;
 993        do {
 994                is_short = 0;
 995
 996                udccsr = udc_ep_readl(ep, UDCCSR);
 997                if (udccsr & UDCCSR_PC) {
 998                        ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
 999                                udccsr);
1000                        ep_write_UDCCSR(ep, UDCCSR_PC);
1001                }
1002                if (udccsr & UDCCSR_TRN) {
1003                        ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
1004                                udccsr);
1005                        ep_write_UDCCSR(ep, UDCCSR_TRN);
1006                }
1007
1008                count = write_packet(ep, req, max);
1009                inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1010                totcount += count;
1011
1012                /* last packet is usually short (or a zlp) */
1013                if (unlikely(count < max)) {
1014                        is_last = 1;
1015                        is_short = 1;
1016                } else {
1017                        if (likely(req->req.length > req->req.actual)
1018                                        || req->req.zero)
1019                                is_last = 0;
1020                        else
1021                                is_last = 1;
1022                        /* interrupt/iso maxpacket may not fill the fifo */
1023                        is_short = unlikely(max < ep->fifo_size);
1024                }
1025
1026                if (is_short)
1027                        ep_write_UDCCSR(ep, UDCCSR_SP);
1028
1029                /* requests complete when all IN data is in the FIFO */
1030                if (is_last) {
1031                        completed = 1;
1032                        break;
1033                }
1034        } while (!ep_is_full(ep));
1035
1036        ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1037                        totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1038                        req->req.length - req->req.actual, &req->req);
1039
1040        return completed;
1041}
1042
1043/**
1044 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1045 * @ep: control endpoint
1046 * @req: pxa usb request
1047 *
1048 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1049 * endpoint as can be read, and stores them into usb request (limited by request
1050 * maximum length).
1051 *
1052 * Returns 0 if usb request only partially filled, 1 if fully filled
1053 */
1054static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1055{
1056        int count, is_short, completed = 0;
1057
1058        while (epout_has_pkt(ep)) {
1059                count = read_packet(ep, req);
1060                ep_write_UDCCSR(ep, UDCCSR0_OPC);
1061                inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1062
1063                is_short = (count < ep->fifo_size);
1064                ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1065                        udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1066                        &req->req, req->req.actual, req->req.length);
1067
1068                if (is_short || req->req.actual >= req->req.length) {
1069                        completed = 1;
1070                        break;
1071                }
1072        }
1073
1074        return completed;
1075}
1076
1077/**
1078 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1079 * @ep: control endpoint
1080 * @req: request
1081 *
1082 * Context: callable when in_interrupt()
1083 *
1084 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1085 * If the request doesn't fit, the remaining part will be sent from irq.
1086 * The request is considered fully written only if either :
1087 *   - last write transferred all remaining bytes, but fifo was not fully filled
1088 *   - last write was a 0 length write
1089 *
1090 * Returns 1 if request fully written, 0 if request only partially sent
1091 */
1092static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1093{
1094        unsigned        count;
1095        int             is_last, is_short;
1096
1097        count = write_packet(ep, req, EP0_FIFO_SIZE);
1098        inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1099
1100        is_short = (count < EP0_FIFO_SIZE);
1101        is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1102
1103        /* Sends either a short packet or a 0 length packet */
1104        if (unlikely(is_short))
1105                ep_write_UDCCSR(ep, UDCCSR0_IPR);
1106
1107        ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1108                count, is_short ? "/S" : "", is_last ? "/L" : "",
1109                req->req.length - req->req.actual,
1110                &req->req, udc_ep_readl(ep, UDCCSR));
1111
1112        return is_last;
1113}
1114
1115/**
1116 * pxa_ep_queue - Queue a request into an IN endpoint
1117 * @_ep: usb endpoint
1118 * @_req: usb request
1119 * @gfp_flags: flags
1120 *
1121 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1122 * in the special case of ep0 setup :
1123 *   (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1124 *
1125 * Returns 0 if succedeed, error otherwise
1126 */
1127static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1128                        gfp_t gfp_flags)
1129{
1130        struct udc_usb_ep       *udc_usb_ep;
1131        struct pxa_ep           *ep;
1132        struct pxa27x_request   *req;
1133        struct pxa_udc          *dev;
1134        unsigned long           flags;
1135        int                     rc = 0;
1136        int                     is_first_req;
1137        unsigned                length;
1138        int                     recursion_detected;
1139
1140        req = container_of(_req, struct pxa27x_request, req);
1141        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1142
1143        if (unlikely(!_req || !_req->complete || !_req->buf))
1144                return -EINVAL;
1145
1146        if (unlikely(!_ep))
1147                return -EINVAL;
1148
1149        dev = udc_usb_ep->dev;
1150        ep = udc_usb_ep->pxa_ep;
1151        if (unlikely(!ep))
1152                return -EINVAL;
1153
1154        dev = ep->dev;
1155        if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1156                ep_dbg(ep, "bogus device state\n");
1157                return -ESHUTDOWN;
1158        }
1159
1160        /* iso is always one packet per request, that's the only way
1161         * we can report per-packet status.  that also helps with dma.
1162         */
1163        if (unlikely(EPXFERTYPE_is_ISO(ep)
1164                        && req->req.length > ep->fifo_size))
1165                return -EMSGSIZE;
1166
1167        spin_lock_irqsave(&ep->lock, flags);
1168        recursion_detected = ep->in_handle_ep;
1169
1170        is_first_req = list_empty(&ep->queue);
1171        ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1172                        _req, is_first_req ? "yes" : "no",
1173                        _req->length, _req->buf);
1174
1175        if (!ep->enabled) {
1176                _req->status = -ESHUTDOWN;
1177                rc = -ESHUTDOWN;
1178                goto out_locked;
1179        }
1180
1181        if (req->in_use) {
1182                ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1183                goto out_locked;
1184        }
1185
1186        length = _req->length;
1187        _req->status = -EINPROGRESS;
1188        _req->actual = 0;
1189
1190        ep_add_request(ep, req);
1191        spin_unlock_irqrestore(&ep->lock, flags);
1192
1193        if (is_ep0(ep)) {
1194                switch (dev->ep0state) {
1195                case WAIT_ACK_SET_CONF_INTERF:
1196                        if (length == 0) {
1197                                ep_end_in_req(ep, req, NULL);
1198                        } else {
1199                                ep_err(ep, "got a request of %d bytes while"
1200                                        "in state WAIT_ACK_SET_CONF_INTERF\n",
1201                                        length);
1202                                ep_del_request(ep, req);
1203                                rc = -EL2HLT;
1204                        }
1205                        ep0_idle(ep->dev);
1206                        break;
1207                case IN_DATA_STAGE:
1208                        if (!ep_is_full(ep))
1209                                if (write_ep0_fifo(ep, req))
1210                                        ep0_end_in_req(ep, req, NULL);
1211                        break;
1212                case OUT_DATA_STAGE:
1213                        if ((length == 0) || !epout_has_pkt(ep))
1214                                if (read_ep0_fifo(ep, req))
1215                                        ep0_end_out_req(ep, req, NULL);
1216                        break;
1217                default:
1218                        ep_err(ep, "odd state %s to send me a request\n",
1219                                EP0_STNAME(ep->dev));
1220                        ep_del_request(ep, req);
1221                        rc = -EL2HLT;
1222                        break;
1223                }
1224        } else {
1225                if (!recursion_detected)
1226                        handle_ep(ep);
1227        }
1228
1229out:
1230        return rc;
1231out_locked:
1232        spin_unlock_irqrestore(&ep->lock, flags);
1233        goto out;
1234}
1235
1236/**
1237 * pxa_ep_dequeue - Dequeue one request
1238 * @_ep: usb endpoint
1239 * @_req: usb request
1240 *
1241 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1242 */
1243static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1244{
1245        struct pxa_ep           *ep;
1246        struct udc_usb_ep       *udc_usb_ep;
1247        struct pxa27x_request   *req;
1248        unsigned long           flags;
1249        int                     rc = -EINVAL;
1250
1251        if (!_ep)
1252                return rc;
1253        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1254        ep = udc_usb_ep->pxa_ep;
1255        if (!ep || is_ep0(ep))
1256                return rc;
1257
1258        spin_lock_irqsave(&ep->lock, flags);
1259
1260        /* make sure it's actually queued on this endpoint */
1261        list_for_each_entry(req, &ep->queue, queue) {
1262                if (&req->req == _req) {
1263                        rc = 0;
1264                        break;
1265                }
1266        }
1267
1268        spin_unlock_irqrestore(&ep->lock, flags);
1269        if (!rc)
1270                req_done(ep, req, -ECONNRESET, NULL);
1271        return rc;
1272}
1273
1274/**
1275 * pxa_ep_set_halt - Halts operations on one endpoint
1276 * @_ep: usb endpoint
1277 * @value:
1278 *
1279 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1280 */
1281static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1282{
1283        struct pxa_ep           *ep;
1284        struct udc_usb_ep       *udc_usb_ep;
1285        unsigned long flags;
1286        int rc;
1287
1288
1289        if (!_ep)
1290                return -EINVAL;
1291        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1292        ep = udc_usb_ep->pxa_ep;
1293        if (!ep || is_ep0(ep))
1294                return -EINVAL;
1295
1296        if (value == 0) {
1297                /*
1298                 * This path (reset toggle+halt) is needed to implement
1299                 * SET_INTERFACE on normal hardware.  but it can't be
1300                 * done from software on the PXA UDC, and the hardware
1301                 * forgets to do it as part of SET_INTERFACE automagic.
1302                 */
1303                ep_dbg(ep, "only host can clear halt\n");
1304                return -EROFS;
1305        }
1306
1307        spin_lock_irqsave(&ep->lock, flags);
1308
1309        rc = -EAGAIN;
1310        if (ep->dir_in  && (ep_is_full(ep) || !list_empty(&ep->queue)))
1311                goto out;
1312
1313        /* FST, FEF bits are the same for control and non control endpoints */
1314        rc = 0;
1315        ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1316        if (is_ep0(ep))
1317                set_ep0state(ep->dev, STALL);
1318
1319out:
1320        spin_unlock_irqrestore(&ep->lock, flags);
1321        return rc;
1322}
1323
1324/**
1325 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1326 * @_ep: usb endpoint
1327 *
1328 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1329 */
1330static int pxa_ep_fifo_status(struct usb_ep *_ep)
1331{
1332        struct pxa_ep           *ep;
1333        struct udc_usb_ep       *udc_usb_ep;
1334
1335        if (!_ep)
1336                return -ENODEV;
1337        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1338        ep = udc_usb_ep->pxa_ep;
1339        if (!ep || is_ep0(ep))
1340                return -ENODEV;
1341
1342        if (ep->dir_in)
1343                return -EOPNOTSUPP;
1344        if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1345                return 0;
1346        else
1347                return ep_count_bytes_remain(ep) + 1;
1348}
1349
1350/**
1351 * pxa_ep_fifo_flush - Flushes one endpoint
1352 * @_ep: usb endpoint
1353 *
1354 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1355 */
1356static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1357{
1358        struct pxa_ep           *ep;
1359        struct udc_usb_ep       *udc_usb_ep;
1360        unsigned long           flags;
1361
1362        if (!_ep)
1363                return;
1364        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1365        ep = udc_usb_ep->pxa_ep;
1366        if (!ep || is_ep0(ep))
1367                return;
1368
1369        spin_lock_irqsave(&ep->lock, flags);
1370
1371        if (unlikely(!list_empty(&ep->queue)))
1372                ep_dbg(ep, "called while queue list not empty\n");
1373        ep_dbg(ep, "called\n");
1374
1375        /* for OUT, just read and discard the FIFO contents. */
1376        if (!ep->dir_in) {
1377                while (!ep_is_empty(ep))
1378                        udc_ep_readl(ep, UDCDR);
1379        } else {
1380                /* most IN status is the same, but ISO can't stall */
1381                ep_write_UDCCSR(ep,
1382                                UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1383                                | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1384        }
1385
1386        spin_unlock_irqrestore(&ep->lock, flags);
1387}
1388
1389/**
1390 * pxa_ep_enable - Enables usb endpoint
1391 * @_ep: usb endpoint
1392 * @desc: usb endpoint descriptor
1393 *
1394 * Nothing much to do here, as ep configuration is done once and for all
1395 * before udc is enabled. After udc enable, no physical endpoint configuration
1396 * can be changed.
1397 * Function makes sanity checks and flushes the endpoint.
1398 */
1399static int pxa_ep_enable(struct usb_ep *_ep,
1400        const struct usb_endpoint_descriptor *desc)
1401{
1402        struct pxa_ep           *ep;
1403        struct udc_usb_ep       *udc_usb_ep;
1404        struct pxa_udc          *udc;
1405
1406        if (!_ep || !desc)
1407                return -EINVAL;
1408
1409        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1410        if (udc_usb_ep->pxa_ep) {
1411                ep = udc_usb_ep->pxa_ep;
1412                ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1413                        _ep->name);
1414        } else {
1415                ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1416        }
1417
1418        if (!ep || is_ep0(ep)) {
1419                dev_err(udc_usb_ep->dev->dev,
1420                        "unable to match pxa_ep for ep %s\n",
1421                        _ep->name);
1422                return -EINVAL;
1423        }
1424
1425        if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1426                        || (ep->type != usb_endpoint_type(desc))) {
1427                ep_err(ep, "type mismatch\n");
1428                return -EINVAL;
1429        }
1430
1431        if (ep->fifo_size < usb_endpoint_maxp(desc)) {
1432                ep_err(ep, "bad maxpacket\n");
1433                return -ERANGE;
1434        }
1435
1436        udc_usb_ep->pxa_ep = ep;
1437        udc = ep->dev;
1438
1439        if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1440                ep_err(ep, "bogus device state\n");
1441                return -ESHUTDOWN;
1442        }
1443
1444        ep->enabled = 1;
1445
1446        /* flush fifo (mostly for OUT buffers) */
1447        pxa_ep_fifo_flush(_ep);
1448
1449        ep_dbg(ep, "enabled\n");
1450        return 0;
1451}
1452
1453/**
1454 * pxa_ep_disable - Disable usb endpoint
1455 * @_ep: usb endpoint
1456 *
1457 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1458 * changed.
1459 * Function flushes the endpoint and related requests.
1460 */
1461static int pxa_ep_disable(struct usb_ep *_ep)
1462{
1463        struct pxa_ep           *ep;
1464        struct udc_usb_ep       *udc_usb_ep;
1465
1466        if (!_ep)
1467                return -EINVAL;
1468
1469        udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1470        ep = udc_usb_ep->pxa_ep;
1471        if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1472                return -EINVAL;
1473
1474        ep->enabled = 0;
1475        nuke(ep, -ESHUTDOWN);
1476
1477        pxa_ep_fifo_flush(_ep);
1478        udc_usb_ep->pxa_ep = NULL;
1479
1480        ep_dbg(ep, "disabled\n");
1481        return 0;
1482}
1483
1484static struct usb_ep_ops pxa_ep_ops = {
1485        .enable         = pxa_ep_enable,
1486        .disable        = pxa_ep_disable,
1487
1488        .alloc_request  = pxa_ep_alloc_request,
1489        .free_request   = pxa_ep_free_request,
1490
1491        .queue          = pxa_ep_queue,
1492        .dequeue        = pxa_ep_dequeue,
1493
1494        .set_halt       = pxa_ep_set_halt,
1495        .fifo_status    = pxa_ep_fifo_status,
1496        .fifo_flush     = pxa_ep_fifo_flush,
1497};
1498
1499/**
1500 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1501 * @udc: udc device
1502 * @on: 0 if disconnect pullup resistor, 1 otherwise
1503 * Context: any
1504 *
1505 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1506 * declare it as a full speed usb device
1507 */
1508static void dplus_pullup(struct pxa_udc *udc, int on)
1509{
1510        if (on) {
1511                if (gpio_is_valid(udc->mach->gpio_pullup))
1512                        gpio_set_value(udc->mach->gpio_pullup,
1513                                       !udc->mach->gpio_pullup_inverted);
1514                if (udc->mach->udc_command)
1515                        udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1516        } else {
1517                if (gpio_is_valid(udc->mach->gpio_pullup))
1518                        gpio_set_value(udc->mach->gpio_pullup,
1519                                       udc->mach->gpio_pullup_inverted);
1520                if (udc->mach->udc_command)
1521                        udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1522        }
1523        udc->pullup_on = on;
1524}
1525
1526/**
1527 * pxa_udc_get_frame - Returns usb frame number
1528 * @_gadget: usb gadget
1529 */
1530static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1531{
1532        struct pxa_udc *udc = to_gadget_udc(_gadget);
1533
1534        return (udc_readl(udc, UDCFNR) & 0x7ff);
1535}
1536
1537/**
1538 * pxa_udc_wakeup - Force udc device out of suspend
1539 * @_gadget: usb gadget
1540 *
1541 * Returns 0 if successful, error code otherwise
1542 */
1543static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1544{
1545        struct pxa_udc *udc = to_gadget_udc(_gadget);
1546
1547        /* host may not have enabled remote wakeup */
1548        if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1549                return -EHOSTUNREACH;
1550        udc_set_mask_UDCCR(udc, UDCCR_UDR);
1551        return 0;
1552}
1553
1554static void udc_enable(struct pxa_udc *udc);
1555static void udc_disable(struct pxa_udc *udc);
1556
1557/**
1558 * should_enable_udc - Tells if UDC should be enabled
1559 * @udc: udc device
1560 * Context: any
1561 *
1562 * The UDC should be enabled if :
1563
1564 *  - the pullup resistor is connected
1565 *  - and a gadget driver is bound
1566 *  - and vbus is sensed (or no vbus sense is available)
1567 *
1568 * Returns 1 if UDC should be enabled, 0 otherwise
1569 */
1570static int should_enable_udc(struct pxa_udc *udc)
1571{
1572        int put_on;
1573
1574        put_on = ((udc->pullup_on) && (udc->driver));
1575        put_on &= ((udc->vbus_sensed) || (IS_ERR_OR_NULL(udc->transceiver)));
1576        return put_on;
1577}
1578
1579/**
1580 * should_disable_udc - Tells if UDC should be disabled
1581 * @udc: udc device
1582 * Context: any
1583 *
1584 * The UDC should be disabled if :
1585 *  - the pullup resistor is not connected
1586 *  - or no gadget driver is bound
1587 *  - or no vbus is sensed (when vbus sesing is available)
1588 *
1589 * Returns 1 if UDC should be disabled
1590 */
1591static int should_disable_udc(struct pxa_udc *udc)
1592{
1593        int put_off;
1594
1595        put_off = ((!udc->pullup_on) || (!udc->driver));
1596        put_off |= ((!udc->vbus_sensed) && (!IS_ERR_OR_NULL(udc->transceiver)));
1597        return put_off;
1598}
1599
1600/**
1601 * pxa_udc_pullup - Offer manual D+ pullup control
1602 * @_gadget: usb gadget using the control
1603 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1604 * Context: !in_interrupt()
1605 *
1606 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1607 */
1608static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1609{
1610        struct pxa_udc *udc = to_gadget_udc(_gadget);
1611
1612        if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1613                return -EOPNOTSUPP;
1614
1615        dplus_pullup(udc, is_active);
1616
1617        if (should_enable_udc(udc))
1618                udc_enable(udc);
1619        if (should_disable_udc(udc))
1620                udc_disable(udc);
1621        return 0;
1622}
1623
1624static void udc_enable(struct pxa_udc *udc);
1625static void udc_disable(struct pxa_udc *udc);
1626
1627/**
1628 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1629 * @_gadget: usb gadget
1630 * @is_active: 0 if should disable the udc, 1 if should enable
1631 *
1632 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1633 * udc, and deactivates D+ pullup resistor.
1634 *
1635 * Returns 0
1636 */
1637static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1638{
1639        struct pxa_udc *udc = to_gadget_udc(_gadget);
1640
1641        udc->vbus_sensed = is_active;
1642        if (should_enable_udc(udc))
1643                udc_enable(udc);
1644        if (should_disable_udc(udc))
1645                udc_disable(udc);
1646
1647        return 0;
1648}
1649
1650/**
1651 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1652 * @_gadget: usb gadget
1653 * @mA: current drawn
1654 *
1655 * Context: !in_interrupt()
1656 *
1657 * Called after a configuration was chosen by a USB host, to inform how much
1658 * current can be drawn by the device from VBus line.
1659 *
1660 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1661 */
1662static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1663{
1664        struct pxa_udc *udc;
1665
1666        udc = to_gadget_udc(_gadget);
1667        if (!IS_ERR_OR_NULL(udc->transceiver))
1668                return usb_phy_set_power(udc->transceiver, mA);
1669        return -EOPNOTSUPP;
1670}
1671
1672static int pxa27x_udc_start(struct usb_gadget *g,
1673                struct usb_gadget_driver *driver);
1674static int pxa27x_udc_stop(struct usb_gadget *g,
1675                struct usb_gadget_driver *driver);
1676
1677static const struct usb_gadget_ops pxa_udc_ops = {
1678        .get_frame      = pxa_udc_get_frame,
1679        .wakeup         = pxa_udc_wakeup,
1680        .pullup         = pxa_udc_pullup,
1681        .vbus_session   = pxa_udc_vbus_session,
1682        .vbus_draw      = pxa_udc_vbus_draw,
1683        .udc_start      = pxa27x_udc_start,
1684        .udc_stop       = pxa27x_udc_stop,
1685};
1686
1687/**
1688 * udc_disable - disable udc device controller
1689 * @udc: udc device
1690 * Context: any
1691 *
1692 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1693 * interrupts.
1694 */
1695static void udc_disable(struct pxa_udc *udc)
1696{
1697        if (!udc->enabled)
1698                return;
1699
1700        udc_writel(udc, UDCICR0, 0);
1701        udc_writel(udc, UDCICR1, 0);
1702
1703        udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1704        clk_disable(udc->clk);
1705
1706        ep0_idle(udc);
1707        udc->gadget.speed = USB_SPEED_UNKNOWN;
1708
1709        udc->enabled = 0;
1710}
1711
1712/**
1713 * udc_init_data - Initialize udc device data structures
1714 * @dev: udc device
1715 *
1716 * Initializes gadget endpoint list, endpoints locks. No action is taken
1717 * on the hardware.
1718 */
1719static void udc_init_data(struct pxa_udc *dev)
1720{
1721        int i;
1722        struct pxa_ep *ep;
1723
1724        /* device/ep0 records init */
1725        INIT_LIST_HEAD(&dev->gadget.ep_list);
1726        INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1727        dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1728        ep0_idle(dev);
1729
1730        /* PXA endpoints init */
1731        for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1732                ep = &dev->pxa_ep[i];
1733
1734                ep->enabled = is_ep0(ep);
1735                INIT_LIST_HEAD(&ep->queue);
1736                spin_lock_init(&ep->lock);
1737        }
1738
1739        /* USB endpoints init */
1740        for (i = 1; i < NR_USB_ENDPOINTS; i++) {
1741                list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1742                                &dev->gadget.ep_list);
1743                usb_ep_set_maxpacket_limit(&dev->udc_usb_ep[i].usb_ep,
1744                                           dev->udc_usb_ep[i].usb_ep.maxpacket);
1745        }
1746}
1747
1748/**
1749 * udc_enable - Enables the udc device
1750 * @dev: udc device
1751 *
1752 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1753 * interrupts, sets usb as UDC client and setups endpoints.
1754 */
1755static void udc_enable(struct pxa_udc *udc)
1756{
1757        if (udc->enabled)
1758                return;
1759
1760        udc_writel(udc, UDCICR0, 0);
1761        udc_writel(udc, UDCICR1, 0);
1762        udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1763
1764        clk_enable(udc->clk);
1765
1766        ep0_idle(udc);
1767        udc->gadget.speed = USB_SPEED_FULL;
1768        memset(&udc->stats, 0, sizeof(udc->stats));
1769
1770        udc_set_mask_UDCCR(udc, UDCCR_UDE);
1771        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1772        udelay(2);
1773        if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1774                dev_err(udc->dev, "Configuration errors, udc disabled\n");
1775
1776        /*
1777         * Caller must be able to sleep in order to cope with startup transients
1778         */
1779        msleep(100);
1780
1781        /* enable suspend/resume and reset irqs */
1782        udc_writel(udc, UDCICR1,
1783                        UDCICR1_IECC | UDCICR1_IERU
1784                        | UDCICR1_IESU | UDCICR1_IERS);
1785
1786        /* enable ep0 irqs */
1787        pio_irq_enable(&udc->pxa_ep[0]);
1788
1789        udc->enabled = 1;
1790}
1791
1792/**
1793 * pxa27x_start - Register gadget driver
1794 * @driver: gadget driver
1795 * @bind: bind function
1796 *
1797 * When a driver is successfully registered, it will receive control requests
1798 * including set_configuration(), which enables non-control requests.  Then
1799 * usb traffic follows until a disconnect is reported.  Then a host may connect
1800 * again, or the driver might get unbound.
1801 *
1802 * Note that the udc is not automatically enabled. Check function
1803 * should_enable_udc().
1804 *
1805 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1806 */
1807static int pxa27x_udc_start(struct usb_gadget *g,
1808                struct usb_gadget_driver *driver)
1809{
1810        struct pxa_udc *udc = to_pxa(g);
1811        int retval;
1812
1813        /* first hook up the driver ... */
1814        udc->driver = driver;
1815        dplus_pullup(udc, 1);
1816
1817        if (!IS_ERR_OR_NULL(udc->transceiver)) {
1818                retval = otg_set_peripheral(udc->transceiver->otg,
1819                                                &udc->gadget);
1820                if (retval) {
1821                        dev_err(udc->dev, "can't bind to transceiver\n");
1822                        goto fail;
1823                }
1824        }
1825
1826        if (should_enable_udc(udc))
1827                udc_enable(udc);
1828        return 0;
1829
1830fail:
1831        udc->driver = NULL;
1832        return retval;
1833}
1834
1835/**
1836 * stop_activity - Stops udc endpoints
1837 * @udc: udc device
1838 * @driver: gadget driver
1839 *
1840 * Disables all udc endpoints (even control endpoint), report disconnect to
1841 * the gadget user.
1842 */
1843static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1844{
1845        int i;
1846
1847        /* don't disconnect drivers more than once */
1848        if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1849                driver = NULL;
1850        udc->gadget.speed = USB_SPEED_UNKNOWN;
1851
1852        for (i = 0; i < NR_USB_ENDPOINTS; i++)
1853                pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1854}
1855
1856/**
1857 * pxa27x_udc_stop - Unregister the gadget driver
1858 * @driver: gadget driver
1859 *
1860 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1861 */
1862static int pxa27x_udc_stop(struct usb_gadget *g,
1863                struct usb_gadget_driver *driver)
1864{
1865        struct pxa_udc *udc = to_pxa(g);
1866
1867        stop_activity(udc, driver);
1868        udc_disable(udc);
1869        dplus_pullup(udc, 0);
1870
1871        udc->driver = NULL;
1872
1873        if (!IS_ERR_OR_NULL(udc->transceiver))
1874                return otg_set_peripheral(udc->transceiver->otg, NULL);
1875        return 0;
1876}
1877
1878/**
1879 * handle_ep0_ctrl_req - handle control endpoint control request
1880 * @udc: udc device
1881 * @req: control request
1882 */
1883static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1884                                struct pxa27x_request *req)
1885{
1886        struct pxa_ep *ep = &udc->pxa_ep[0];
1887        union {
1888                struct usb_ctrlrequest  r;
1889                u32                     word[2];
1890        } u;
1891        int i;
1892        int have_extrabytes = 0;
1893        unsigned long flags;
1894
1895        nuke(ep, -EPROTO);
1896        spin_lock_irqsave(&ep->lock, flags);
1897
1898        /*
1899         * In the PXA320 manual, in the section about Back-to-Back setup
1900         * packets, it describes this situation.  The solution is to set OPC to
1901         * get rid of the status packet, and then continue with the setup
1902         * packet. Generalize to pxa27x CPUs.
1903         */
1904        if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1905                ep_write_UDCCSR(ep, UDCCSR0_OPC);
1906
1907        /* read SETUP packet */
1908        for (i = 0; i < 2; i++) {
1909                if (unlikely(ep_is_empty(ep)))
1910                        goto stall;
1911                u.word[i] = udc_ep_readl(ep, UDCDR);
1912        }
1913
1914        have_extrabytes = !ep_is_empty(ep);
1915        while (!ep_is_empty(ep)) {
1916                i = udc_ep_readl(ep, UDCDR);
1917                ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1918        }
1919
1920        ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1921                u.r.bRequestType, u.r.bRequest,
1922                le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1923                le16_to_cpu(u.r.wLength));
1924        if (unlikely(have_extrabytes))
1925                goto stall;
1926
1927        if (u.r.bRequestType & USB_DIR_IN)
1928                set_ep0state(udc, IN_DATA_STAGE);
1929        else
1930                set_ep0state(udc, OUT_DATA_STAGE);
1931
1932        /* Tell UDC to enter Data Stage */
1933        ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1934
1935        spin_unlock_irqrestore(&ep->lock, flags);
1936        i = udc->driver->setup(&udc->gadget, &u.r);
1937        spin_lock_irqsave(&ep->lock, flags);
1938        if (i < 0)
1939                goto stall;
1940out:
1941        spin_unlock_irqrestore(&ep->lock, flags);
1942        return;
1943stall:
1944        ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1945                udc_ep_readl(ep, UDCCSR), i);
1946        ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1947        set_ep0state(udc, STALL);
1948        goto out;
1949}
1950
1951/**
1952 * handle_ep0 - Handle control endpoint data transfers
1953 * @udc: udc device
1954 * @fifo_irq: 1 if triggered by fifo service type irq
1955 * @opc_irq: 1 if triggered by output packet complete type irq
1956 *
1957 * Context : when in_interrupt() or with ep->lock held
1958 *
1959 * Tries to transfer all pending request data into the endpoint and/or
1960 * transfer all pending data in the endpoint into usb requests.
1961 * Handles states of ep0 automata.
1962 *
1963 * PXA27x hardware handles several standard usb control requests without
1964 * driver notification.  The requests fully handled by hardware are :
1965 *  SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
1966 *  GET_STATUS
1967 * The requests handled by hardware, but with irq notification are :
1968 *  SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
1969 * The remaining standard requests really handled by handle_ep0 are :
1970 *  GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
1971 * Requests standardized outside of USB 2.0 chapter 9 are handled more
1972 * uniformly, by gadget drivers.
1973 *
1974 * The control endpoint state machine is _not_ USB spec compliant, it's even
1975 * hardly compliant with Intel PXA270 developers guide.
1976 * The key points which inferred this state machine are :
1977 *   - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
1978 *     software.
1979 *   - on every OUT packet received, UDCCSR0_OPC is raised and held until
1980 *     cleared by software.
1981 *   - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
1982 *     before reading ep0.
1983 *     This is true only for PXA27x. This is not true anymore for PXA3xx family
1984 *     (check Back-to-Back setup packet in developers guide).
1985 *   - irq can be called on a "packet complete" event (opc_irq=1), while
1986 *     UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
1987 *     from experimentation).
1988 *   - as UDCCSR0_SA can be activated while in irq handling, and clearing
1989 *     UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
1990 *     => we never actually read the "status stage" packet of an IN data stage
1991 *     => this is not documented in Intel documentation
1992 *   - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
1993 *     STAGE. The driver add STATUS STAGE to send last zero length packet in
1994 *     OUT_STATUS_STAGE.
1995 *   - special attention was needed for IN_STATUS_STAGE. If a packet complete
1996 *     event is detected, we terminate the status stage without ackowledging the
1997 *     packet (not to risk to loose a potential SETUP packet)
1998 */
1999static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2000{
2001        u32                     udccsr0;
2002        struct pxa_ep           *ep = &udc->pxa_ep[0];
2003        struct pxa27x_request   *req = NULL;
2004        int                     completed = 0;
2005
2006        if (!list_empty(&ep->queue))
2007                req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2008
2009        udccsr0 = udc_ep_readl(ep, UDCCSR);
2010        ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2011                EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2012                (fifo_irq << 1 | opc_irq));
2013
2014        if (udccsr0 & UDCCSR0_SST) {
2015                ep_dbg(ep, "clearing stall status\n");
2016                nuke(ep, -EPIPE);
2017                ep_write_UDCCSR(ep, UDCCSR0_SST);
2018                ep0_idle(udc);
2019        }
2020
2021        if (udccsr0 & UDCCSR0_SA) {
2022                nuke(ep, 0);
2023                set_ep0state(udc, SETUP_STAGE);
2024        }
2025
2026        switch (udc->ep0state) {
2027        case WAIT_FOR_SETUP:
2028                /*
2029                 * Hardware bug : beware, we cannot clear OPC, since we would
2030                 * miss a potential OPC irq for a setup packet.
2031                 * So, we only do ... nothing, and hope for a next irq with
2032                 * UDCCSR0_SA set.
2033                 */
2034                break;
2035        case SETUP_STAGE:
2036                udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2037                if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2038                        handle_ep0_ctrl_req(udc, req);
2039                break;
2040        case IN_DATA_STAGE:                     /* GET_DESCRIPTOR */
2041                if (epout_has_pkt(ep))
2042                        ep_write_UDCCSR(ep, UDCCSR0_OPC);
2043                if (req && !ep_is_full(ep))
2044                        completed = write_ep0_fifo(ep, req);
2045                if (completed)
2046                        ep0_end_in_req(ep, req, NULL);
2047                break;
2048        case OUT_DATA_STAGE:                    /* SET_DESCRIPTOR */
2049                if (epout_has_pkt(ep) && req)
2050                        completed = read_ep0_fifo(ep, req);
2051                if (completed)
2052                        ep0_end_out_req(ep, req, NULL);
2053                break;
2054        case STALL:
2055                ep_write_UDCCSR(ep, UDCCSR0_FST);
2056                break;
2057        case IN_STATUS_STAGE:
2058                /*
2059                 * Hardware bug : beware, we cannot clear OPC, since we would
2060                 * miss a potential PC irq for a setup packet.
2061                 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2062                 */
2063                if (opc_irq)
2064                        ep0_idle(udc);
2065                break;
2066        case OUT_STATUS_STAGE:
2067        case WAIT_ACK_SET_CONF_INTERF:
2068                ep_warn(ep, "should never get in %s state here!!!\n",
2069                                EP0_STNAME(ep->dev));
2070                ep0_idle(udc);
2071                break;
2072        }
2073}
2074
2075/**
2076 * handle_ep - Handle endpoint data tranfers
2077 * @ep: pxa physical endpoint
2078 *
2079 * Tries to transfer all pending request data into the endpoint and/or
2080 * transfer all pending data in the endpoint into usb requests.
2081 *
2082 * Is always called when in_interrupt() and with ep->lock released.
2083 */
2084static void handle_ep(struct pxa_ep *ep)
2085{
2086        struct pxa27x_request   *req;
2087        int completed;
2088        u32 udccsr;
2089        int is_in = ep->dir_in;
2090        int loop = 0;
2091        unsigned long           flags;
2092
2093        spin_lock_irqsave(&ep->lock, flags);
2094        if (ep->in_handle_ep)
2095                goto recursion_detected;
2096        ep->in_handle_ep = 1;
2097
2098        do {
2099                completed = 0;
2100                udccsr = udc_ep_readl(ep, UDCCSR);
2101
2102                if (likely(!list_empty(&ep->queue)))
2103                        req = list_entry(ep->queue.next,
2104                                        struct pxa27x_request, queue);
2105                else
2106                        req = NULL;
2107
2108                ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2109                                req, udccsr, loop++);
2110
2111                if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2112                        udc_ep_writel(ep, UDCCSR,
2113                                        udccsr & (UDCCSR_SST | UDCCSR_TRN));
2114                if (!req)
2115                        break;
2116
2117                if (unlikely(is_in)) {
2118                        if (likely(!ep_is_full(ep)))
2119                                completed = write_fifo(ep, req);
2120                } else {
2121                        if (likely(epout_has_pkt(ep)))
2122                                completed = read_fifo(ep, req);
2123                }
2124
2125                if (completed) {
2126                        if (is_in)
2127                                ep_end_in_req(ep, req, &flags);
2128                        else
2129                                ep_end_out_req(ep, req, &flags);
2130                }
2131        } while (completed);
2132
2133        ep->in_handle_ep = 0;
2134recursion_detected:
2135        spin_unlock_irqrestore(&ep->lock, flags);
2136}
2137
2138/**
2139 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2140 * @udc: udc device
2141 * @config: usb configuration
2142 *
2143 * Post the request to upper level.
2144 * Don't use any pxa specific harware configuration capabilities
2145 */
2146static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2147{
2148        struct usb_ctrlrequest req ;
2149
2150        dev_dbg(udc->dev, "config=%d\n", config);
2151
2152        udc->config = config;
2153        udc->last_interface = 0;
2154        udc->last_alternate = 0;
2155
2156        req.bRequestType = 0;
2157        req.bRequest = USB_REQ_SET_CONFIGURATION;
2158        req.wValue = config;
2159        req.wIndex = 0;
2160        req.wLength = 0;
2161
2162        set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2163        udc->driver->setup(&udc->gadget, &req);
2164        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2165}
2166
2167/**
2168 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2169 * @udc: udc device
2170 * @iface: interface number
2171 * @alt: alternate setting number
2172 *
2173 * Post the request to upper level.
2174 * Don't use any pxa specific harware configuration capabilities
2175 */
2176static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2177{
2178        struct usb_ctrlrequest  req;
2179
2180        dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2181
2182        udc->last_interface = iface;
2183        udc->last_alternate = alt;
2184
2185        req.bRequestType = USB_RECIP_INTERFACE;
2186        req.bRequest = USB_REQ_SET_INTERFACE;
2187        req.wValue = alt;
2188        req.wIndex = iface;
2189        req.wLength = 0;
2190
2191        set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2192        udc->driver->setup(&udc->gadget, &req);
2193        ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2194}
2195
2196/*
2197 * irq_handle_data - Handle data transfer
2198 * @irq: irq IRQ number
2199 * @udc: dev pxa_udc device structure
2200 *
2201 * Called from irq handler, transferts data to or from endpoint to queue
2202 */
2203static void irq_handle_data(int irq, struct pxa_udc *udc)
2204{
2205        int i;
2206        struct pxa_ep *ep;
2207        u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2208        u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2209
2210        if (udcisr0 & UDCISR_INT_MASK) {
2211                udc->pxa_ep[0].stats.irqs++;
2212                udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2213                handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2214                                !!(udcisr0 & UDCICR_PKTCOMPL));
2215        }
2216
2217        udcisr0 >>= 2;
2218        for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2219                if (!(udcisr0 & UDCISR_INT_MASK))
2220                        continue;
2221
2222                udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2223
2224                WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2225                if (i < ARRAY_SIZE(udc->pxa_ep)) {
2226                        ep = &udc->pxa_ep[i];
2227                        ep->stats.irqs++;
2228                        handle_ep(ep);
2229                }
2230        }
2231
2232        for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2233                udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2234                if (!(udcisr1 & UDCISR_INT_MASK))
2235                        continue;
2236
2237                WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2238                if (i < ARRAY_SIZE(udc->pxa_ep)) {
2239                        ep = &udc->pxa_ep[i];
2240                        ep->stats.irqs++;
2241                        handle_ep(ep);
2242                }
2243        }
2244
2245}
2246
2247/**
2248 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2249 * @udc: udc device
2250 */
2251static void irq_udc_suspend(struct pxa_udc *udc)
2252{
2253        udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2254        udc->stats.irqs_suspend++;
2255
2256        if (udc->gadget.speed != USB_SPEED_UNKNOWN
2257                        && udc->driver && udc->driver->suspend)
2258                udc->driver->suspend(&udc->gadget);
2259        ep0_idle(udc);
2260}
2261
2262/**
2263  * irq_udc_resume - Handle IRQ "UDC Resume"
2264  * @udc: udc device
2265  */
2266static void irq_udc_resume(struct pxa_udc *udc)
2267{
2268        udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2269        udc->stats.irqs_resume++;
2270
2271        if (udc->gadget.speed != USB_SPEED_UNKNOWN
2272                        && udc->driver && udc->driver->resume)
2273                udc->driver->resume(&udc->gadget);
2274}
2275
2276/**
2277 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2278 * @udc: udc device
2279 */
2280static void irq_udc_reconfig(struct pxa_udc *udc)
2281{
2282        unsigned config, interface, alternate, config_change;
2283        u32 udccr = udc_readl(udc, UDCCR);
2284
2285        udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2286        udc->stats.irqs_reconfig++;
2287
2288        config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2289        config_change = (config != udc->config);
2290        pxa27x_change_configuration(udc, config);
2291
2292        interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2293        alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2294        pxa27x_change_interface(udc, interface, alternate);
2295
2296        if (config_change)
2297                update_pxa_ep_matches(udc);
2298        udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2299}
2300
2301/**
2302 * irq_udc_reset - Handle IRQ "UDC Reset"
2303 * @udc: udc device
2304 */
2305static void irq_udc_reset(struct pxa_udc *udc)
2306{
2307        u32 udccr = udc_readl(udc, UDCCR);
2308        struct pxa_ep *ep = &udc->pxa_ep[0];
2309
2310        dev_info(udc->dev, "USB reset\n");
2311        udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2312        udc->stats.irqs_reset++;
2313
2314        if ((udccr & UDCCR_UDA) == 0) {
2315                dev_dbg(udc->dev, "USB reset start\n");
2316                stop_activity(udc, udc->driver);
2317        }
2318        udc->gadget.speed = USB_SPEED_FULL;
2319        memset(&udc->stats, 0, sizeof udc->stats);
2320
2321        nuke(ep, -EPROTO);
2322        ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2323        ep0_idle(udc);
2324}
2325
2326/**
2327 * pxa_udc_irq - Main irq handler
2328 * @irq: irq number
2329 * @_dev: udc device
2330 *
2331 * Handles all udc interrupts
2332 */
2333static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2334{
2335        struct pxa_udc *udc = _dev;
2336        u32 udcisr0 = udc_readl(udc, UDCISR0);
2337        u32 udcisr1 = udc_readl(udc, UDCISR1);
2338        u32 udccr = udc_readl(udc, UDCCR);
2339        u32 udcisr1_spec;
2340
2341        dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2342                 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2343
2344        udcisr1_spec = udcisr1 & 0xf8000000;
2345        if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2346                irq_udc_suspend(udc);
2347        if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2348                irq_udc_resume(udc);
2349        if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2350                irq_udc_reconfig(udc);
2351        if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2352                irq_udc_reset(udc);
2353
2354        if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2355                irq_handle_data(irq, udc);
2356
2357        return IRQ_HANDLED;
2358}
2359
2360static struct pxa_udc memory = {
2361        .gadget = {
2362                .ops            = &pxa_udc_ops,
2363                .ep0            = &memory.udc_usb_ep[0].usb_ep,
2364                .name           = driver_name,
2365                .dev = {
2366                        .init_name      = "gadget",
2367                },
2368        },
2369
2370        .udc_usb_ep = {
2371                USB_EP_CTRL,
2372                USB_EP_OUT_BULK(1),
2373                USB_EP_IN_BULK(2),
2374                USB_EP_IN_ISO(3),
2375                USB_EP_OUT_ISO(4),
2376                USB_EP_IN_INT(5),
2377        },
2378
2379        .pxa_ep = {
2380                PXA_EP_CTRL,
2381                /* Endpoints for gadget zero */
2382                PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2383                PXA_EP_IN_BULK(2,  2, 3, 0, 0),
2384                /* Endpoints for ether gadget, file storage gadget */
2385                PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2386                PXA_EP_IN_BULK(4,  2, 1, 0, 0),
2387                PXA_EP_IN_ISO(5,   3, 1, 0, 0),
2388                PXA_EP_OUT_ISO(6,  4, 1, 0, 0),
2389                PXA_EP_IN_INT(7,   5, 1, 0, 0),
2390                /* Endpoints for RNDIS, serial */
2391                PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2392                PXA_EP_IN_BULK(9,  2, 2, 0, 0),
2393                PXA_EP_IN_INT(10,  5, 2, 0, 0),
2394                /*
2395                 * All the following endpoints are only for completion.  They
2396                 * won't never work, as multiple interfaces are really broken on
2397                 * the pxa.
2398                */
2399                PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2400                PXA_EP_IN_BULK(12,  2, 2, 1, 0),
2401                /* Endpoint for CDC Ether */
2402                PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2403                PXA_EP_IN_BULK(14,  2, 1, 1, 1),
2404        }
2405};
2406
2407/**
2408 * pxa_udc_probe - probes the udc device
2409 * @_dev: platform device
2410 *
2411 * Perform basic init : allocates udc clock, creates sysfs files, requests
2412 * irq.
2413 */
2414static int pxa_udc_probe(struct platform_device *pdev)
2415{
2416        struct resource *regs;
2417        struct pxa_udc *udc = &memory;
2418        int retval = 0, gpio;
2419
2420        regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2421        if (!regs)
2422                return -ENXIO;
2423        udc->irq = platform_get_irq(pdev, 0);
2424        if (udc->irq < 0)
2425                return udc->irq;
2426
2427        udc->dev = &pdev->dev;
2428        udc->mach = dev_get_platdata(&pdev->dev);
2429        udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2430
2431        gpio = udc->mach->gpio_pullup;
2432        if (gpio_is_valid(gpio)) {
2433                retval = gpio_request(gpio, "USB D+ pullup");
2434                if (retval == 0)
2435                        gpio_direction_output(gpio,
2436                                       udc->mach->gpio_pullup_inverted);
2437        }
2438        if (retval) {
2439                dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2440                        gpio, retval);
2441                return retval;
2442        }
2443
2444        udc->clk = clk_get(&pdev->dev, NULL);
2445        if (IS_ERR(udc->clk)) {
2446                retval = PTR_ERR(udc->clk);
2447                goto err_clk;
2448        }
2449        retval = clk_prepare(udc->clk);
2450        if (retval)
2451                goto err_clk_prepare;
2452
2453        retval = -ENOMEM;
2454        udc->regs = ioremap(regs->start, resource_size(regs));
2455        if (!udc->regs) {
2456                dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2457                goto err_map;
2458        }
2459
2460        udc->vbus_sensed = 0;
2461
2462        the_controller = udc;
2463        platform_set_drvdata(pdev, udc);
2464        udc_init_data(udc);
2465        pxa_eps_setup(udc);
2466
2467        /* irq setup after old hardware state is cleaned up */
2468        retval = request_irq(udc->irq, pxa_udc_irq,
2469                        IRQF_SHARED, driver_name, udc);
2470        if (retval != 0) {
2471                dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2472                        driver_name, udc->irq, retval);
2473                goto err_irq;
2474        }
2475
2476        retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2477        if (retval)
2478                goto err_add_udc;
2479
2480        pxa_init_debugfs(udc);
2481
2482        return 0;
2483
2484err_add_udc:
2485        free_irq(udc->irq, udc);
2486err_irq:
2487        iounmap(udc->regs);
2488err_map:
2489        clk_unprepare(udc->clk);
2490err_clk_prepare:
2491        clk_put(udc->clk);
2492        udc->clk = NULL;
2493err_clk:
2494        return retval;
2495}
2496
2497/**
2498 * pxa_udc_remove - removes the udc device driver
2499 * @_dev: platform device
2500 */
2501static int pxa_udc_remove(struct platform_device *_dev)
2502{
2503        struct pxa_udc *udc = platform_get_drvdata(_dev);
2504        int gpio = udc->mach->gpio_pullup;
2505
2506        usb_del_gadget_udc(&udc->gadget);
2507        usb_gadget_unregister_driver(udc->driver);
2508        free_irq(udc->irq, udc);
2509        pxa_cleanup_debugfs(udc);
2510        if (gpio_is_valid(gpio))
2511                gpio_free(gpio);
2512
2513        usb_put_phy(udc->transceiver);
2514
2515        udc->transceiver = NULL;
2516        the_controller = NULL;
2517        clk_unprepare(udc->clk);
2518        clk_put(udc->clk);
2519        iounmap(udc->regs);
2520
2521        return 0;
2522}
2523
2524static void pxa_udc_shutdown(struct platform_device *_dev)
2525{
2526        struct pxa_udc *udc = platform_get_drvdata(_dev);
2527
2528        if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2529                udc_disable(udc);
2530}
2531
2532#ifdef CONFIG_PXA27x
2533extern void pxa27x_clear_otgph(void);
2534#else
2535#define pxa27x_clear_otgph()   do {} while (0)
2536#endif
2537
2538#ifdef CONFIG_PM
2539/**
2540 * pxa_udc_suspend - Suspend udc device
2541 * @_dev: platform device
2542 * @state: suspend state
2543 *
2544 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2545 * device.
2546 */
2547static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2548{
2549        int i;
2550        struct pxa_udc *udc = platform_get_drvdata(_dev);
2551        struct pxa_ep *ep;
2552
2553        ep = &udc->pxa_ep[0];
2554        udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2555        for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2556                ep = &udc->pxa_ep[i];
2557                ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2558                ep->udccr_value  = udc_ep_readl(ep, UDCCR);
2559                ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2560                                ep->udccsr_value, ep->udccr_value);
2561        }
2562
2563        udc_disable(udc);
2564        udc->pullup_resume = udc->pullup_on;
2565        dplus_pullup(udc, 0);
2566
2567        return 0;
2568}
2569
2570/**
2571 * pxa_udc_resume - Resume udc device
2572 * @_dev: platform device
2573 *
2574 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2575 * device.
2576 */
2577static int pxa_udc_resume(struct platform_device *_dev)
2578{
2579        int i;
2580        struct pxa_udc *udc = platform_get_drvdata(_dev);
2581        struct pxa_ep *ep;
2582
2583        ep = &udc->pxa_ep[0];
2584        udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2585        for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2586                ep = &udc->pxa_ep[i];
2587                udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2588                udc_ep_writel(ep, UDCCR,  ep->udccr_value);
2589                ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2590                                ep->udccsr_value, ep->udccr_value);
2591        }
2592
2593        dplus_pullup(udc, udc->pullup_resume);
2594        if (should_enable_udc(udc))
2595                udc_enable(udc);
2596        /*
2597         * We do not handle OTG yet.
2598         *
2599         * OTGPH bit is set when sleep mode is entered.
2600         * it indicates that OTG pad is retaining its state.
2601         * Upon exit from sleep mode and before clearing OTGPH,
2602         * Software must configure the USB OTG pad, UDC, and UHC
2603         * to the state they were in before entering sleep mode.
2604         */
2605        pxa27x_clear_otgph();
2606
2607        return 0;
2608}
2609#endif
2610
2611/* work with hotplug and coldplug */
2612MODULE_ALIAS("platform:pxa27x-udc");
2613
2614static struct platform_driver udc_driver = {
2615        .driver         = {
2616                .name   = "pxa27x-udc",
2617                .owner  = THIS_MODULE,
2618        },
2619        .probe          = pxa_udc_probe,
2620        .remove         = pxa_udc_remove,
2621        .shutdown       = pxa_udc_shutdown,
2622#ifdef CONFIG_PM
2623        .suspend        = pxa_udc_suspend,
2624        .resume         = pxa_udc_resume
2625#endif
2626};
2627
2628module_platform_driver(udc_driver);
2629
2630MODULE_DESCRIPTION(DRIVER_DESC);
2631MODULE_AUTHOR("Robert Jarzmik");
2632MODULE_LICENSE("GPL");
2633