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11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13#include <linux/dma-mapping.h>
14#include <linux/interrupt.h>
15#include <linux/clk.h>
16#include <linux/fb.h>
17#include <linux/init.h>
18#include <linux/delay.h>
19#include <linux/backlight.h>
20#include <linux/gfp.h>
21#include <linux/module.h>
22#include <linux/platform_data/atmel.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/of_gpio.h>
26#include <video/of_display_timing.h>
27#include <video/videomode.h>
28
29#include <mach/cpu.h>
30#include <asm/gpio.h>
31
32#include <video/atmel_lcdc.h>
33
34struct atmel_lcdfb_config {
35 bool have_alt_pixclock;
36 bool have_hozval;
37 bool have_intensity_bit;
38};
39
40
41struct atmel_lcdfb_info {
42 spinlock_t lock;
43 struct fb_info *info;
44 void __iomem *mmio;
45 int irq_base;
46 struct work_struct task;
47
48 unsigned int smem_len;
49 struct platform_device *pdev;
50 struct clk *bus_clk;
51 struct clk *lcdc_clk;
52
53 struct backlight_device *backlight;
54 u8 bl_power;
55 u8 saved_lcdcon;
56
57 u32 pseudo_palette[16];
58 bool have_intensity_bit;
59
60 struct atmel_lcdfb_pdata pdata;
61
62 struct atmel_lcdfb_config *config;
63};
64
65struct atmel_lcdfb_power_ctrl_gpio {
66 int gpio;
67 int active_low;
68
69 struct list_head list;
70};
71
72#define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
73#define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
74
75
76#define ATMEL_LCDC_CVAL_DEFAULT 0xc8
77#define ATMEL_LCDC_DMA_BURST_LEN 8
78#define ATMEL_LCDC_FIFO_SIZE 512
79
80static struct atmel_lcdfb_config at91sam9261_config = {
81 .have_hozval = true,
82 .have_intensity_bit = true,
83};
84
85static struct atmel_lcdfb_config at91sam9263_config = {
86 .have_intensity_bit = true,
87};
88
89static struct atmel_lcdfb_config at91sam9g10_config = {
90 .have_hozval = true,
91};
92
93static struct atmel_lcdfb_config at91sam9g45_config = {
94 .have_alt_pixclock = true,
95};
96
97static struct atmel_lcdfb_config at91sam9g45es_config = {
98};
99
100static struct atmel_lcdfb_config at91sam9rl_config = {
101 .have_intensity_bit = true,
102};
103
104static struct atmel_lcdfb_config at32ap_config = {
105 .have_hozval = true,
106};
107
108static const struct platform_device_id atmel_lcdfb_devtypes[] = {
109 {
110 .name = "at91sam9261-lcdfb",
111 .driver_data = (unsigned long)&at91sam9261_config,
112 }, {
113 .name = "at91sam9263-lcdfb",
114 .driver_data = (unsigned long)&at91sam9263_config,
115 }, {
116 .name = "at91sam9g10-lcdfb",
117 .driver_data = (unsigned long)&at91sam9g10_config,
118 }, {
119 .name = "at91sam9g45-lcdfb",
120 .driver_data = (unsigned long)&at91sam9g45_config,
121 }, {
122 .name = "at91sam9g45es-lcdfb",
123 .driver_data = (unsigned long)&at91sam9g45es_config,
124 }, {
125 .name = "at91sam9rl-lcdfb",
126 .driver_data = (unsigned long)&at91sam9rl_config,
127 }, {
128 .name = "at32ap-lcdfb",
129 .driver_data = (unsigned long)&at32ap_config,
130 }, {
131
132 }
133};
134MODULE_DEVICE_TABLE(platform, atmel_lcdfb_devtypes);
135
136static struct atmel_lcdfb_config *
137atmel_lcdfb_get_config(struct platform_device *pdev)
138{
139 unsigned long data;
140
141 data = platform_get_device_id(pdev)->driver_data;
142
143 return (struct atmel_lcdfb_config *)data;
144}
145
146#if defined(CONFIG_ARCH_AT91)
147#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
148 | FBINFO_PARTIAL_PAN_OK \
149 | FBINFO_HWACCEL_YPAN)
150
151static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
152 struct fb_var_screeninfo *var,
153 struct fb_info *info)
154{
155
156}
157#elif defined(CONFIG_AVR32)
158#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
159 | FBINFO_PARTIAL_PAN_OK \
160 | FBINFO_HWACCEL_XPAN \
161 | FBINFO_HWACCEL_YPAN)
162
163static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
164 struct fb_var_screeninfo *var,
165 struct fb_info *info)
166{
167 u32 dma2dcfg;
168 u32 pixeloff;
169
170 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
171
172 dma2dcfg = (info->var.xres_virtual - info->var.xres)
173 * info->var.bits_per_pixel / 8;
174 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
175 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
176
177
178 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
179 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
180 | ATMEL_LCDC_DMAUPDT);
181}
182#endif
183
184static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
185 | ATMEL_LCDC_POL_POSITIVE
186 | ATMEL_LCDC_ENA_PWMENABLE;
187
188#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
189
190
191static int atmel_bl_update_status(struct backlight_device *bl)
192{
193 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
194 int power = sinfo->bl_power;
195 int brightness = bl->props.brightness;
196
197
198
199
200
201 if (bl->props.fb_blank != sinfo->bl_power)
202 power = bl->props.fb_blank;
203 else if (bl->props.power != sinfo->bl_power)
204 power = bl->props.power;
205
206 if (brightness < 0 && power == FB_BLANK_UNBLANK)
207 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
208 else if (power != FB_BLANK_UNBLANK)
209 brightness = 0;
210
211 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
212 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
213 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
214 brightness ? contrast_ctr : 0);
215 else
216 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
217
218 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
219
220 return 0;
221}
222
223static int atmel_bl_get_brightness(struct backlight_device *bl)
224{
225 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
226
227 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
228}
229
230static const struct backlight_ops atmel_lcdc_bl_ops = {
231 .update_status = atmel_bl_update_status,
232 .get_brightness = atmel_bl_get_brightness,
233};
234
235static void init_backlight(struct atmel_lcdfb_info *sinfo)
236{
237 struct backlight_properties props;
238 struct backlight_device *bl;
239
240 sinfo->bl_power = FB_BLANK_UNBLANK;
241
242 if (sinfo->backlight)
243 return;
244
245 memset(&props, 0, sizeof(struct backlight_properties));
246 props.type = BACKLIGHT_RAW;
247 props.max_brightness = 0xff;
248 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
249 &atmel_lcdc_bl_ops, &props);
250 if (IS_ERR(bl)) {
251 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
252 PTR_ERR(bl));
253 return;
254 }
255 sinfo->backlight = bl;
256
257 bl->props.power = FB_BLANK_UNBLANK;
258 bl->props.fb_blank = FB_BLANK_UNBLANK;
259 bl->props.brightness = atmel_bl_get_brightness(bl);
260}
261
262static void exit_backlight(struct atmel_lcdfb_info *sinfo)
263{
264 if (!sinfo->backlight)
265 return;
266
267 if (sinfo->backlight->ops) {
268 sinfo->backlight->props.power = FB_BLANK_POWERDOWN;
269 sinfo->backlight->ops->update_status(sinfo->backlight);
270 }
271 backlight_device_unregister(sinfo->backlight);
272}
273
274#else
275
276static void init_backlight(struct atmel_lcdfb_info *sinfo)
277{
278 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
279}
280
281static void exit_backlight(struct atmel_lcdfb_info *sinfo)
282{
283}
284
285#endif
286
287static void init_contrast(struct atmel_lcdfb_info *sinfo)
288{
289 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
290
291
292 if (pdata->lcdcon_pol_negative)
293 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
294
295
296 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
297 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
298
299 if (pdata->lcdcon_is_backlight)
300 init_backlight(sinfo);
301}
302
303static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on)
304{
305 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
306
307 if (pdata->atmel_lcdfb_power_control)
308 pdata->atmel_lcdfb_power_control(pdata, on);
309}
310
311static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
312 .type = FB_TYPE_PACKED_PIXELS,
313 .visual = FB_VISUAL_TRUECOLOR,
314 .xpanstep = 0,
315 .ypanstep = 1,
316 .ywrapstep = 0,
317 .accel = FB_ACCEL_NONE,
318};
319
320static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
321 unsigned long xres)
322{
323 unsigned long lcdcon2;
324 unsigned long value;
325
326 if (!sinfo->config->have_hozval)
327 return xres;
328
329 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
330 value = xres;
331 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
332
333 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
334 value *= 3;
335 }
336 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
337 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
338 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
339 value = DIV_ROUND_UP(value, 4);
340 else
341 value = DIV_ROUND_UP(value, 8);
342 }
343
344 return value;
345}
346
347static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
348{
349 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
350
351
352 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
353 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
354
355
356 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
357 msleep(10);
358
359 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
360}
361
362static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
363{
364 atmel_lcdfb_stop_nowait(sinfo);
365
366
367 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
368 msleep(10);
369}
370
371static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
372{
373 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
374
375 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon);
376 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
377 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
378 | ATMEL_LCDC_PWR);
379}
380
381static void atmel_lcdfb_update_dma(struct fb_info *info,
382 struct fb_var_screeninfo *var)
383{
384 struct atmel_lcdfb_info *sinfo = info->par;
385 struct fb_fix_screeninfo *fix = &info->fix;
386 unsigned long dma_addr;
387
388 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
389 + var->xoffset * info->var.bits_per_pixel / 8);
390
391 dma_addr &= ~3UL;
392
393
394 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
395
396 atmel_lcdfb_update_dma2d(sinfo, var, info);
397}
398
399static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
400{
401 struct fb_info *info = sinfo->info;
402
403 dma_free_writecombine(info->device, info->fix.smem_len,
404 info->screen_base, info->fix.smem_start);
405}
406
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413
414static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
415{
416 struct fb_info *info = sinfo->info;
417 struct fb_var_screeninfo *var = &info->var;
418 unsigned int smem_len;
419
420 smem_len = (var->xres_virtual * var->yres_virtual
421 * ((var->bits_per_pixel + 7) / 8));
422 info->fix.smem_len = max(smem_len, sinfo->smem_len);
423
424 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
425 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
426
427 if (!info->screen_base) {
428 return -ENOMEM;
429 }
430
431 memset(info->screen_base, 0, info->fix.smem_len);
432
433 return 0;
434}
435
436static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
437 struct fb_info *info)
438{
439 struct fb_videomode varfbmode;
440 const struct fb_videomode *fbmode = NULL;
441
442 fb_var_to_videomode(&varfbmode, var);
443 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
444 if (fbmode)
445 fb_videomode_to_var(var, fbmode);
446 return fbmode;
447}
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473static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
474 struct fb_info *info)
475{
476 struct device *dev = info->device;
477 struct atmel_lcdfb_info *sinfo = info->par;
478 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
479 unsigned long clk_value_khz;
480
481 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
482
483 dev_dbg(dev, "%s:\n", __func__);
484
485 if (!(var->pixclock && var->bits_per_pixel)) {
486
487 if (!atmel_lcdfb_choose_mode(var, info)) {
488 dev_err(dev, "needed value not specified\n");
489 return -EINVAL;
490 }
491 }
492
493 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
494 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
495 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
496 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
497
498 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
499 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
500 return -EINVAL;
501 }
502
503
504 if (var->xres > var->xres_virtual)
505 var->xres_virtual = var->xres;
506
507 if (var->yres > var->yres_virtual)
508 var->yres_virtual = var->yres;
509
510
511 var->xres = (var->xres + 3) & ~3UL;
512 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
513
514 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
515 var->transp.msb_right = 0;
516 var->transp.offset = var->transp.length = 0;
517 var->xoffset = var->yoffset = 0;
518
519 if (info->fix.smem_len) {
520 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
521 * ((var->bits_per_pixel + 7) / 8));
522 if (smem_len > info->fix.smem_len) {
523 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
524 info->fix.smem_len, smem_len);
525 return -EINVAL;
526 }
527 }
528
529
530 var->vsync_len = min_t(u32, var->vsync_len,
531 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
532 var->upper_margin = min_t(u32, var->upper_margin,
533 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
534 var->lower_margin = min_t(u32, var->lower_margin,
535 ATMEL_LCDC_VFP);
536 var->right_margin = min_t(u32, var->right_margin,
537 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
538 var->hsync_len = min_t(u32, var->hsync_len,
539 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
540 var->left_margin = min_t(u32, var->left_margin,
541 ATMEL_LCDC_HBP + 1);
542
543
544 var->vsync_len = max_t(u32, var->vsync_len, 1);
545 var->right_margin = max_t(u32, var->right_margin, 1);
546 var->hsync_len = max_t(u32, var->hsync_len, 1);
547 var->left_margin = max_t(u32, var->left_margin, 1);
548
549 switch (var->bits_per_pixel) {
550 case 1:
551 case 2:
552 case 4:
553 case 8:
554 var->red.offset = var->green.offset = var->blue.offset = 0;
555 var->red.length = var->green.length = var->blue.length
556 = var->bits_per_pixel;
557 break;
558 case 16:
559
560 if (sinfo->config->have_intensity_bit)
561 var->green.length = 5;
562 else
563 var->green.length = 6;
564
565 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
566
567 var->red.offset = var->green.length + 5;
568 var->blue.offset = 0;
569 } else {
570
571 var->red.offset = 0;
572 var->blue.offset = var->green.length + 5;
573 }
574 var->green.offset = 5;
575 var->red.length = var->blue.length = 5;
576 break;
577 case 32:
578 var->transp.offset = 24;
579 var->transp.length = 8;
580
581 case 24:
582 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
583
584 var->red.offset = 16;
585 var->blue.offset = 0;
586 } else {
587
588 var->red.offset = 0;
589 var->blue.offset = 16;
590 }
591 var->green.offset = 8;
592 var->red.length = var->green.length = var->blue.length = 8;
593 break;
594 default:
595 dev_err(dev, "color depth %d not supported\n",
596 var->bits_per_pixel);
597 return -EINVAL;
598 }
599
600 return 0;
601}
602
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606static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
607{
608 might_sleep();
609
610 atmel_lcdfb_stop(sinfo);
611 atmel_lcdfb_start(sinfo);
612}
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628static int atmel_lcdfb_set_par(struct fb_info *info)
629{
630 struct atmel_lcdfb_info *sinfo = info->par;
631 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
632 unsigned long hozval_linesz;
633 unsigned long value;
634 unsigned long clk_value_khz;
635 unsigned long bits_per_line;
636 unsigned long pix_factor = 2;
637
638 might_sleep();
639
640 dev_dbg(info->device, "%s:\n", __func__);
641 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
642 info->var.xres, info->var.yres,
643 info->var.xres_virtual, info->var.yres_virtual);
644
645 atmel_lcdfb_stop_nowait(sinfo);
646
647 if (info->var.bits_per_pixel == 1)
648 info->fix.visual = FB_VISUAL_MONO01;
649 else if (info->var.bits_per_pixel <= 8)
650 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
651 else
652 info->fix.visual = FB_VISUAL_TRUECOLOR;
653
654 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
655 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
656
657
658 dev_dbg(info->device, " * update DMA engine\n");
659 atmel_lcdfb_update_dma(info, &info->var);
660
661
662 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
663 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
664 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
665
666
667
668
669 if (sinfo->config->have_alt_pixclock)
670 pix_factor = 1;
671
672 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
673
674 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
675
676 if (value < pix_factor) {
677 dev_notice(info->device, "Bypassing pixel clock divider\n");
678 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
679 } else {
680 value = (value / pix_factor) - 1;
681 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
682 value);
683 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
684 value << ATMEL_LCDC_CLKVAL_OFFSET);
685 info->var.pixclock =
686 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
687 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
688 PICOS2KHZ(info->var.pixclock));
689 }
690
691
692
693 value = pdata->default_lcdcon2;
694
695 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
696 value |= ATMEL_LCDC_INVLINE_INVERTED;
697 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
698 value |= ATMEL_LCDC_INVFRAME_INVERTED;
699
700 switch (info->var.bits_per_pixel) {
701 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
702 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
703 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
704 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
705 case 15:
706 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
707 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
708 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
709 default: BUG(); break;
710 }
711 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
712 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
713
714
715 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
716 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
717 value |= info->var.lower_margin;
718 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
719 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
720
721
722 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
723 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
724 value |= (info->var.left_margin - 1);
725 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
726 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
727
728
729 hozval_linesz = compute_hozval(sinfo, info->var.xres);
730
731
732 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
733 value |= info->var.yres - 1;
734 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
735 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
736
737
738 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
739 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
740
741
742 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
743
744
745 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
746
747 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
748
749
750 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
751 msleep(10);
752
753 atmel_lcdfb_start(sinfo);
754
755 dev_dbg(info->device, " * DONE\n");
756
757 return 0;
758}
759
760static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
761{
762 chan &= 0xffff;
763 chan >>= 16 - bf->length;
764 return chan << bf->offset;
765}
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
793 unsigned int green, unsigned int blue,
794 unsigned int transp, struct fb_info *info)
795{
796 struct atmel_lcdfb_info *sinfo = info->par;
797 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
798 unsigned int val;
799 u32 *pal;
800 int ret = 1;
801
802 if (info->var.grayscale)
803 red = green = blue = (19595 * red + 38470 * green
804 + 7471 * blue) >> 16;
805
806 switch (info->fix.visual) {
807 case FB_VISUAL_TRUECOLOR:
808 if (regno < 16) {
809 pal = info->pseudo_palette;
810
811 val = chan_to_field(red, &info->var.red);
812 val |= chan_to_field(green, &info->var.green);
813 val |= chan_to_field(blue, &info->var.blue);
814
815 pal[regno] = val;
816 ret = 0;
817 }
818 break;
819
820 case FB_VISUAL_PSEUDOCOLOR:
821 if (regno < 256) {
822 if (sinfo->config->have_intensity_bit) {
823
824 val = ((red >> 11) & 0x001f);
825 val |= ((green >> 6) & 0x03e0);
826 val |= ((blue >> 1) & 0x7c00);
827
828
829
830
831
832 } else {
833
834 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
835 val = ((blue >> 11) & 0x001f);
836 val |= ((red >> 0) & 0xf800);
837 } else {
838 val = ((red >> 11) & 0x001f);
839 val |= ((blue >> 0) & 0xf800);
840 }
841
842 val |= ((green >> 5) & 0x07e0);
843 }
844
845 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
846 ret = 0;
847 }
848 break;
849
850 case FB_VISUAL_MONO01:
851 if (regno < 2) {
852 val = (regno == 0) ? 0x00 : 0x1F;
853 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
854 ret = 0;
855 }
856 break;
857
858 }
859
860 return ret;
861}
862
863static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
864 struct fb_info *info)
865{
866 dev_dbg(info->device, "%s\n", __func__);
867
868 atmel_lcdfb_update_dma(info, var);
869
870 return 0;
871}
872
873static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
874{
875 struct atmel_lcdfb_info *sinfo = info->par;
876
877 switch (blank_mode) {
878 case FB_BLANK_UNBLANK:
879 case FB_BLANK_NORMAL:
880 atmel_lcdfb_start(sinfo);
881 break;
882 case FB_BLANK_VSYNC_SUSPEND:
883 case FB_BLANK_HSYNC_SUSPEND:
884 break;
885 case FB_BLANK_POWERDOWN:
886 atmel_lcdfb_stop(sinfo);
887 break;
888 default:
889 return -EINVAL;
890 }
891
892
893 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
894}
895
896static struct fb_ops atmel_lcdfb_ops = {
897 .owner = THIS_MODULE,
898 .fb_check_var = atmel_lcdfb_check_var,
899 .fb_set_par = atmel_lcdfb_set_par,
900 .fb_setcolreg = atmel_lcdfb_setcolreg,
901 .fb_blank = atmel_lcdfb_blank,
902 .fb_pan_display = atmel_lcdfb_pan_display,
903 .fb_fillrect = cfb_fillrect,
904 .fb_copyarea = cfb_copyarea,
905 .fb_imageblit = cfb_imageblit,
906};
907
908static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
909{
910 struct fb_info *info = dev_id;
911 struct atmel_lcdfb_info *sinfo = info->par;
912 u32 status;
913
914 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
915 if (status & ATMEL_LCDC_UFLWI) {
916 dev_warn(info->device, "FIFO underflow %#x\n", status);
917
918 schedule_work(&sinfo->task);
919 }
920 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
921 return IRQ_HANDLED;
922}
923
924
925
926
927static void atmel_lcdfb_task(struct work_struct *work)
928{
929 struct atmel_lcdfb_info *sinfo =
930 container_of(work, struct atmel_lcdfb_info, task);
931
932 atmel_lcdfb_reset(sinfo);
933}
934
935static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
936{
937 struct fb_info *info = sinfo->info;
938 int ret = 0;
939
940 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
941
942 dev_info(info->device,
943 "%luKiB frame buffer at %08lx (mapped at %p)\n",
944 (unsigned long)info->fix.smem_len / 1024,
945 (unsigned long)info->fix.smem_start,
946 info->screen_base);
947
948
949 ret = fb_alloc_cmap(&info->cmap, 256, 0);
950 if (ret < 0)
951 dev_err(info->device, "Alloc color map failed\n");
952
953 return ret;
954}
955
956static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
957{
958 clk_prepare_enable(sinfo->bus_clk);
959 clk_prepare_enable(sinfo->lcdc_clk);
960}
961
962static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
963{
964 clk_disable_unprepare(sinfo->bus_clk);
965 clk_disable_unprepare(sinfo->lcdc_clk);
966}
967
968#ifdef CONFIG_OF
969static const struct of_device_id atmel_lcdfb_dt_ids[] = {
970 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, },
971 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, },
972 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, },
973 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, },
974 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, },
975 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, },
976 { .compatible = "atmel,at32ap-lcdc" , .data = &at32ap_config, },
977 { }
978};
979
980MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids);
981
982static const char *atmel_lcdfb_wiring_modes[] = {
983 [ATMEL_LCDC_WIRING_BGR] = "BRG",
984 [ATMEL_LCDC_WIRING_RGB] = "RGB",
985};
986
987const int atmel_lcdfb_get_of_wiring_modes(struct device_node *np)
988{
989 const char *mode;
990 int err, i;
991
992 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode);
993 if (err < 0)
994 return ATMEL_LCDC_WIRING_BGR;
995
996 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++)
997 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i]))
998 return i;
999
1000 return -ENODEV;
1001}
1002
1003static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on)
1004{
1005 struct atmel_lcdfb_power_ctrl_gpio *og;
1006
1007 list_for_each_entry(og, &pdata->pwr_gpios, list)
1008 gpio_set_value(og->gpio, on);
1009}
1010
1011static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1012{
1013 struct fb_info *info = sinfo->info;
1014 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata;
1015 struct fb_var_screeninfo *var = &info->var;
1016 struct device *dev = &sinfo->pdev->dev;
1017 struct device_node *np =dev->of_node;
1018 struct device_node *display_np;
1019 struct device_node *timings_np;
1020 struct display_timings *timings;
1021 enum of_gpio_flags flags;
1022 struct atmel_lcdfb_power_ctrl_gpio *og;
1023 bool is_gpio_power = false;
1024 int ret = -ENOENT;
1025 int i, gpio;
1026
1027 sinfo->config = (struct atmel_lcdfb_config*)
1028 of_match_device(atmel_lcdfb_dt_ids, dev)->data;
1029
1030 display_np = of_parse_phandle(np, "display", 0);
1031 if (!display_np) {
1032 dev_err(dev, "failed to find display phandle\n");
1033 return -ENOENT;
1034 }
1035
1036 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel);
1037 if (ret < 0) {
1038 dev_err(dev, "failed to get property bits-per-pixel\n");
1039 goto put_display_node;
1040 }
1041
1042 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time);
1043 if (ret < 0) {
1044 dev_err(dev, "failed to get property atmel,guard-time\n");
1045 goto put_display_node;
1046 }
1047
1048 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2);
1049 if (ret < 0) {
1050 dev_err(dev, "failed to get property atmel,lcdcon2\n");
1051 goto put_display_node;
1052 }
1053
1054 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon);
1055 if (ret < 0) {
1056 dev_err(dev, "failed to get property bits-per-pixel\n");
1057 goto put_display_node;
1058 }
1059
1060 INIT_LIST_HEAD(&pdata->pwr_gpios);
1061 ret = -ENOMEM;
1062 for (i = 0; i < of_gpio_named_count(display_np, "atmel,power-control-gpio"); i++) {
1063 gpio = of_get_named_gpio_flags(display_np, "atmel,power-control-gpio",
1064 i, &flags);
1065 if (gpio < 0)
1066 continue;
1067
1068 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL);
1069 if (!og)
1070 goto put_display_node;
1071
1072 og->gpio = gpio;
1073 og->active_low = flags & OF_GPIO_ACTIVE_LOW;
1074 is_gpio_power = true;
1075 ret = devm_gpio_request(dev, gpio, "lcd-power-control-gpio");
1076 if (ret) {
1077 dev_err(dev, "request gpio %d failed\n", gpio);
1078 goto put_display_node;
1079 }
1080
1081 ret = gpio_direction_output(gpio, og->active_low);
1082 if (ret) {
1083 dev_err(dev, "set direction output gpio %d failed\n", gpio);
1084 goto put_display_node;
1085 }
1086 list_add(&og->list, &pdata->pwr_gpios);
1087 }
1088
1089 if (is_gpio_power)
1090 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio;
1091
1092 ret = atmel_lcdfb_get_of_wiring_modes(display_np);
1093 if (ret < 0) {
1094 dev_err(dev, "invalid atmel,lcd-wiring-mode\n");
1095 goto put_display_node;
1096 }
1097 pdata->lcd_wiring_mode = ret;
1098
1099 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight");
1100 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted");
1101
1102 timings = of_get_display_timings(display_np);
1103 if (!timings) {
1104 dev_err(dev, "failed to get display timings\n");
1105 ret = -EINVAL;
1106 goto put_display_node;
1107 }
1108
1109 timings_np = of_find_node_by_name(display_np, "display-timings");
1110 if (!timings_np) {
1111 dev_err(dev, "failed to find display-timings node\n");
1112 ret = -ENODEV;
1113 goto put_display_node;
1114 }
1115
1116 for (i = 0; i < of_get_child_count(timings_np); i++) {
1117 struct videomode vm;
1118 struct fb_videomode fb_vm;
1119
1120 ret = videomode_from_timings(timings, &vm, i);
1121 if (ret < 0)
1122 goto put_timings_node;
1123 ret = fb_videomode_from_videomode(&vm, &fb_vm);
1124 if (ret < 0)
1125 goto put_timings_node;
1126
1127 fb_add_videomode(&fb_vm, &info->modelist);
1128 }
1129
1130 return 0;
1131
1132put_timings_node:
1133 of_node_put(timings_np);
1134put_display_node:
1135 of_node_put(display_np);
1136 return ret;
1137}
1138#else
1139static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo)
1140{
1141 return 0;
1142}
1143#endif
1144
1145static int __init atmel_lcdfb_probe(struct platform_device *pdev)
1146{
1147 struct device *dev = &pdev->dev;
1148 struct fb_info *info;
1149 struct atmel_lcdfb_info *sinfo;
1150 struct atmel_lcdfb_pdata *pdata = NULL;
1151 struct resource *regs = NULL;
1152 struct resource *map = NULL;
1153 struct fb_modelist *modelist;
1154 int ret;
1155
1156 dev_dbg(dev, "%s BEGIN\n", __func__);
1157
1158 ret = -ENOMEM;
1159 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
1160 if (!info) {
1161 dev_err(dev, "cannot allocate memory\n");
1162 goto out;
1163 }
1164
1165 sinfo = info->par;
1166 sinfo->pdev = pdev;
1167 sinfo->info = info;
1168
1169 INIT_LIST_HEAD(&info->modelist);
1170
1171 if (pdev->dev.of_node) {
1172 ret = atmel_lcdfb_of_init(sinfo);
1173 if (ret)
1174 goto free_info;
1175 } else if (dev_get_platdata(dev)) {
1176 struct fb_monspecs *monspecs;
1177 int i;
1178
1179 pdata = dev_get_platdata(dev);
1180 monspecs = pdata->default_monspecs;
1181 sinfo->pdata = *pdata;
1182
1183 for (i = 0; i < monspecs->modedb_len; i++)
1184 fb_add_videomode(&monspecs->modedb[i], &info->modelist);
1185
1186 sinfo->config = atmel_lcdfb_get_config(pdev);
1187
1188 info->var.bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
1189 memcpy(&info->monspecs, pdata->default_monspecs, sizeof(info->monspecs));
1190 } else {
1191 dev_err(dev, "cannot get default configuration\n");
1192 goto free_info;
1193 }
1194
1195 if (!sinfo->config)
1196 goto free_info;
1197
1198 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
1199 info->pseudo_palette = sinfo->pseudo_palette;
1200 info->fbops = &atmel_lcdfb_ops;
1201
1202 info->fix = atmel_lcdfb_fix;
1203 strcpy(info->fix.id, sinfo->pdev->name);
1204
1205
1206 sinfo->bus_clk = clk_get(dev, "hclk");
1207 if (IS_ERR(sinfo->bus_clk)) {
1208 ret = PTR_ERR(sinfo->bus_clk);
1209 goto free_info;
1210 }
1211 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
1212 if (IS_ERR(sinfo->lcdc_clk)) {
1213 ret = PTR_ERR(sinfo->lcdc_clk);
1214 goto put_bus_clk;
1215 }
1216 atmel_lcdfb_start_clock(sinfo);
1217
1218 modelist = list_first_entry(&info->modelist,
1219 struct fb_modelist, list);
1220 fb_videomode_to_var(&info->var, &modelist->mode);
1221
1222 atmel_lcdfb_check_var(&info->var, info);
1223
1224 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1225 if (!regs) {
1226 dev_err(dev, "resources unusable\n");
1227 ret = -ENXIO;
1228 goto stop_clk;
1229 }
1230
1231 sinfo->irq_base = platform_get_irq(pdev, 0);
1232 if (sinfo->irq_base < 0) {
1233 dev_err(dev, "unable to get irq\n");
1234 ret = sinfo->irq_base;
1235 goto stop_clk;
1236 }
1237
1238
1239 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1240 if (map) {
1241
1242 info->fix.smem_start = map->start;
1243 info->fix.smem_len = resource_size(map);
1244 if (!request_mem_region(info->fix.smem_start,
1245 info->fix.smem_len, pdev->name)) {
1246 ret = -EBUSY;
1247 goto stop_clk;
1248 }
1249
1250 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
1251 if (!info->screen_base) {
1252 ret = -ENOMEM;
1253 goto release_intmem;
1254 }
1255
1256
1257
1258
1259
1260 } else {
1261
1262 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1263 if (ret < 0) {
1264 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1265 goto stop_clk;
1266 }
1267 }
1268
1269
1270 info->fix.mmio_start = regs->start;
1271 info->fix.mmio_len = resource_size(regs);
1272
1273 if (!request_mem_region(info->fix.mmio_start,
1274 info->fix.mmio_len, pdev->name)) {
1275 ret = -EBUSY;
1276 goto free_fb;
1277 }
1278
1279 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1280 if (!sinfo->mmio) {
1281 dev_err(dev, "cannot map LCDC registers\n");
1282 ret = -ENOMEM;
1283 goto release_mem;
1284 }
1285
1286
1287 init_contrast(sinfo);
1288
1289
1290 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1291 if (ret) {
1292 dev_err(dev, "request_irq failed: %d\n", ret);
1293 goto unmap_mmio;
1294 }
1295
1296
1297
1298 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1299
1300 ret = atmel_lcdfb_init_fbinfo(sinfo);
1301 if (ret < 0) {
1302 dev_err(dev, "init fbinfo failed: %d\n", ret);
1303 goto unregister_irqs;
1304 }
1305
1306 ret = atmel_lcdfb_set_par(info);
1307 if (ret < 0) {
1308 dev_err(dev, "set par failed: %d\n", ret);
1309 goto unregister_irqs;
1310 }
1311
1312 dev_set_drvdata(dev, info);
1313
1314
1315
1316
1317 ret = register_framebuffer(info);
1318 if (ret < 0) {
1319 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1320 goto reset_drvdata;
1321 }
1322
1323
1324 atmel_lcdfb_power_control(sinfo, 1);
1325
1326 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1327 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1328
1329 return 0;
1330
1331reset_drvdata:
1332 dev_set_drvdata(dev, NULL);
1333 fb_dealloc_cmap(&info->cmap);
1334unregister_irqs:
1335 cancel_work_sync(&sinfo->task);
1336 free_irq(sinfo->irq_base, info);
1337unmap_mmio:
1338 exit_backlight(sinfo);
1339 iounmap(sinfo->mmio);
1340release_mem:
1341 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1342free_fb:
1343 if (map)
1344 iounmap(info->screen_base);
1345 else
1346 atmel_lcdfb_free_video_memory(sinfo);
1347
1348release_intmem:
1349 if (map)
1350 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1351stop_clk:
1352 atmel_lcdfb_stop_clock(sinfo);
1353 clk_put(sinfo->lcdc_clk);
1354put_bus_clk:
1355 clk_put(sinfo->bus_clk);
1356free_info:
1357 framebuffer_release(info);
1358out:
1359 dev_dbg(dev, "%s FAILED\n", __func__);
1360 return ret;
1361}
1362
1363static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1364{
1365 struct device *dev = &pdev->dev;
1366 struct fb_info *info = dev_get_drvdata(dev);
1367 struct atmel_lcdfb_info *sinfo;
1368 struct atmel_lcdfb_pdata *pdata;
1369
1370 if (!info || !info->par)
1371 return 0;
1372 sinfo = info->par;
1373 pdata = &sinfo->pdata;
1374
1375 cancel_work_sync(&sinfo->task);
1376 exit_backlight(sinfo);
1377 atmel_lcdfb_power_control(sinfo, 0);
1378 unregister_framebuffer(info);
1379 atmel_lcdfb_stop_clock(sinfo);
1380 clk_put(sinfo->lcdc_clk);
1381 clk_put(sinfo->bus_clk);
1382 fb_dealloc_cmap(&info->cmap);
1383 free_irq(sinfo->irq_base, info);
1384 iounmap(sinfo->mmio);
1385 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1386 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1387 iounmap(info->screen_base);
1388 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1389 } else {
1390 atmel_lcdfb_free_video_memory(sinfo);
1391 }
1392
1393 framebuffer_release(info);
1394
1395 return 0;
1396}
1397
1398#ifdef CONFIG_PM
1399
1400static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1401{
1402 struct fb_info *info = platform_get_drvdata(pdev);
1403 struct atmel_lcdfb_info *sinfo = info->par;
1404
1405
1406
1407
1408
1409 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1410
1411 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1412 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1413 atmel_lcdfb_power_control(sinfo, 0);
1414 atmel_lcdfb_stop(sinfo);
1415 atmel_lcdfb_stop_clock(sinfo);
1416
1417 return 0;
1418}
1419
1420static int atmel_lcdfb_resume(struct platform_device *pdev)
1421{
1422 struct fb_info *info = platform_get_drvdata(pdev);
1423 struct atmel_lcdfb_info *sinfo = info->par;
1424
1425 atmel_lcdfb_start_clock(sinfo);
1426 atmel_lcdfb_start(sinfo);
1427 atmel_lcdfb_power_control(sinfo, 1);
1428 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1429
1430
1431 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1432 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1433
1434 return 0;
1435}
1436
1437#else
1438#define atmel_lcdfb_suspend NULL
1439#define atmel_lcdfb_resume NULL
1440#endif
1441
1442static struct platform_driver atmel_lcdfb_driver = {
1443 .remove = __exit_p(atmel_lcdfb_remove),
1444 .suspend = atmel_lcdfb_suspend,
1445 .resume = atmel_lcdfb_resume,
1446 .id_table = atmel_lcdfb_devtypes,
1447 .driver = {
1448 .name = "atmel_lcdfb",
1449 .owner = THIS_MODULE,
1450 .of_match_table = of_match_ptr(atmel_lcdfb_dt_ids),
1451 },
1452};
1453
1454module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1455
1456MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1457MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1458MODULE_LICENSE("GPL");
1459