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24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/platform_device.h>
27#include <linux/mtd/physmap.h>
28#include <linux/i2c.h>
29#include <linux/platform_data/pca953x.h>
30#include <linux/input.h>
31#include <linux/gpio.h>
32#include <linux/delay.h>
33#include <linux/dma-mapping.h>
34#include <linux/leds.h>
35#include <linux/platform_data/asoc-mx27vis.h>
36#include <media/soc_camera.h>
37#include <sound/tlv320aic32x4.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
41#include <asm/system_info.h>
42#include <asm/memblock.h>
43
44#include "common.h"
45#include "devices-imx27.h"
46#include "ehci.h"
47#include "hardware.h"
48#include "iomux-mx27.h"
49
50#define TVP5150_RSTN (GPIO_PORTC + 18)
51#define TVP5150_PWDN (GPIO_PORTC + 19)
52#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
53#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
54
55#define VERSION_MASK 0x7
56#define MOTHERBOARD_SHIFT 4
57#define EXPBOARD_SHIFT 0
58
59#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
60#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
61#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
62
63#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
64#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
65#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
66
67#define AMP_GAIN_0 (GPIO_PORTF + 9)
68#define AMP_GAIN_1 (GPIO_PORTF + 8)
69#define AMP_MUTE_SDL (GPIO_PORTE + 5)
70#define AMP_MUTE_SDR (GPIO_PORTF + 7)
71
72static const int visstrim_m10_pins[] __initconst = {
73
74 PE12_PF_UART1_TXD,
75 PE13_PF_UART1_RXD,
76 PE14_PF_UART1_CTS,
77 PE15_PF_UART1_RTS,
78
79 PD0_AIN_FEC_TXD0,
80 PD1_AIN_FEC_TXD1,
81 PD2_AIN_FEC_TXD2,
82 PD3_AIN_FEC_TXD3,
83 PD4_AOUT_FEC_RX_ER,
84 PD5_AOUT_FEC_RXD1,
85 PD6_AOUT_FEC_RXD2,
86 PD7_AOUT_FEC_RXD3,
87 PD8_AF_FEC_MDIO,
88 PD9_AIN_FEC_MDC,
89 PD10_AOUT_FEC_CRS,
90 PD11_AOUT_FEC_TX_CLK,
91 PD12_AOUT_FEC_RXD0,
92 PD13_AOUT_FEC_RX_DV,
93 PD14_AOUT_FEC_RX_CLK,
94 PD15_AOUT_FEC_COL,
95 PD16_AIN_FEC_TX_ER,
96 PF23_AIN_FEC_TX_EN,
97
98 PC20_PF_SSI1_FS,
99 PC21_PF_SSI1_RXD,
100 PC22_PF_SSI1_TXD,
101 PC23_PF_SSI1_CLK,
102
103 PE18_PF_SD1_D0,
104 PE19_PF_SD1_D1,
105 PE20_PF_SD1_D2,
106 PE21_PF_SD1_D3,
107 PE22_PF_SD1_CMD,
108 PE23_PF_SD1_CLK,
109
110 PD17_PF_I2C_DATA,
111 PD18_PF_I2C_CLK,
112 PC5_PF_I2C2_SDA,
113 PC6_PF_I2C2_SCL,
114
115 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
116 PC9_PF_USBOTG_DATA0,
117 PC11_PF_USBOTG_DATA1,
118 PC10_PF_USBOTG_DATA2,
119 PC13_PF_USBOTG_DATA3,
120 PC12_PF_USBOTG_DATA4,
121 PC7_PF_USBOTG_DATA5,
122 PC8_PF_USBOTG_DATA6,
123 PE25_PF_USBOTG_DATA7,
124 PE24_PF_USBOTG_CLK,
125 PE2_PF_USBOTG_DIR,
126 PE0_PF_USBOTG_NXT,
127 PE1_PF_USBOTG_STP,
128 PB23_PF_USB_PWR,
129 PB24_PF_USB_OC,
130
131 TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
132 TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
133 PB10_PF_CSI_D0,
134 PB11_PF_CSI_D1,
135 PB12_PF_CSI_D2,
136 PB13_PF_CSI_D3,
137 PB14_PF_CSI_D4,
138 PB15_PF_CSI_MCLK,
139 PB16_PF_CSI_PIXCLK,
140 PB17_PF_CSI_D5,
141 PB18_PF_CSI_D6,
142 PB19_PF_CSI_D7,
143 PB20_PF_CSI_VSYNC,
144 PB21_PF_CSI_HSYNC,
145
146 MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
147 MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
148 MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
149
150 EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
151 EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
152 EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
153
154 AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
155 AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
156 AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
157 AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
158};
159
160static struct gpio visstrim_m10_version_gpios[] = {
161 { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
162 { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
163 { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
164 { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
165 { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
166 { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
167};
168
169static const struct gpio visstrim_m10_gpios[] __initconst = {
170 {
171 .gpio = TVP5150_RSTN,
172 .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
173 .label = "tvp5150_rstn",
174 },
175 {
176 .gpio = TVP5150_PWDN,
177 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
178 .label = "tvp5150_pwdn",
179 },
180 {
181 .gpio = OTG_PHY_CS_GPIO,
182 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
183 .label = "usbotg_cs",
184 },
185 {
186 .gpio = AMP_GAIN_0,
187 .flags = GPIOF_DIR_OUT,
188 .label = "amp-gain-0",
189 },
190 {
191 .gpio = AMP_GAIN_1,
192 .flags = GPIOF_DIR_OUT,
193 .label = "amp-gain-1",
194 },
195 {
196 .gpio = AMP_MUTE_SDL,
197 .flags = GPIOF_DIR_OUT,
198 .label = "amp-mute-sdl",
199 },
200 {
201 .gpio = AMP_MUTE_SDR,
202 .flags = GPIOF_DIR_OUT,
203 .label = "amp-mute-sdr",
204 },
205};
206
207
208static int visstrim_camera_power(struct device *dev, int on)
209{
210 gpio_set_value(TVP5150_PWDN, on);
211
212 return 0;
213};
214
215static int visstrim_camera_reset(struct device *dev)
216{
217 gpio_set_value(TVP5150_RSTN, 0);
218 ndelay(500);
219 gpio_set_value(TVP5150_RSTN, 1);
220
221 return 0;
222};
223
224static struct i2c_board_info visstrim_i2c_camera = {
225 I2C_BOARD_INFO("tvp5150", 0x5d),
226};
227
228static struct soc_camera_link iclink_tvp5150 = {
229 .bus_id = 0,
230 .board_info = &visstrim_i2c_camera,
231 .i2c_adapter_id = 0,
232 .power = visstrim_camera_power,
233 .reset = visstrim_camera_reset,
234};
235
236static struct mx2_camera_platform_data visstrim_camera = {
237 .flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
238 MX2_CAMERA_PCLK_SAMPLE_RISING,
239 .clk = 100000,
240};
241
242static phys_addr_t mx2_camera_base __initdata;
243#define MX2_CAMERA_BUF_SIZE SZ_8M
244
245static void __init visstrim_analog_camera_init(void)
246{
247 struct platform_device *pdev;
248 int dma;
249
250 gpio_set_value(TVP5150_PWDN, 1);
251 ndelay(1);
252 gpio_set_value(TVP5150_RSTN, 0);
253 ndelay(500);
254 gpio_set_value(TVP5150_RSTN, 1);
255 ndelay(200000);
256
257 pdev = imx27_add_mx2_camera(&visstrim_camera);
258 if (IS_ERR(pdev))
259 return;
260
261 dma = dma_declare_coherent_memory(&pdev->dev,
262 mx2_camera_base, mx2_camera_base,
263 MX2_CAMERA_BUF_SIZE,
264 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
265 if (!(dma & DMA_MEMORY_MAP))
266 return;
267}
268
269static void __init visstrim_reserve(void)
270{
271
272 mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
273 MX2_CAMERA_BUF_SIZE);
274}
275
276
277static struct gpio_keys_button visstrim_gpio_keys[] = {
278 {
279 .type = EV_KEY,
280 .code = KEY_RESTART,
281 .gpio = (GPIO_PORTC + 15),
282 .desc = "Default config",
283 .active_low = 0,
284 .wakeup = 1,
285 },
286 {
287 .type = EV_KEY,
288 .code = KEY_RECORD,
289 .gpio = (GPIO_PORTF + 14),
290 .desc = "Record",
291 .active_low = 0,
292 .wakeup = 1,
293 },
294 {
295 .type = EV_KEY,
296 .code = KEY_STOP,
297 .gpio = (GPIO_PORTF + 13),
298 .desc = "Stop",
299 .active_low = 0,
300 .wakeup = 1,
301 }
302};
303
304static const struct gpio_keys_platform_data
305 visstrim_gpio_keys_platform_data __initconst = {
306 .buttons = visstrim_gpio_keys,
307 .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
308};
309
310
311static const struct gpio_led visstrim_m10_leds[] __initconst = {
312 {
313 .name = "visstrim:ld0",
314 .default_trigger = "nand-disk",
315 .gpio = (GPIO_PORTC + 29),
316 },
317 {
318 .name = "visstrim:ld1",
319 .default_trigger = "nand-disk",
320 .gpio = (GPIO_PORTC + 24),
321 },
322 {
323 .name = "visstrim:ld2",
324 .default_trigger = "nand-disk",
325 .gpio = (GPIO_PORTC + 28),
326 },
327 {
328 .name = "visstrim:ld3",
329 .default_trigger = "nand-disk",
330 .gpio = (GPIO_PORTC + 25),
331 },
332};
333
334static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
335 .leds = visstrim_m10_leds,
336 .num_leds = ARRAY_SIZE(visstrim_m10_leds),
337};
338
339
340static int visstrim_m10_sdhc1_init(struct device *dev,
341 irq_handler_t detect_irq, void *data)
342{
343 int ret;
344
345 ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
346 IRQF_TRIGGER_FALLING, "mmc-detect", data);
347 return ret;
348}
349
350static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
351{
352 free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
353}
354
355static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
356 .init = visstrim_m10_sdhc1_init,
357 .exit = visstrim_m10_sdhc1_exit,
358};
359
360
361static struct physmap_flash_data visstrim_m10_flash_data = {
362 .width = 2,
363};
364
365static struct resource visstrim_m10_flash_resource = {
366 .start = 0xc0000000,
367 .end = 0xc0000000 + SZ_64M - 1,
368 .flags = IORESOURCE_MEM,
369};
370
371static struct platform_device visstrim_m10_nor_mtd_device = {
372 .name = "physmap-flash",
373 .id = 0,
374 .dev = {
375 .platform_data = &visstrim_m10_flash_data,
376 },
377 .num_resources = 1,
378 .resource = &visstrim_m10_flash_resource,
379};
380
381static struct platform_device *platform_devices[] __initdata = {
382 &visstrim_m10_nor_mtd_device,
383};
384
385
386static const struct imxuart_platform_data uart_pdata __initconst = {
387 .flags = IMXUART_HAVE_RTSCTS,
388};
389
390
391static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
392 .bitrate = 100000,
393};
394
395static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
396 .gpio_base = 240,
397 .invert = 0,
398};
399
400static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
401 .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
402 AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
403 AIC32X4_PWR_AIC32X4_LDO_ENABLE |
404 AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
405 AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
406 .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
407 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
408 .swapdacs = false,
409};
410
411static struct i2c_board_info visstrim_m10_i2c_devices[] = {
412 {
413 I2C_BOARD_INFO("pca9555", 0x20),
414 .platform_data = &visstrim_m10_pca9555_pdata,
415 },
416 {
417 I2C_BOARD_INFO("tlv320aic32x4", 0x18),
418 .platform_data = &visstrim_m10_aic32x4_pdata,
419 },
420 {
421 I2C_BOARD_INFO("m41t00", 0x68),
422 }
423};
424
425
426static int otg_phy_init(struct platform_device *pdev)
427{
428 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
429}
430
431static const struct mxc_usbh_platform_data
432visstrim_m10_usbotg_pdata __initconst = {
433 .init = otg_phy_init,
434 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
435};
436
437
438static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
439 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
440};
441
442
443
444static void __init visstrim_coda_init(void)
445{
446 struct platform_device *pdev;
447 int dma;
448
449 pdev = imx27_add_coda();
450 dma = dma_declare_coherent_memory(&pdev->dev,
451 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
452 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
453 MX2_CAMERA_BUF_SIZE,
454 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
455 if (!(dma & DMA_MEMORY_MAP))
456 return;
457}
458
459
460static struct platform_device visstrim_deinterlace = {
461 .name = "m2m-deinterlace",
462 .id = 0,
463};
464
465static void __init visstrim_deinterlace_init(void)
466{
467 int ret = -ENOMEM;
468 struct platform_device *pdev = &visstrim_deinterlace;
469 int dma;
470
471 ret = platform_device_register(pdev);
472
473 dma = dma_declare_coherent_memory(&pdev->dev,
474 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
475 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
476 MX2_CAMERA_BUF_SIZE,
477 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
478 if (!(dma & DMA_MEMORY_MAP))
479 return;
480}
481
482
483static void __init visstrim_emmaprp_init(void)
484{
485 struct platform_device *pdev;
486 int dma;
487
488 pdev = imx27_add_mx2_emmaprp();
489 if (IS_ERR(pdev))
490 return;
491
492
493
494
495
496 dma = dma_declare_coherent_memory(&pdev->dev,
497 mx2_camera_base, mx2_camera_base,
498 MX2_CAMERA_BUF_SIZE,
499 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
500 if (!(dma & DMA_MEMORY_MAP))
501 pr_err("Failed to declare memory for emmaprp\n");
502}
503
504
505static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
506 .amp_gain0_gpio = AMP_GAIN_0,
507 .amp_gain1_gpio = AMP_GAIN_1,
508 .amp_mutel_gpio = AMP_MUTE_SDL,
509 .amp_muter_gpio = AMP_MUTE_SDR,
510};
511
512static void __init visstrim_m10_revision(void)
513{
514 int exp_version = 0;
515 int mo_version = 0;
516 int ret;
517
518 ret = gpio_request_array(visstrim_m10_version_gpios,
519 ARRAY_SIZE(visstrim_m10_version_gpios));
520 if (ret) {
521 pr_err("Failed to request version gpios");
522 return;
523 }
524
525
526 exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
527 exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
528 exp_version |= !gpio_get_value(EXPBOARD_BIT0);
529
530
531 mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
532 mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
533 mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
534
535 system_rev = 0x27000;
536 system_rev |= (mo_version << MOTHERBOARD_SHIFT);
537 system_rev |= (exp_version << EXPBOARD_SHIFT);
538}
539
540static void __init visstrim_m10_board_init(void)
541{
542 int ret;
543 int mo_version;
544
545 imx27_soc_init();
546 visstrim_m10_revision();
547
548 ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
549 ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
550 if (ret)
551 pr_err("Failed to setup pins (%d)\n", ret);
552
553 ret = gpio_request_array(visstrim_m10_gpios,
554 ARRAY_SIZE(visstrim_m10_gpios));
555 if (ret)
556 pr_err("Failed to request gpios (%d)\n", ret);
557
558 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
559 imx27_add_imx_uart0(&uart_pdata);
560
561 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
562 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
563 i2c_register_board_info(0, visstrim_m10_i2c_devices,
564 ARRAY_SIZE(visstrim_m10_i2c_devices));
565
566 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
567 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
568 imx27_add_fec(NULL);
569 imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
570 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
571 imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
572 sizeof(snd_mx27vis_pdata));
573 platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
574 &iclink_tvp5150, sizeof(iclink_tvp5150));
575 gpio_led_register_device(0, &visstrim_m10_led_data);
576
577
578 mo_version = (system_rev >> MOTHERBOARD_SHIFT) & VERSION_MASK;
579 if (mo_version & 0x1) {
580 visstrim_emmaprp_init();
581
582
583
584
585
586
587 gpio_set_value(TVP5150_PWDN, 1);
588 ndelay(1);
589 gpio_set_value(TVP5150_RSTN, 0);
590 } else {
591 visstrim_deinterlace_init();
592 visstrim_analog_camera_init();
593 }
594 visstrim_coda_init();
595}
596
597static void __init visstrim_m10_timer_init(void)
598{
599 mx27_clocks_init((unsigned long)25000000);
600}
601
602MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
603 .atag_offset = 0x100,
604 .reserve = visstrim_reserve,
605 .map_io = mx27_map_io,
606 .init_early = imx27_init_early,
607 .init_irq = mx27_init_irq,
608 .init_time = visstrim_m10_timer_init,
609 .init_machine = visstrim_m10_board_init,
610 .restart = mxc_restart,
611MACHINE_END
612
