LXR linux/arch/blackfin/include/asm/barrier.h

   1/*
   2 * Copyright 2004-2009 Analog Devices Inc.
   3 *               Tony Kou (tonyko@lineo.ca)
   4 *
   5 * Licensed under the GPL-2 or later
   6 */
   7
   8#ifndef _BLACKFIN_BARRIER_H
   9#define _BLACKFIN_BARRIER_H
  10
  11#include <asm/cache.h>
  12
  13#define nop()  __asm__ __volatile__ ("nop;\n\t" : : )
  14
  15/*
  16 * Force strict CPU ordering.
  17 */
  18#ifdef CONFIG_SMP
  19
  20#ifdef __ARCH_SYNC_CORE_DCACHE
  21/* Force Core data cache coherence */
  22# define mb()   do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
  23# define rmb()  do { barrier(); smp_check_barrier(); } while (0)
  24# define wmb()  do { barrier(); smp_mark_barrier(); } while (0)
  25# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
  26#endif
  27
  28#endif /* !CONFIG_SMP */
  29
  30#define smp_mb__before_atomic() barrier()
  31#define smp_mb__after_atomic()  barrier()
  32
  33#include <asm-generic/barrier.h>
  34
  35#endif /* _BLACKFIN_BARRIER_H */
  36