linux/arch/sparc/kernel/pci.c
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   1/* pci.c: UltraSparc PCI controller support.
   2 *
   3 * Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
   4 * Copyright (C) 1998, 1999 Eddie C. Dost   (ecd@skynet.be)
   5 * Copyright (C) 1999 Jakub Jelinek   (jj@ultra.linux.cz)
   6 *
   7 * OF tree based PCI bus probing taken from the PowerPC port
   8 * with minor modifications, see there for credits.
   9 */
  10
  11#include <linux/export.h>
  12#include <linux/kernel.h>
  13#include <linux/string.h>
  14#include <linux/sched.h>
  15#include <linux/capability.h>
  16#include <linux/errno.h>
  17#include <linux/pci.h>
  18#include <linux/msi.h>
  19#include <linux/irq.h>
  20#include <linux/init.h>
  21#include <linux/of.h>
  22#include <linux/of_device.h>
  23
  24#include <asm/uaccess.h>
  25#include <asm/pgtable.h>
  26#include <asm/irq.h>
  27#include <asm/prom.h>
  28#include <asm/apb.h>
  29
  30#include "pci_impl.h"
  31#include "kernel.h"
  32
  33/* List of all PCI controllers found in the system. */
  34struct pci_pbm_info *pci_pbm_root = NULL;
  35
  36/* Each PBM found gets a unique index. */
  37int pci_num_pbms = 0;
  38
  39volatile int pci_poke_in_progress;
  40volatile int pci_poke_cpu = -1;
  41volatile int pci_poke_faulted;
  42
  43static DEFINE_SPINLOCK(pci_poke_lock);
  44
  45void pci_config_read8(u8 *addr, u8 *ret)
  46{
  47        unsigned long flags;
  48        u8 byte;
  49
  50        spin_lock_irqsave(&pci_poke_lock, flags);
  51        pci_poke_cpu = smp_processor_id();
  52        pci_poke_in_progress = 1;
  53        pci_poke_faulted = 0;
  54        __asm__ __volatile__("membar #Sync\n\t"
  55                             "lduba [%1] %2, %0\n\t"
  56                             "membar #Sync"
  57                             : "=r" (byte)
  58                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
  59                             : "memory");
  60        pci_poke_in_progress = 0;
  61        pci_poke_cpu = -1;
  62        if (!pci_poke_faulted)
  63                *ret = byte;
  64        spin_unlock_irqrestore(&pci_poke_lock, flags);
  65}
  66
  67void pci_config_read16(u16 *addr, u16 *ret)
  68{
  69        unsigned long flags;
  70        u16 word;
  71
  72        spin_lock_irqsave(&pci_poke_lock, flags);
  73        pci_poke_cpu = smp_processor_id();
  74        pci_poke_in_progress = 1;
  75        pci_poke_faulted = 0;
  76        __asm__ __volatile__("membar #Sync\n\t"
  77                             "lduha [%1] %2, %0\n\t"
  78                             "membar #Sync"
  79                             : "=r" (word)
  80                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
  81                             : "memory");
  82        pci_poke_in_progress = 0;
  83        pci_poke_cpu = -1;
  84        if (!pci_poke_faulted)
  85                *ret = word;
  86        spin_unlock_irqrestore(&pci_poke_lock, flags);
  87}
  88
  89void pci_config_read32(u32 *addr, u32 *ret)
  90{
  91        unsigned long flags;
  92        u32 dword;
  93
  94        spin_lock_irqsave(&pci_poke_lock, flags);
  95        pci_poke_cpu = smp_processor_id();
  96        pci_poke_in_progress = 1;
  97        pci_poke_faulted = 0;
  98        __asm__ __volatile__("membar #Sync\n\t"
  99                             "lduwa [%1] %2, %0\n\t"
 100                             "membar #Sync"
 101                             : "=r" (dword)
 102                             : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 103                             : "memory");
 104        pci_poke_in_progress = 0;
 105        pci_poke_cpu = -1;
 106        if (!pci_poke_faulted)
 107                *ret = dword;
 108        spin_unlock_irqrestore(&pci_poke_lock, flags);
 109}
 110
 111void pci_config_write8(u8 *addr, u8 val)
 112{
 113        unsigned long flags;
 114
 115        spin_lock_irqsave(&pci_poke_lock, flags);
 116        pci_poke_cpu = smp_processor_id();
 117        pci_poke_in_progress = 1;
 118        pci_poke_faulted = 0;
 119        __asm__ __volatile__("membar #Sync\n\t"
 120                             "stba %0, [%1] %2\n\t"
 121                             "membar #Sync"
 122                             : /* no outputs */
 123                             : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 124                             : "memory");
 125        pci_poke_in_progress = 0;
 126        pci_poke_cpu = -1;
 127        spin_unlock_irqrestore(&pci_poke_lock, flags);
 128}
 129
 130void pci_config_write16(u16 *addr, u16 val)
 131{
 132        unsigned long flags;
 133
 134        spin_lock_irqsave(&pci_poke_lock, flags);
 135        pci_poke_cpu = smp_processor_id();
 136        pci_poke_in_progress = 1;
 137        pci_poke_faulted = 0;
 138        __asm__ __volatile__("membar #Sync\n\t"
 139                             "stha %0, [%1] %2\n\t"
 140                             "membar #Sync"
 141                             : /* no outputs */
 142                             : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 143                             : "memory");
 144        pci_poke_in_progress = 0;
 145        pci_poke_cpu = -1;
 146        spin_unlock_irqrestore(&pci_poke_lock, flags);
 147}
 148
 149void pci_config_write32(u32 *addr, u32 val)
 150{
 151        unsigned long flags;
 152
 153        spin_lock_irqsave(&pci_poke_lock, flags);
 154        pci_poke_cpu = smp_processor_id();
 155        pci_poke_in_progress = 1;
 156        pci_poke_faulted = 0;
 157        __asm__ __volatile__("membar #Sync\n\t"
 158                             "stwa %0, [%1] %2\n\t"
 159                             "membar #Sync"
 160                             : /* no outputs */
 161                             : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
 162                             : "memory");
 163        pci_poke_in_progress = 0;
 164        pci_poke_cpu = -1;
 165        spin_unlock_irqrestore(&pci_poke_lock, flags);
 166}
 167
 168static int ofpci_verbose;
 169
 170static int __init ofpci_debug(char *str)
 171{
 172        int val = 0;
 173
 174        get_option(&str, &val);
 175        if (val)
 176                ofpci_verbose = 1;
 177        return 1;
 178}
 179
 180__setup("ofpci_debug=", ofpci_debug);
 181
 182static unsigned long pci_parse_of_flags(u32 addr0)
 183{
 184        unsigned long flags = 0;
 185
 186        if (addr0 & 0x02000000) {
 187                flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
 188                flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
 189                flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
 190                if (addr0 & 0x40000000)
 191                        flags |= IORESOURCE_PREFETCH
 192                                 | PCI_BASE_ADDRESS_MEM_PREFETCH;
 193        } else if (addr0 & 0x01000000)
 194                flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
 195        return flags;
 196}
 197
 198/* The of_device layer has translated all of the assigned-address properties
 199 * into physical address resources, we only have to figure out the register
 200 * mapping.
 201 */
 202static void pci_parse_of_addrs(struct platform_device *op,
 203                               struct device_node *node,
 204                               struct pci_dev *dev)
 205{
 206        struct resource *op_res;
 207        const u32 *addrs;
 208        int proplen;
 209
 210        addrs = of_get_property(node, "assigned-addresses", &proplen);
 211        if (!addrs)
 212                return;
 213        if (ofpci_verbose)
 214                printk("    parse addresses (%d bytes) @ %p\n",
 215                       proplen, addrs);
 216        op_res = &op->resource[0];
 217        for (; proplen >= 20; proplen -= 20, addrs += 5, op_res++) {
 218                struct resource *res;
 219                unsigned long flags;
 220                int i;
 221
 222                flags = pci_parse_of_flags(addrs[0]);
 223                if (!flags)
 224                        continue;
 225                i = addrs[0] & 0xff;
 226                if (ofpci_verbose)
 227                        printk("  start: %llx, end: %llx, i: %x\n",
 228                               op_res->start, op_res->end, i);
 229
 230                if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
 231                        res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
 232                } else if (i == dev->rom_base_reg) {
 233                        res = &dev->resource[PCI_ROM_RESOURCE];
 234                        flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE
 235                              | IORESOURCE_SIZEALIGN;
 236                } else {
 237                        printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
 238                        continue;
 239                }
 240                res->start = op_res->start;
 241                res->end = op_res->end;
 242                res->flags = flags;
 243                res->name = pci_name(dev);
 244        }
 245}
 246
 247static struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
 248                                         struct device_node *node,
 249                                         struct pci_bus *bus, int devfn)
 250{
 251        struct dev_archdata *sd;
 252        struct pci_slot *slot;
 253        struct platform_device *op;
 254        struct pci_dev *dev;
 255        const char *type;
 256        u32 class;
 257
 258        dev = pci_alloc_dev(bus);
 259        if (!dev)
 260                return NULL;
 261
 262        sd = &dev->dev.archdata;
 263        sd->iommu = pbm->iommu;
 264        sd->stc = &pbm->stc;
 265        sd->host_controller = pbm;
 266        sd->op = op = of_find_device_by_node(node);
 267        sd->numa_node = pbm->numa_node;
 268
 269        sd = &op->dev.archdata;
 270        sd->iommu = pbm->iommu;
 271        sd->stc = &pbm->stc;
 272        sd->numa_node = pbm->numa_node;
 273
 274        if (!strcmp(node->name, "ebus"))
 275                of_propagate_archdata(op);
 276
 277        type = of_get_property(node, "device_type", NULL);
 278        if (type == NULL)
 279                type = "";
 280
 281        if (ofpci_verbose)
 282                printk("    create device, devfn: %x, type: %s\n",
 283                       devfn, type);
 284
 285        dev->sysdata = node;
 286        dev->dev.parent = bus->bridge;
 287        dev->dev.bus = &pci_bus_type;
 288        dev->dev.of_node = of_node_get(node);
 289        dev->devfn = devfn;
 290        dev->multifunction = 0;         /* maybe a lie? */
 291        set_pcie_port_type(dev);
 292
 293        list_for_each_entry(slot, &dev->bus->slots, list)
 294                if (PCI_SLOT(dev->devfn) == slot->number)
 295                        dev->slot = slot;
 296
 297        dev->vendor = of_getintprop_default(node, "vendor-id", 0xffff);
 298        dev->device = of_getintprop_default(node, "device-id", 0xffff);
 299        dev->subsystem_vendor =
 300                of_getintprop_default(node, "subsystem-vendor-id", 0);
 301        dev->subsystem_device =
 302                of_getintprop_default(node, "subsystem-id", 0);
 303
 304        dev->cfg_size = pci_cfg_space_size(dev);
 305
 306        /* We can't actually use the firmware value, we have
 307         * to read what is in the register right now.  One
 308         * reason is that in the case of IDE interfaces the
 309         * firmware can sample the value before the the IDE
 310         * interface is programmed into native mode.
 311         */
 312        pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
 313        dev->class = class >> 8;
 314        dev->revision = class & 0xff;
 315
 316        dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
 317                dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
 318
 319        if (ofpci_verbose)
 320                printk("    class: 0x%x device name: %s\n",
 321                       dev->class, pci_name(dev));
 322
 323        /* I have seen IDE devices which will not respond to
 324         * the bmdma simplex check reads if bus mastering is
 325         * disabled.
 326         */
 327        if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
 328                pci_set_master(dev);
 329
 330        dev->current_state = PCI_UNKNOWN;       /* unknown power state */
 331        dev->error_state = pci_channel_io_normal;
 332        dev->dma_mask = 0xffffffff;
 333
 334        if (!strcmp(node->name, "pci")) {
 335                /* a PCI-PCI bridge */
 336                dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
 337                dev->rom_base_reg = PCI_ROM_ADDRESS1;
 338        } else if (!strcmp(type, "cardbus")) {
 339                dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
 340        } else {
 341                dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
 342                dev->rom_base_reg = PCI_ROM_ADDRESS;
 343
 344                dev->irq = sd->op->archdata.irqs[0];
 345                if (dev->irq == 0xffffffff)
 346                        dev->irq = PCI_IRQ_NONE;
 347        }
 348
 349        pci_parse_of_addrs(sd->op, node, dev);
 350
 351        if (ofpci_verbose)
 352                printk("    adding to system ...\n");
 353
 354        pci_device_add(dev, bus);
 355
 356        return dev;
 357}
 358
 359static void apb_calc_first_last(u8 map, u32 *first_p, u32 *last_p)
 360{
 361        u32 idx, first, last;
 362
 363        first = 8;
 364        last = 0;
 365        for (idx = 0; idx < 8; idx++) {
 366                if ((map & (1 << idx)) != 0) {
 367                        if (first > idx)
 368                                first = idx;
 369                        if (last < idx)
 370                                last = idx;
 371                }
 372        }
 373
 374        *first_p = first;
 375        *last_p = last;
 376}
 377
 378/* Cook up fake bus resources for SUNW,simba PCI bridges which lack
 379 * a proper 'ranges' property.
 380 */
 381static void apb_fake_ranges(struct pci_dev *dev,
 382                            struct pci_bus *bus,
 383                            struct pci_pbm_info *pbm)
 384{
 385        struct pci_bus_region region;
 386        struct resource *res;
 387        u32 first, last;
 388        u8 map;
 389
 390        pci_read_config_byte(dev, APB_IO_ADDRESS_MAP, &map);
 391        apb_calc_first_last(map, &first, &last);
 392        res = bus->resource[0];
 393        res->flags = IORESOURCE_IO;
 394        region.start = (first << 21);
 395        region.end = (last << 21) + ((1 << 21) - 1);
 396        pcibios_bus_to_resource(dev->bus, res, &region);
 397
 398        pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
 399        apb_calc_first_last(map, &first, &last);
 400        res = bus->resource[1];
 401        res->flags = IORESOURCE_MEM;
 402        region.start = (first << 29);
 403        region.end = (last << 29) + ((1 << 29) - 1);
 404        pcibios_bus_to_resource(dev->bus, res, &region);
 405}
 406
 407static void pci_of_scan_bus(struct pci_pbm_info *pbm,
 408                            struct device_node *node,
 409                            struct pci_bus *bus);
 410
 411#define GET_64BIT(prop, i)      ((((u64) (prop)[(i)]) << 32) | (prop)[(i)+1])
 412
 413static void of_scan_pci_bridge(struct pci_pbm_info *pbm,
 414                               struct device_node *node,
 415                               struct pci_dev *dev)
 416{
 417        struct pci_bus *bus;
 418        const u32 *busrange, *ranges;
 419        int len, i, simba;
 420        struct pci_bus_region region;
 421        struct resource *res;
 422        unsigned int flags;
 423        u64 size;
 424
 425        if (ofpci_verbose)
 426                printk("of_scan_pci_bridge(%s)\n", node->full_name);
 427
 428        /* parse bus-range property */
 429        busrange = of_get_property(node, "bus-range", &len);
 430        if (busrange == NULL || len != 8) {
 431                printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
 432                       node->full_name);
 433                return;
 434        }
 435
 436        if (ofpci_verbose)
 437                printk("    Bridge bus range [%u --> %u]\n",
 438                       busrange[0], busrange[1]);
 439
 440        ranges = of_get_property(node, "ranges", &len);
 441        simba = 0;
 442        if (ranges == NULL) {
 443                const char *model = of_get_property(node, "model", NULL);
 444                if (model && !strcmp(model, "SUNW,simba"))
 445                        simba = 1;
 446        }
 447
 448        bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
 449        if (!bus) {
 450                printk(KERN_ERR "Failed to create pci bus for %s\n",
 451                       node->full_name);
 452                return;
 453        }
 454
 455        bus->primary = dev->bus->number;
 456        pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
 457        bus->bridge_ctl = 0;
 458
 459        if (ofpci_verbose)
 460                printk("    Bridge ranges[%p] simba[%d]\n",
 461                       ranges, simba);
 462
 463        /* parse ranges property, or cook one up by hand for Simba */
 464        /* PCI #address-cells == 3 and #size-cells == 2 always */
 465        res = &dev->resource[PCI_BRIDGE_RESOURCES];
 466        for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
 467                res->flags = 0;
 468                bus->resource[i] = res;
 469                ++res;
 470        }
 471        if (simba) {
 472                apb_fake_ranges(dev, bus, pbm);
 473                goto after_ranges;
 474        } else if (ranges == NULL) {
 475                pci_read_bridge_bases(bus);
 476                goto after_ranges;
 477        }
 478        i = 1;
 479        for (; len >= 32; len -= 32, ranges += 8) {
 480                u64 start;
 481
 482                if (ofpci_verbose)
 483                        printk("    RAW Range[%08x:%08x:%08x:%08x:%08x:%08x:"
 484                               "%08x:%08x]\n",
 485                               ranges[0], ranges[1], ranges[2], ranges[3],
 486                               ranges[4], ranges[5], ranges[6], ranges[7]);
 487
 488                flags = pci_parse_of_flags(ranges[0]);
 489                size = GET_64BIT(ranges, 6);
 490                if (flags == 0 || size == 0)
 491                        continue;
 492
 493                /* On PCI-Express systems, PCI bridges that have no devices downstream
 494                 * have a bogus size value where the first 32-bit cell is 0xffffffff.
 495                 * This results in a bogus range where start + size overflows.
 496                 *
 497                 * Just skip these otherwise the kernel will complain when the resource
 498                 * tries to be claimed.
 499                 */
 500                if (size >> 32 == 0xffffffff)
 501                        continue;
 502
 503                if (flags & IORESOURCE_IO) {
 504                        res = bus->resource[0];
 505                        if (res->flags) {
 506                                printk(KERN_ERR "PCI: ignoring extra I/O range"
 507                                       " for bridge %s\n", node->full_name);
 508                                continue;
 509                        }
 510                } else {
 511                        if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
 512                                printk(KERN_ERR "PCI: too many memory ranges"
 513                                       " for bridge %s\n", node->full_name);
 514                                continue;
 515                        }
 516                        res = bus->resource[i];
 517                        ++i;
 518                }
 519
 520                res->flags = flags;
 521                region.start = start = GET_64BIT(ranges, 1);
 522                region.end = region.start + size - 1;
 523
 524                if (ofpci_verbose)
 525                        printk("      Using flags[%08x] start[%016llx] size[%016llx]\n",
 526                               flags, start, size);
 527
 528                pcibios_bus_to_resource(dev->bus, res, &region);
 529        }
 530after_ranges:
 531        sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
 532                bus->number);
 533        if (ofpci_verbose)
 534                printk("    bus name: %s\n", bus->name);
 535
 536        pci_of_scan_bus(pbm, node, bus);
 537}
 538
 539static void pci_of_scan_bus(struct pci_pbm_info *pbm,
 540                            struct device_node *node,
 541                            struct pci_bus *bus)
 542{
 543        struct device_node *child;
 544        const u32 *reg;
 545        int reglen, devfn, prev_devfn;
 546        struct pci_dev *dev;
 547
 548        if (ofpci_verbose)
 549                printk("PCI: scan_bus[%s] bus no %d\n",
 550                       node->full_name, bus->number);
 551
 552        child = NULL;
 553        prev_devfn = -1;
 554        while ((child = of_get_next_child(node, child)) != NULL) {
 555                if (ofpci_verbose)
 556                        printk("  * %s\n", child->full_name);
 557                reg = of_get_property(child, "reg", &reglen);
 558                if (reg == NULL || reglen < 20)
 559                        continue;
 560
 561                devfn = (reg[0] >> 8) & 0xff;
 562
 563                /* This is a workaround for some device trees
 564                 * which list PCI devices twice.  On the V100
 565                 * for example, device number 3 is listed twice.
 566                 * Once as "pm" and once again as "lomp".
 567                 */
 568                if (devfn == prev_devfn)
 569                        continue;
 570                prev_devfn = devfn;
 571
 572                /* create a new pci_dev for this device */
 573                dev = of_create_pci_dev(pbm, child, bus, devfn);
 574                if (!dev)
 575                        continue;
 576                if (ofpci_verbose)
 577                        printk("PCI: dev header type: %x\n",
 578                               dev->hdr_type);
 579
 580                if (pci_is_bridge(dev))
 581                        of_scan_pci_bridge(pbm, child, dev);
 582        }
 583}
 584
 585static ssize_t
 586show_pciobppath_attr(struct device * dev, struct device_attribute * attr, char * buf)
 587{
 588        struct pci_dev *pdev;
 589        struct device_node *dp;
 590
 591        pdev = to_pci_dev(dev);
 592        dp = pdev->dev.of_node;
 593
 594        return snprintf (buf, PAGE_SIZE, "%s\n", dp->full_name);
 595}
 596
 597static DEVICE_ATTR(obppath, S_IRUSR | S_IRGRP | S_IROTH, show_pciobppath_attr, NULL);
 598
 599static void pci_bus_register_of_sysfs(struct pci_bus *bus)
 600{
 601        struct pci_dev *dev;
 602        struct pci_bus *child_bus;
 603        int err;
 604
 605        list_for_each_entry(dev, &bus->devices, bus_list) {
 606                /* we don't really care if we can create this file or
 607                 * not, but we need to assign the result of the call
 608                 * or the world will fall under alien invasion and
 609                 * everybody will be frozen on a spaceship ready to be
 610                 * eaten on alpha centauri by some green and jelly
 611                 * humanoid.
 612                 */
 613                err = sysfs_create_file(&dev->dev.kobj, &dev_attr_obppath.attr);
 614                (void) err;
 615        }
 616        list_for_each_entry(child_bus, &bus->children, node)
 617                pci_bus_register_of_sysfs(child_bus);
 618}
 619
 620static void pci_claim_bus_resources(struct pci_bus *bus)
 621{
 622        struct pci_bus *child_bus;
 623        struct pci_dev *dev;
 624
 625        list_for_each_entry(dev, &bus->devices, bus_list) {
 626                int i;
 627
 628                for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 629                        struct resource *r = &dev->resource[i];
 630
 631                        if (r->parent || !r->start || !r->flags)
 632                                continue;
 633
 634                        if (ofpci_verbose)
 635                                printk("PCI: Claiming %s: "
 636                                       "Resource %d: %016llx..%016llx [%x]\n",
 637                                       pci_name(dev), i,
 638                                       (unsigned long long)r->start,
 639                                       (unsigned long long)r->end,
 640                                       (unsigned int)r->flags);
 641
 642                        pci_claim_resource(dev, i);
 643                }
 644        }
 645
 646        list_for_each_entry(child_bus, &bus->children, node)
 647                pci_claim_bus_resources(child_bus);
 648}
 649
 650struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
 651                                 struct device *parent)
 652{
 653        LIST_HEAD(resources);
 654        struct device_node *node = pbm->op->dev.of_node;
 655        struct pci_bus *bus;
 656
 657        printk("PCI: Scanning PBM %s\n", node->full_name);
 658
 659        pci_add_resource_offset(&resources, &pbm->io_space,
 660                                pbm->io_space.start);
 661        pci_add_resource_offset(&resources, &pbm->mem_space,
 662                                pbm->mem_space.start);
 663        pbm->busn.start = pbm->pci_first_busno;
 664        pbm->busn.end   = pbm->pci_last_busno;
 665        pbm->busn.flags = IORESOURCE_BUS;
 666        pci_add_resource(&resources, &pbm->busn);
 667        bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
 668                                  pbm, &resources);
 669        if (!bus) {
 670                printk(KERN_ERR "Failed to create bus for %s\n",
 671                       node->full_name);
 672                pci_free_resource_list(&resources);
 673                return NULL;
 674        }
 675
 676        pci_of_scan_bus(pbm, node, bus);
 677        pci_bus_add_devices(bus);
 678        pci_bus_register_of_sysfs(bus);
 679
 680        pci_claim_bus_resources(bus);
 681
 682        return bus;
 683}
 684
 685void pcibios_fixup_bus(struct pci_bus *pbus)
 686{
 687}
 688
 689resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 690                                resource_size_t size, resource_size_t align)
 691{
 692        return res->start;
 693}
 694
 695int pcibios_enable_device(struct pci_dev *dev, int mask)
 696{
 697        u16 cmd, oldcmd;
 698        int i;
 699
 700        pci_read_config_word(dev, PCI_COMMAND, &cmd);
 701        oldcmd = cmd;
 702
 703        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 704                struct resource *res = &dev->resource[i];
 705
 706                /* Only set up the requested stuff */
 707                if (!(mask & (1<<i)))
 708                        continue;
 709
 710                if (res->flags & IORESOURCE_IO)
 711                        cmd |= PCI_COMMAND_IO;
 712                if (res->flags & IORESOURCE_MEM)
 713                        cmd |= PCI_COMMAND_MEMORY;
 714        }
 715
 716        if (cmd != oldcmd) {
 717                printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
 718                       pci_name(dev), cmd);
 719                /* Enable the appropriate bits in the PCI command register.  */
 720                pci_write_config_word(dev, PCI_COMMAND, cmd);
 721        }
 722        return 0;
 723}
 724
 725/* Platform support for /proc/bus/pci/X/Y mmap()s. */
 726
 727/* If the user uses a host-bridge as the PCI device, he may use
 728 * this to perform a raw mmap() of the I/O or MEM space behind
 729 * that controller.
 730 *
 731 * This can be useful for execution of x86 PCI bios initialization code
 732 * on a PCI card, like the xfree86 int10 stuff does.
 733 */
 734static int __pci_mmap_make_offset_bus(struct pci_dev *pdev, struct vm_area_struct *vma,
 735                                      enum pci_mmap_state mmap_state)
 736{
 737        struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
 738        unsigned long space_size, user_offset, user_size;
 739
 740        if (mmap_state == pci_mmap_io) {
 741                space_size = resource_size(&pbm->io_space);
 742        } else {
 743                space_size = resource_size(&pbm->mem_space);
 744        }
 745
 746        /* Make sure the request is in range. */
 747        user_offset = vma->vm_pgoff << PAGE_SHIFT;
 748        user_size = vma->vm_end - vma->vm_start;
 749
 750        if (user_offset >= space_size ||
 751            (user_offset + user_size) > space_size)
 752                return -EINVAL;
 753
 754        if (mmap_state == pci_mmap_io) {
 755                vma->vm_pgoff = (pbm->io_space.start +
 756                                 user_offset) >> PAGE_SHIFT;
 757        } else {
 758                vma->vm_pgoff = (pbm->mem_space.start +
 759                                 user_offset) >> PAGE_SHIFT;
 760        }
 761
 762        return 0;
 763}
 764
 765/* Adjust vm_pgoff of VMA such that it is the physical page offset
 766 * corresponding to the 32-bit pci bus offset for DEV requested by the user.
 767 *
 768 * Basically, the user finds the base address for his device which he wishes
 769 * to mmap.  They read the 32-bit value from the config space base register,
 770 * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
 771 * offset parameter of mmap on /proc/bus/pci/XXX for that device.
 772 *
 773 * Returns negative error code on failure, zero on success.
 774 */
 775static int __pci_mmap_make_offset(struct pci_dev *pdev,
 776                                  struct vm_area_struct *vma,
 777                                  enum pci_mmap_state mmap_state)
 778{
 779        unsigned long user_paddr, user_size;
 780        int i, err;
 781
 782        /* First compute the physical address in vma->vm_pgoff,
 783         * making sure the user offset is within range in the
 784         * appropriate PCI space.
 785         */
 786        err = __pci_mmap_make_offset_bus(pdev, vma, mmap_state);
 787        if (err)
 788                return err;
 789
 790        /* If this is a mapping on a host bridge, any address
 791         * is OK.
 792         */
 793        if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_HOST)
 794                return err;
 795
 796        /* Otherwise make sure it's in the range for one of the
 797         * device's resources.
 798         */
 799        user_paddr = vma->vm_pgoff << PAGE_SHIFT;
 800        user_size = vma->vm_end - vma->vm_start;
 801
 802        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
 803                struct resource *rp = &pdev->resource[i];
 804                resource_size_t aligned_end;
 805
 806                /* Active? */
 807                if (!rp->flags)
 808                        continue;
 809
 810                /* Same type? */
 811                if (i == PCI_ROM_RESOURCE) {
 812                        if (mmap_state != pci_mmap_mem)
 813                                continue;
 814                } else {
 815                        if ((mmap_state == pci_mmap_io &&
 816                             (rp->flags & IORESOURCE_IO) == 0) ||
 817                            (mmap_state == pci_mmap_mem &&
 818                             (rp->flags & IORESOURCE_MEM) == 0))
 819                                continue;
 820                }
 821
 822                /* Align the resource end to the next page address.
 823                 * PAGE_SIZE intentionally added instead of (PAGE_SIZE - 1),
 824                 * because actually we need the address of the next byte
 825                 * after rp->end.
 826                 */
 827                aligned_end = (rp->end + PAGE_SIZE) & PAGE_MASK;
 828
 829                if ((rp->start <= user_paddr) &&
 830                    (user_paddr + user_size) <= aligned_end)
 831                        break;
 832        }
 833
 834        if (i > PCI_ROM_RESOURCE)
 835                return -EINVAL;
 836
 837        return 0;
 838}
 839
 840/* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
 841 * device mapping.
 842 */
 843static void __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
 844                                             enum pci_mmap_state mmap_state)
 845{
 846        /* Our io_remap_pfn_range takes care of this, do nothing.  */
 847}
 848
 849/* Perform the actual remap of the pages for a PCI device mapping, as appropriate
 850 * for this architecture.  The region in the process to map is described by vm_start
 851 * and vm_end members of VMA, the base physical address is found in vm_pgoff.
 852 * The pci device structure is provided so that architectures may make mapping
 853 * decisions on a per-device or per-bus basis.
 854 *
 855 * Returns a negative error code on failure, zero on success.
 856 */
 857int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 858                        enum pci_mmap_state mmap_state,
 859                        int write_combine)
 860{
 861        int ret;
 862
 863        ret = __pci_mmap_make_offset(dev, vma, mmap_state);
 864        if (ret < 0)
 865                return ret;
 866
 867        __pci_mmap_set_pgprot(dev, vma, mmap_state);
 868
 869        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 870        ret = io_remap_pfn_range(vma, vma->vm_start,
 871                                 vma->vm_pgoff,
 872                                 vma->vm_end - vma->vm_start,
 873                                 vma->vm_page_prot);
 874        if (ret)
 875                return ret;
 876
 877        return 0;
 878}
 879
 880#ifdef CONFIG_NUMA
 881int pcibus_to_node(struct pci_bus *pbus)
 882{
 883        struct pci_pbm_info *pbm = pbus->sysdata;
 884
 885        return pbm->numa_node;
 886}
 887EXPORT_SYMBOL(pcibus_to_node);
 888#endif
 889
 890/* Return the domain number for this pci bus */
 891
 892int pci_domain_nr(struct pci_bus *pbus)
 893{
 894        struct pci_pbm_info *pbm = pbus->sysdata;
 895        int ret;
 896
 897        if (!pbm) {
 898                ret = -ENXIO;
 899        } else {
 900                ret = pbm->index;
 901        }
 902
 903        return ret;
 904}
 905EXPORT_SYMBOL(pci_domain_nr);
 906
 907#ifdef CONFIG_PCI_MSI
 908int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
 909{
 910        struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
 911        unsigned int irq;
 912
 913        if (!pbm->setup_msi_irq)
 914                return -EINVAL;
 915
 916        return pbm->setup_msi_irq(&irq, pdev, desc);
 917}
 918
 919void arch_teardown_msi_irq(unsigned int irq)
 920{
 921        struct msi_desc *entry = irq_get_msi_desc(irq);
 922        struct pci_dev *pdev = entry->dev;
 923        struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
 924
 925        if (pbm->teardown_msi_irq)
 926                pbm->teardown_msi_irq(irq, pdev);
 927}
 928#endif /* !(CONFIG_PCI_MSI) */
 929
 930static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
 931{
 932        struct pci_dev *ali_isa_bridge;
 933        u8 val;
 934
 935        /* ALI sound chips generate 31-bits of DMA, a special register
 936         * determines what bit 31 is emitted as.
 937         */
 938        ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL,
 939                                         PCI_DEVICE_ID_AL_M1533,
 940                                         NULL);
 941
 942        pci_read_config_byte(ali_isa_bridge, 0x7e, &val);
 943        if (set_bit)
 944                val |= 0x01;
 945        else
 946                val &= ~0x01;
 947        pci_write_config_byte(ali_isa_bridge, 0x7e, val);
 948        pci_dev_put(ali_isa_bridge);
 949}
 950
 951int pci64_dma_supported(struct pci_dev *pdev, u64 device_mask)
 952{
 953        u64 dma_addr_mask;
 954
 955        if (pdev == NULL) {
 956                dma_addr_mask = 0xffffffff;
 957        } else {
 958                struct iommu *iommu = pdev->dev.archdata.iommu;
 959
 960                dma_addr_mask = iommu->dma_addr_mask;
 961
 962                if (pdev->vendor == PCI_VENDOR_ID_AL &&
 963                    pdev->device == PCI_DEVICE_ID_AL_M5451 &&
 964                    device_mask == 0x7fffffff) {
 965                        ali_sound_dma_hack(pdev,
 966                                           (dma_addr_mask & 0x80000000) != 0);
 967                        return 1;
 968                }
 969        }
 970
 971        if (device_mask >= (1UL << 32UL))
 972                return 0;
 973
 974        return (device_mask & dma_addr_mask) == dma_addr_mask;
 975}
 976
 977void pci_resource_to_user(const struct pci_dev *pdev, int bar,
 978                          const struct resource *rp, resource_size_t *start,
 979                          resource_size_t *end)
 980{
 981        struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
 982        unsigned long offset;
 983
 984        if (rp->flags & IORESOURCE_IO)
 985                offset = pbm->io_space.start;
 986        else
 987                offset = pbm->mem_space.start;
 988
 989        *start = rp->start - offset;
 990        *end = rp->end - offset;
 991}
 992
 993void pcibios_set_master(struct pci_dev *dev)
 994{
 995        /* No special bus mastering setup handling */
 996}
 997
 998static int __init pcibios_init(void)
 999{
1000        pci_dfl_cache_line_size = 64 >> 2;
1001        return 0;
1002}
1003subsys_initcall(pcibios_init);
1004
1005#ifdef CONFIG_SYSFS
1006static void pci_bus_slot_names(struct device_node *node, struct pci_bus *bus)
1007{
1008        const struct pci_slot_names {
1009                u32     slot_mask;
1010                char    names[0];
1011        } *prop;
1012        const char *sp;
1013        int len, i;
1014        u32 mask;
1015
1016        prop = of_get_property(node, "slot-names", &len);
1017        if (!prop)
1018                return;
1019
1020        mask = prop->slot_mask;
1021        sp = prop->names;
1022
1023        if (ofpci_verbose)
1024                printk("PCI: Making slots for [%s] mask[0x%02x]\n",
1025                       node->full_name, mask);
1026
1027        i = 0;
1028        while (mask) {
1029                struct pci_slot *pci_slot;
1030                u32 this_bit = 1 << i;
1031
1032                if (!(mask & this_bit)) {
1033                        i++;
1034                        continue;
1035                }
1036
1037                if (ofpci_verbose)
1038                        printk("PCI: Making slot [%s]\n", sp);
1039
1040                pci_slot = pci_create_slot(bus, i, sp, NULL);
1041                if (IS_ERR(pci_slot))
1042                        printk(KERN_ERR "PCI: pci_create_slot returned %ld\n",
1043                               PTR_ERR(pci_slot));
1044
1045                sp += strlen(sp) + 1;
1046                mask &= ~this_bit;
1047                i++;
1048        }
1049}
1050
1051static int __init of_pci_slot_init(void)
1052{
1053        struct pci_bus *pbus = NULL;
1054
1055        while ((pbus = pci_find_next_bus(pbus)) != NULL) {
1056                struct device_node *node;
1057
1058                if (pbus->self) {
1059                        /* PCI->PCI bridge */
1060                        node = pbus->self->dev.of_node;
1061                } else {
1062                        struct pci_pbm_info *pbm = pbus->sysdata;
1063
1064                        /* Host PCI controller */
1065                        node = pbm->op->dev.of_node;
1066                }
1067
1068                pci_bus_slot_names(node, pbus);
1069        }
1070
1071        return 0;
1072}
1073device_initcall(of_pci_slot_init);
1074#endif
1075