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15#include <linux/sched.h>
16#include <linux/preempt.h>
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/kprobes.h>
20#include <linux/elfcore.h>
21#include <linux/tick.h>
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/compat.h>
25#include <linux/hardirq.h>
26#include <linux/syscalls.h>
27#include <linux/kernel.h>
28#include <linux/tracehook.h>
29#include <linux/signal.h>
30#include <asm/stack.h>
31#include <asm/switch_to.h>
32#include <asm/homecache.h>
33#include <asm/syscalls.h>
34#include <asm/traps.h>
35#include <asm/setup.h>
36#include <asm/uaccess.h>
37#ifdef CONFIG_HARDWALL
38#include <asm/hardwall.h>
39#endif
40#include <arch/chip.h>
41#include <arch/abi.h>
42#include <arch/sim_def.h>
43
44
45
46
47
48
49static int __init idle_setup(char *str)
50{
51 if (!str)
52 return -EINVAL;
53
54 if (!strcmp(str, "poll")) {
55 pr_info("using polling idle threads.\n");
56 cpu_idle_poll_ctrl(true);
57 return 0;
58 } else if (!strcmp(str, "halt")) {
59 return 0;
60 }
61 return -1;
62}
63early_param("idle", idle_setup);
64
65void arch_cpu_idle(void)
66{
67 __this_cpu_write(irq_stat.idle_timestamp, jiffies);
68 _cpu_idle();
69}
70
71
72
73
74void arch_release_thread_info(struct thread_info *info)
75{
76 struct single_step_state *step_state = info->step_state;
77
78 if (step_state) {
79
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91
92
93
94 kfree(step_state);
95 }
96}
97
98static void save_arch_state(struct thread_struct *t);
99
100int copy_thread(unsigned long clone_flags, unsigned long sp,
101 unsigned long arg, struct task_struct *p)
102{
103 struct pt_regs *childregs = task_pt_regs(p);
104 unsigned long ksp;
105 unsigned long *callee_regs;
106
107
108
109
110
111
112
113
114
115 ksp = (unsigned long) childregs;
116 ksp -= C_ABI_SAVE_AREA_SIZE;
117 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
118 ksp -= CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long);
119 callee_regs = (unsigned long *)ksp;
120 ksp -= C_ABI_SAVE_AREA_SIZE;
121 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
122 p->thread.ksp = ksp;
123
124
125 p->thread.creator_pid = current->pid;
126
127 if (unlikely(p->flags & PF_KTHREAD)) {
128
129 memset(childregs, 0, sizeof(struct pt_regs));
130 memset(&callee_regs[2], 0,
131 (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));
132 callee_regs[0] = sp;
133 callee_regs[1] = arg;
134 childregs->ex1 = PL_ICS_EX1(KERNEL_PL, 0);
135 p->thread.pc = (unsigned long) ret_from_kernel_thread;
136 return 0;
137 }
138
139
140
141
142
143 p->thread.pc = (unsigned long) ret_from_fork;
144
145
146
147
148
149 task_thread_info(p)->step_state = NULL;
150
151#ifdef __tilegx__
152
153
154
155
156 task_thread_info(p)->unalign_jit_base = NULL;
157#endif
158
159
160
161
162
163 *childregs = *current_pt_regs();
164 childregs->regs[0] = 0;
165 if (sp)
166 childregs->sp = sp;
167 memcpy(callee_regs, &childregs->regs[CALLEE_SAVED_FIRST_REG],
168 CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long));
169
170
171 p->thread.usp0 = childregs->sp;
172
173
174
175
176
177 if (clone_flags & CLONE_SETTLS)
178 childregs->tp = childregs->regs[4];
179
180
181#if CHIP_HAS_TILE_DMA()
182
183
184
185
186 memset(&p->thread.tile_dma_state, 0, sizeof(struct tile_dma_state));
187 memset(&p->thread.dma_async_tlb, 0, sizeof(struct async_tlb));
188#endif
189
190
191 p->thread.proc_status = 0;
192
193#ifdef CONFIG_HARDWALL
194
195 memset(&p->thread.hardwall[0], 0,
196 sizeof(struct hardwall_task) * HARDWALL_TYPES);
197#endif
198
199
200
201
202
203
204 save_arch_state(&p->thread);
205
206 return 0;
207}
208
209int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
210{
211 task_thread_info(tsk)->align_ctl = val;
212 return 0;
213}
214
215int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
216{
217 return put_user(task_thread_info(tsk)->align_ctl,
218 (unsigned int __user *)adr);
219}
220
221static struct task_struct corrupt_current = { .comm = "<corrupt>" };
222
223
224
225
226
227struct task_struct *validate_current(void)
228{
229 struct task_struct *tsk = current;
230 if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
231 (high_memory && (void *)tsk > high_memory) ||
232 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
233 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
234 tsk = &corrupt_current;
235 }
236 return tsk;
237}
238
239
240struct task_struct *sim_notify_fork(struct task_struct *prev)
241{
242 struct task_struct *tsk = current;
243 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK_PARENT |
244 (tsk->thread.creator_pid << _SIM_CONTROL_OPERATOR_BITS));
245 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK |
246 (tsk->pid << _SIM_CONTROL_OPERATOR_BITS));
247 return prev;
248}
249
250int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
251{
252 struct pt_regs *ptregs = task_pt_regs(tsk);
253 elf_core_copy_regs(regs, ptregs);
254 return 1;
255}
256
257#if CHIP_HAS_TILE_DMA()
258
259
260void grant_dma_mpls(void)
261{
262#if CONFIG_KERNEL_PL == 2
263 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
264 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
265#else
266 __insn_mtspr(SPR_MPL_DMA_CPL_SET_0, 1);
267 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0, 1);
268#endif
269}
270
271
272void restrict_dma_mpls(void)
273{
274#if CONFIG_KERNEL_PL == 2
275 __insn_mtspr(SPR_MPL_DMA_CPL_SET_2, 1);
276 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2, 1);
277#else
278 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
279 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
280#endif
281}
282
283
284static void save_tile_dma_state(struct tile_dma_state *dma)
285{
286 unsigned long state = __insn_mfspr(SPR_DMA_USER_STATUS);
287 unsigned long post_suspend_state;
288
289
290 if ((state & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK)
291 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
292
293
294
295
296
297
298
299
300
301 do {
302 post_suspend_state = __insn_mfspr(SPR_DMA_USER_STATUS);
303 } while (post_suspend_state & SPR_DMA_STATUS__BUSY_MASK);
304
305 dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);
306 dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);
307 dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);
308 dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);
309 dma->strides = __insn_mfspr(SPR_DMA_STRIDE);
310 dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);
311 dma->byte = __insn_mfspr(SPR_DMA_BYTE);
312 dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |
313 (post_suspend_state & SPR_DMA_STATUS__DONE_MASK);
314}
315
316
317static void restore_tile_dma_state(struct thread_struct *t)
318{
319 const struct tile_dma_state *dma = &t->tile_dma_state;
320
321
322
323
324
325 if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&
326 !(__insn_mfspr(SPR_DMA_USER_STATUS) & SPR_DMA_STATUS__DONE_MASK)) {
327 __insn_mtspr(SPR_DMA_BYTE, 0);
328 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
329 while (__insn_mfspr(SPR_DMA_USER_STATUS) &
330 SPR_DMA_STATUS__BUSY_MASK)
331 ;
332 }
333
334 __insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);
335 __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);
336 __insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);
337 __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);
338 __insn_mtspr(SPR_DMA_STRIDE, dma->strides);
339 __insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);
340 __insn_mtspr(SPR_DMA_BYTE, dma->byte);
341
342
343
344
345
346
347
348
349
350 if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {
351 t->dma_async_tlb.fault_num = 0;
352 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
353 }
354}
355
356#endif
357
358static void save_arch_state(struct thread_struct *t)
359{
360#if CHIP_HAS_SPLIT_INTR_MASK()
361 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0_0) |
362 ((u64)__insn_mfspr(SPR_INTERRUPT_MASK_0_1) << 32);
363#else
364 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0);
365#endif
366 t->ex_context[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0);
367 t->ex_context[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1);
368 t->system_save[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0);
369 t->system_save[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1);
370 t->system_save[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2);
371 t->system_save[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3);
372 t->intctrl_0 = __insn_mfspr(SPR_INTCTRL_0_STATUS);
373 t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
374#if !CHIP_HAS_FIXED_INTVEC_BASE()
375 t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
376#endif
377 t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
378#if CHIP_HAS_DSTREAM_PF()
379 t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
380#endif
381}
382
383static void restore_arch_state(const struct thread_struct *t)
384{
385#if CHIP_HAS_SPLIT_INTR_MASK()
386 __insn_mtspr(SPR_INTERRUPT_MASK_0_0, (u32) t->interrupt_mask);
387 __insn_mtspr(SPR_INTERRUPT_MASK_0_1, t->interrupt_mask >> 32);
388#else
389 __insn_mtspr(SPR_INTERRUPT_MASK_0, t->interrupt_mask);
390#endif
391 __insn_mtspr(SPR_EX_CONTEXT_0_0, t->ex_context[0]);
392 __insn_mtspr(SPR_EX_CONTEXT_0_1, t->ex_context[1]);
393 __insn_mtspr(SPR_SYSTEM_SAVE_0_0, t->system_save[0]);
394 __insn_mtspr(SPR_SYSTEM_SAVE_0_1, t->system_save[1]);
395 __insn_mtspr(SPR_SYSTEM_SAVE_0_2, t->system_save[2]);
396 __insn_mtspr(SPR_SYSTEM_SAVE_0_3, t->system_save[3]);
397 __insn_mtspr(SPR_INTCTRL_0_STATUS, t->intctrl_0);
398 __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
399#if !CHIP_HAS_FIXED_INTVEC_BASE()
400 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
401#endif
402 __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
403#if CHIP_HAS_DSTREAM_PF()
404 __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
405#endif
406}
407
408
409void _prepare_arch_switch(struct task_struct *next)
410{
411#if CHIP_HAS_TILE_DMA()
412 struct tile_dma_state *dma = ¤t->thread.tile_dma_state;
413 if (dma->enabled)
414 save_tile_dma_state(dma);
415#endif
416}
417
418
419struct task_struct *__sched _switch_to(struct task_struct *prev,
420 struct task_struct *next)
421{
422
423 save_arch_state(&prev->thread);
424
425#if CHIP_HAS_TILE_DMA()
426
427
428
429
430
431
432 if (next->thread.tile_dma_state.enabled) {
433 restore_tile_dma_state(&next->thread);
434 grant_dma_mpls();
435 } else {
436 restrict_dma_mpls();
437 }
438#endif
439
440
441 restore_arch_state(&next->thread);
442
443#ifdef CONFIG_HARDWALL
444
445 hardwall_switch_tasks(prev, next);
446#endif
447
448
449
450
451
452
453
454 return __switch_to(prev, next, next_current_ksp0(next));
455}
456
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467
468
469
470
471int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
472{
473
474 if (!user_mode(regs))
475 return 0;
476
477
478 local_irq_enable();
479
480 if (thread_info_flags & _TIF_NEED_RESCHED) {
481 schedule();
482 return 1;
483 }
484#if CHIP_HAS_TILE_DMA()
485 if (thread_info_flags & _TIF_ASYNC_TLB) {
486 do_async_page_fault(regs);
487 return 1;
488 }
489#endif
490 if (thread_info_flags & _TIF_SIGPENDING) {
491 do_signal(regs);
492 return 1;
493 }
494 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
495 clear_thread_flag(TIF_NOTIFY_RESUME);
496 tracehook_notify_resume(regs);
497 return 1;
498 }
499 if (thread_info_flags & _TIF_SINGLESTEP) {
500 single_step_once(regs);
501 return 0;
502 }
503 panic("work_pending: bad flags %#x\n", thread_info_flags);
504}
505
506unsigned long get_wchan(struct task_struct *p)
507{
508 struct KBacktraceIterator kbt;
509
510 if (!p || p == current || p->state == TASK_RUNNING)
511 return 0;
512
513 for (KBacktraceIterator_init(&kbt, p, NULL);
514 !KBacktraceIterator_end(&kbt);
515 KBacktraceIterator_next(&kbt)) {
516 if (!in_sched_functions(kbt.it.pc))
517 return kbt.it.pc;
518 }
519
520 return 0;
521}
522
523
524void flush_thread(void)
525{
526
527}
528
529
530
531
532void exit_thread(void)
533{
534#ifdef CONFIG_HARDWALL
535
536
537
538
539
540
541 hardwall_deactivate_all(current);
542#endif
543}
544
545void show_regs(struct pt_regs *regs)
546{
547 struct task_struct *tsk = validate_current();
548 int i;
549
550 pr_err("\n");
551 if (tsk != &corrupt_current)
552 show_regs_print_info(KERN_ERR);
553#ifdef __tilegx__
554 for (i = 0; i < 17; i++)
555 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
556 i, regs->regs[i], i+18, regs->regs[i+18],
557 i+36, regs->regs[i+36]);
558 pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",
559 regs->regs[17], regs->regs[35], regs->tp);
560 pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs->sp, regs->lr);
561#else
562 for (i = 0; i < 13; i++)
563 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT
564 " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
565 i, regs->regs[i], i+14, regs->regs[i+14],
566 i+27, regs->regs[i+27], i+40, regs->regs[i+40]);
567 pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",
568 regs->regs[13], regs->tp, regs->sp, regs->lr);
569#endif
570 pr_err(" pc : "REGFMT" ex1: %ld faultnum: %ld\n",
571 regs->pc, regs->ex1, regs->faultnum);
572
573 dump_stack_regs(regs);
574}
575