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11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/mmu_notifier.h>
17#include <linux/tracepoint.h>
18#include <linux/cpumask.h>
19#include <linux/irq_work.h>
20
21#include <linux/kvm.h>
22#include <linux/kvm_para.h>
23#include <linux/kvm_types.h>
24#include <linux/perf_event.h>
25#include <linux/pvclock_gtod.h>
26#include <linux/clocksource.h>
27
28#include <asm/pvclock-abi.h>
29#include <asm/desc.h>
30#include <asm/mtrr.h>
31#include <asm/msr-index.h>
32#include <asm/asm.h>
33
34#define KVM_MAX_VCPUS 255
35#define KVM_SOFT_MAX_VCPUS 160
36#define KVM_USER_MEM_SLOTS 125
37
38#define KVM_PRIVATE_MEM_SLOTS 3
39#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40
41#define KVM_MMIO_SIZE 16
42
43#define KVM_PIO_PAGE_OFFSET 1
44#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
45
46#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
47
48#define CR0_RESERVED_BITS \
49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52
53#define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
54#define CR4_RESERVED_BITS \
55 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
56 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
57 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
58 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
59 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
60
61#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
62
63
64
65#define INVALID_PAGE (~(hpa_t)0)
66#define VALID_PAGE(x) ((x) != INVALID_PAGE)
67
68#define UNMAPPED_GVA (~(gpa_t)0)
69
70
71#define KVM_NR_PAGE_SIZES 3
72#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
73#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
74#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
75#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
76#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
77
78static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
79{
80
81 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
82 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
83}
84
85#define SELECTOR_TI_MASK (1 << 2)
86#define SELECTOR_RPL_MASK 0x03
87
88#define IOPL_SHIFT 12
89
90#define KVM_PERMILLE_MMU_PAGES 20
91#define KVM_MIN_ALLOC_MMU_PAGES 64
92#define KVM_MMU_HASH_SHIFT 10
93#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
94#define KVM_MIN_FREE_MMU_PAGES 5
95#define KVM_REFILL_PAGES 25
96#define KVM_MAX_CPUID_ENTRIES 80
97#define KVM_NR_FIXED_MTRR_REGION 88
98#define KVM_NR_VAR_MTRR 8
99
100#define ASYNC_PF_PER_VCPU 64
101
102enum kvm_reg {
103 VCPU_REGS_RAX = 0,
104 VCPU_REGS_RCX = 1,
105 VCPU_REGS_RDX = 2,
106 VCPU_REGS_RBX = 3,
107 VCPU_REGS_RSP = 4,
108 VCPU_REGS_RBP = 5,
109 VCPU_REGS_RSI = 6,
110 VCPU_REGS_RDI = 7,
111#ifdef CONFIG_X86_64
112 VCPU_REGS_R8 = 8,
113 VCPU_REGS_R9 = 9,
114 VCPU_REGS_R10 = 10,
115 VCPU_REGS_R11 = 11,
116 VCPU_REGS_R12 = 12,
117 VCPU_REGS_R13 = 13,
118 VCPU_REGS_R14 = 14,
119 VCPU_REGS_R15 = 15,
120#endif
121 VCPU_REGS_RIP,
122 NR_VCPU_REGS
123};
124
125enum kvm_reg_ex {
126 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
127 VCPU_EXREG_CR3,
128 VCPU_EXREG_RFLAGS,
129 VCPU_EXREG_SEGMENTS,
130};
131
132enum {
133 VCPU_SREG_ES,
134 VCPU_SREG_CS,
135 VCPU_SREG_SS,
136 VCPU_SREG_DS,
137 VCPU_SREG_FS,
138 VCPU_SREG_GS,
139 VCPU_SREG_TR,
140 VCPU_SREG_LDTR,
141};
142
143#include <asm/kvm_emulate.h>
144
145#define KVM_NR_MEM_OBJS 40
146
147#define KVM_NR_DB_REGS 4
148
149#define DR6_BD (1 << 13)
150#define DR6_BS (1 << 14)
151#define DR6_RTM (1 << 16)
152#define DR6_FIXED_1 0xfffe0ff0
153#define DR6_INIT 0xffff0ff0
154#define DR6_VOLATILE 0x0001e00f
155
156#define DR7_BP_EN_MASK 0x000000ff
157#define DR7_GE (1 << 9)
158#define DR7_GD (1 << 13)
159#define DR7_FIXED_1 0x00000400
160#define DR7_VOLATILE 0xffff2bff
161
162
163#define KVM_APIC_CHECK_VAPIC 0
164
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167
168
169
170#define KVM_APIC_PV_EOI_PENDING 1
171
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174
175
176struct kvm_mmu_memory_cache {
177 int nobjs;
178 void *objects[KVM_NR_MEM_OBJS];
179};
180
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190
191union kvm_mmu_page_role {
192 unsigned word;
193 struct {
194 unsigned level:4;
195 unsigned cr4_pae:1;
196 unsigned quadrant:2;
197 unsigned pad_for_nice_hex_output:6;
198 unsigned direct:1;
199 unsigned access:3;
200 unsigned invalid:1;
201 unsigned nxe:1;
202 unsigned cr0_wp:1;
203 unsigned smep_andnot_wp:1;
204 };
205};
206
207struct kvm_mmu_page {
208 struct list_head link;
209 struct hlist_node hash_link;
210
211
212
213
214
215 gfn_t gfn;
216 union kvm_mmu_page_role role;
217
218 u64 *spt;
219
220 gfn_t *gfns;
221 bool unsync;
222 int root_count;
223 unsigned int unsync_children;
224 unsigned long parent_ptes;
225
226
227 unsigned long mmu_valid_gen;
228
229 DECLARE_BITMAP(unsync_child_bitmap, 512);
230
231#ifdef CONFIG_X86_32
232
233
234
235
236 int clear_spte_count;
237#endif
238
239
240 int write_flooding_count;
241};
242
243struct kvm_pio_request {
244 unsigned long count;
245 int in;
246 int port;
247 int size;
248};
249
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253
254
255struct kvm_mmu {
256 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
257 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
258 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
259 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
260 bool prefault);
261 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
262 struct x86_exception *fault);
263 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
264 struct x86_exception *exception);
265 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
266 struct x86_exception *exception);
267 int (*sync_page)(struct kvm_vcpu *vcpu,
268 struct kvm_mmu_page *sp);
269 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
270 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
271 u64 *spte, const void *pte);
272 hpa_t root_hpa;
273 int root_level;
274 int shadow_root_level;
275 union kvm_mmu_page_role base_role;
276 bool direct_map;
277
278
279
280
281
282
283 u8 permissions[16];
284
285 u64 *pae_root;
286 u64 *lm_root;
287 u64 rsvd_bits_mask[2][4];
288 u64 bad_mt_xwr;
289
290
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293
294
295 u8 last_pte_bitmap;
296
297 bool nx;
298
299 u64 pdptrs[4];
300};
301
302enum pmc_type {
303 KVM_PMC_GP = 0,
304 KVM_PMC_FIXED,
305};
306
307struct kvm_pmc {
308 enum pmc_type type;
309 u8 idx;
310 u64 counter;
311 u64 eventsel;
312 struct perf_event *perf_event;
313 struct kvm_vcpu *vcpu;
314};
315
316struct kvm_pmu {
317 unsigned nr_arch_gp_counters;
318 unsigned nr_arch_fixed_counters;
319 unsigned available_event_types;
320 u64 fixed_ctr_ctrl;
321 u64 global_ctrl;
322 u64 global_status;
323 u64 global_ovf_ctrl;
324 u64 counter_bitmask[2];
325 u64 global_ctrl_mask;
326 u64 reserved_bits;
327 u8 version;
328 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
329 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
330 struct irq_work irq_work;
331 u64 reprogram_pmi;
332};
333
334enum {
335 KVM_DEBUGREG_BP_ENABLED = 1,
336 KVM_DEBUGREG_WONT_EXIT = 2,
337};
338
339struct kvm_vcpu_arch {
340
341
342
343
344 unsigned long regs[NR_VCPU_REGS];
345 u32 regs_avail;
346 u32 regs_dirty;
347
348 unsigned long cr0;
349 unsigned long cr0_guest_owned_bits;
350 unsigned long cr2;
351 unsigned long cr3;
352 unsigned long cr4;
353 unsigned long cr4_guest_owned_bits;
354 unsigned long cr8;
355 u32 hflags;
356 u64 efer;
357 u64 apic_base;
358 struct kvm_lapic *apic;
359 unsigned long apic_attention;
360 int32_t apic_arb_prio;
361 int mp_state;
362 u64 ia32_misc_enable_msr;
363 bool tpr_access_reporting;
364
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368
369
370
371
372 struct kvm_mmu mmu;
373
374
375
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377
378
379
380
381
382 struct kvm_mmu nested_mmu;
383
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387
388 struct kvm_mmu *walk_mmu;
389
390 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
391 struct kvm_mmu_memory_cache mmu_page_cache;
392 struct kvm_mmu_memory_cache mmu_page_header_cache;
393
394 struct fpu guest_fpu;
395 u64 xcr0;
396 u64 guest_supported_xcr0;
397 u32 guest_xstate_size;
398
399 struct kvm_pio_request pio;
400 void *pio_data;
401
402 u8 event_exit_inst_len;
403
404 struct kvm_queued_exception {
405 bool pending;
406 bool has_error_code;
407 bool reinject;
408 u8 nr;
409 u32 error_code;
410 } exception;
411
412 struct kvm_queued_interrupt {
413 bool pending;
414 bool soft;
415 u8 nr;
416 } interrupt;
417
418 int halt_request;
419
420 int cpuid_nent;
421 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
422
423
424 struct x86_emulate_ctxt emulate_ctxt;
425 bool emulate_regs_need_sync_to_vcpu;
426 bool emulate_regs_need_sync_from_vcpu;
427 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
428
429 gpa_t time;
430 struct pvclock_vcpu_time_info hv_clock;
431 unsigned int hw_tsc_khz;
432 struct gfn_to_hva_cache pv_time;
433 bool pv_time_enabled;
434
435 bool pvclock_set_guest_stopped_request;
436
437 struct {
438 u64 msr_val;
439 u64 last_steal;
440 u64 accum_steal;
441 struct gfn_to_hva_cache stime;
442 struct kvm_steal_time steal;
443 } st;
444
445 u64 last_guest_tsc;
446 u64 last_host_tsc;
447 u64 tsc_offset_adjustment;
448 u64 this_tsc_nsec;
449 u64 this_tsc_write;
450 u64 this_tsc_generation;
451 bool tsc_catchup;
452 bool tsc_always_catchup;
453 s8 virtual_tsc_shift;
454 u32 virtual_tsc_mult;
455 u32 virtual_tsc_khz;
456 s64 ia32_tsc_adjust_msr;
457
458 atomic_t nmi_queued;
459 unsigned nmi_pending;
460 bool nmi_injected;
461
462 struct mtrr_state_type mtrr_state;
463 u64 pat;
464
465 unsigned switch_db_regs;
466 unsigned long db[KVM_NR_DB_REGS];
467 unsigned long dr6;
468 unsigned long dr7;
469 unsigned long eff_db[KVM_NR_DB_REGS];
470 unsigned long guest_debug_dr7;
471
472 u64 mcg_cap;
473 u64 mcg_status;
474 u64 mcg_ctl;
475 u64 *mce_banks;
476
477
478 u64 mmio_gva;
479 unsigned access;
480 gfn_t mmio_gfn;
481 u64 mmio_gen;
482
483 struct kvm_pmu pmu;
484
485
486 unsigned long singlestep_rip;
487
488
489 u64 hv_vapic;
490
491 cpumask_var_t wbinvd_dirty_mask;
492
493 unsigned long last_retry_eip;
494 unsigned long last_retry_addr;
495
496 struct {
497 bool halted;
498 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
499 struct gfn_to_hva_cache data;
500 u64 msr_val;
501 u32 id;
502 bool send_user_only;
503 } apf;
504
505
506 struct {
507 u64 length;
508 u64 status;
509 } osvw;
510
511 struct {
512 u64 msr_val;
513 struct gfn_to_hva_cache data;
514 } pv_eoi;
515
516
517
518
519
520
521 bool write_fault_to_shadow_pgtable;
522
523
524 unsigned long exit_qualification;
525
526
527 struct {
528 bool pv_unhalted;
529 } pv;
530};
531
532struct kvm_lpage_info {
533 int write_count;
534};
535
536struct kvm_arch_memory_slot {
537 unsigned long *rmap[KVM_NR_PAGE_SIZES];
538 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
539};
540
541struct kvm_apic_map {
542 struct rcu_head rcu;
543 u8 ldr_bits;
544
545 u32 cid_shift, cid_mask, lid_mask;
546 struct kvm_lapic *phys_map[256];
547
548 struct kvm_lapic *logical_map[16][16];
549};
550
551struct kvm_arch {
552 unsigned int n_used_mmu_pages;
553 unsigned int n_requested_mmu_pages;
554 unsigned int n_max_mmu_pages;
555 unsigned int indirect_shadow_pages;
556 unsigned long mmu_valid_gen;
557 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
558
559
560
561 struct list_head active_mmu_pages;
562 struct list_head zapped_obsolete_pages;
563
564 struct list_head assigned_dev_head;
565 struct iommu_domain *iommu_domain;
566 bool iommu_noncoherent;
567#define __KVM_HAVE_ARCH_NONCOHERENT_DMA
568 atomic_t noncoherent_dma_count;
569 struct kvm_pic *vpic;
570 struct kvm_ioapic *vioapic;
571 struct kvm_pit *vpit;
572 int vapics_in_nmi_mode;
573 struct mutex apic_map_lock;
574 struct kvm_apic_map *apic_map;
575
576 unsigned int tss_addr;
577 bool apic_access_page_done;
578
579 gpa_t wall_clock;
580
581 bool ept_identity_pagetable_done;
582 gpa_t ept_identity_map_addr;
583
584 unsigned long irq_sources_bitmap;
585 s64 kvmclock_offset;
586 raw_spinlock_t tsc_write_lock;
587 u64 last_tsc_nsec;
588 u64 last_tsc_write;
589 u32 last_tsc_khz;
590 u64 cur_tsc_nsec;
591 u64 cur_tsc_write;
592 u64 cur_tsc_offset;
593 u64 cur_tsc_generation;
594 int nr_vcpus_matched_tsc;
595
596 spinlock_t pvclock_gtod_sync_lock;
597 bool use_master_clock;
598 u64 master_kernel_ns;
599 cycle_t master_cycle_now;
600 struct delayed_work kvmclock_update_work;
601 struct delayed_work kvmclock_sync_work;
602
603 struct kvm_xen_hvm_config xen_hvm_config;
604
605
606 u64 hv_guest_os_id;
607 u64 hv_hypercall;
608 u64 hv_tsc_page;
609
610 #ifdef CONFIG_KVM_MMU_AUDIT
611 int audit_point;
612 #endif
613};
614
615struct kvm_vm_stat {
616 u32 mmu_shadow_zapped;
617 u32 mmu_pte_write;
618 u32 mmu_pte_updated;
619 u32 mmu_pde_zapped;
620 u32 mmu_flooded;
621 u32 mmu_recycled;
622 u32 mmu_cache_miss;
623 u32 mmu_unsync;
624 u32 remote_tlb_flush;
625 u32 lpages;
626};
627
628struct kvm_vcpu_stat {
629 u32 pf_fixed;
630 u32 pf_guest;
631 u32 tlb_flush;
632 u32 invlpg;
633
634 u32 exits;
635 u32 io_exits;
636 u32 mmio_exits;
637 u32 signal_exits;
638 u32 irq_window_exits;
639 u32 nmi_window_exits;
640 u32 halt_exits;
641 u32 halt_wakeup;
642 u32 request_irq_exits;
643 u32 irq_exits;
644 u32 host_state_reload;
645 u32 efer_reload;
646 u32 fpu_reload;
647 u32 insn_emulation;
648 u32 insn_emulation_fail;
649 u32 hypercalls;
650 u32 irq_injections;
651 u32 nmi_injections;
652};
653
654struct x86_instruction_info;
655
656struct msr_data {
657 bool host_initiated;
658 u32 index;
659 u64 data;
660};
661
662struct kvm_x86_ops {
663 int (*cpu_has_kvm_support)(void);
664 int (*disabled_by_bios)(void);
665 int (*hardware_enable)(void);
666 void (*hardware_disable)(void);
667 void (*check_processor_compatibility)(void *rtn);
668 int (*hardware_setup)(void);
669 void (*hardware_unsetup)(void);
670 bool (*cpu_has_accelerated_tpr)(void);
671 void (*cpuid_update)(struct kvm_vcpu *vcpu);
672
673
674 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
675 void (*vcpu_free)(struct kvm_vcpu *vcpu);
676 void (*vcpu_reset)(struct kvm_vcpu *vcpu);
677
678 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
679 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
680 void (*vcpu_put)(struct kvm_vcpu *vcpu);
681
682 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
683 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
684 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
685 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
686 void (*get_segment)(struct kvm_vcpu *vcpu,
687 struct kvm_segment *var, int seg);
688 int (*get_cpl)(struct kvm_vcpu *vcpu);
689 void (*set_segment)(struct kvm_vcpu *vcpu,
690 struct kvm_segment *var, int seg);
691 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
692 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
693 void (*decache_cr3)(struct kvm_vcpu *vcpu);
694 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
695 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
696 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
697 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
698 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
699 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
700 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
701 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
702 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
703 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
704 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
705 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
706 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
707 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
708 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
709 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
710 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
711
712 void (*tlb_flush)(struct kvm_vcpu *vcpu);
713
714 void (*run)(struct kvm_vcpu *vcpu);
715 int (*handle_exit)(struct kvm_vcpu *vcpu);
716 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
717 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
718 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
719 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
720 unsigned char *hypercall_addr);
721 void (*set_irq)(struct kvm_vcpu *vcpu);
722 void (*set_nmi)(struct kvm_vcpu *vcpu);
723 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
724 bool has_error_code, u32 error_code,
725 bool reinject);
726 void (*cancel_injection)(struct kvm_vcpu *vcpu);
727 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
728 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
729 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
730 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
731 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
732 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
733 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
734 int (*vm_has_apicv)(struct kvm *kvm);
735 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
736 void (*hwapic_isr_update)(struct kvm *kvm, int isr);
737 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
738 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
739 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
740 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
741 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
742 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
743 int (*get_tdp_level)(void);
744 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
745 int (*get_lpage_level)(void);
746 bool (*rdtscp_supported)(void);
747 bool (*invpcid_supported)(void);
748 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
749
750 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
751
752 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
753
754 bool (*has_wbinvd_exit)(void);
755
756 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
757 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
758 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
759
760 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
761 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
762
763 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
764
765 int (*check_intercept)(struct kvm_vcpu *vcpu,
766 struct x86_instruction_info *info,
767 enum x86_intercept_stage stage);
768 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
769 bool (*mpx_supported)(void);
770
771 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
772
773 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
774};
775
776struct kvm_arch_async_pf {
777 u32 token;
778 gfn_t gfn;
779 unsigned long cr3;
780 bool direct_map;
781};
782
783extern struct kvm_x86_ops *kvm_x86_ops;
784
785static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
786 s64 adjustment)
787{
788 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
789}
790
791static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
792{
793 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
794}
795
796int kvm_mmu_module_init(void);
797void kvm_mmu_module_exit(void);
798
799void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
800int kvm_mmu_create(struct kvm_vcpu *vcpu);
801void kvm_mmu_setup(struct kvm_vcpu *vcpu);
802void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
803 u64 dirty_mask, u64 nx_mask, u64 x_mask);
804
805void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
806void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
807void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
808 struct kvm_memory_slot *slot,
809 gfn_t gfn_offset, unsigned long mask);
810void kvm_mmu_zap_all(struct kvm *kvm);
811void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);
812unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
813void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
814
815int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
816
817int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
818 const void *val, int bytes);
819u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
820
821extern bool tdp_enabled;
822
823u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
824
825
826extern bool kvm_has_tsc_control;
827
828extern u32 kvm_min_guest_tsc_khz;
829
830extern u32 kvm_max_guest_tsc_khz;
831
832enum emulation_result {
833 EMULATE_DONE,
834 EMULATE_USER_EXIT,
835 EMULATE_FAIL,
836};
837
838#define EMULTYPE_NO_DECODE (1 << 0)
839#define EMULTYPE_TRAP_UD (1 << 1)
840#define EMULTYPE_SKIP (1 << 2)
841#define EMULTYPE_RETRY (1 << 3)
842#define EMULTYPE_NO_REEXECUTE (1 << 4)
843int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
844 int emulation_type, void *insn, int insn_len);
845
846static inline int emulate_instruction(struct kvm_vcpu *vcpu,
847 int emulation_type)
848{
849 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
850}
851
852void kvm_enable_efer_bits(u64);
853bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
854int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
855int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
856
857struct x86_emulate_ctxt;
858
859int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
860void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
861int kvm_emulate_halt(struct kvm_vcpu *vcpu);
862int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
863
864void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
865int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
866void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
867
868int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
869 int reason, bool has_error_code, u32 error_code);
870
871int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
872int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
873int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
874int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
875int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
876int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
877unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
878void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
879void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
880int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
881
882int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
883int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
884
885unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
886void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
887bool kvm_rdpmc(struct kvm_vcpu *vcpu);
888
889void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
890void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
891void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
892void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
893void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
894int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
895 gfn_t gfn, void *data, int offset, int len,
896 u32 access);
897bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
898
899static inline int __kvm_irq_line_state(unsigned long *irq_state,
900 int irq_source_id, int level)
901{
902
903 if (level)
904 __set_bit(irq_source_id, irq_state);
905 else
906 __clear_bit(irq_source_id, irq_state);
907
908 return !!(*irq_state);
909}
910
911int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
912void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
913
914void kvm_inject_nmi(struct kvm_vcpu *vcpu);
915
916int fx_init(struct kvm_vcpu *vcpu);
917
918void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
919 const u8 *new, int bytes);
920int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
921int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
922void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
923int kvm_mmu_load(struct kvm_vcpu *vcpu);
924void kvm_mmu_unload(struct kvm_vcpu *vcpu);
925void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
926gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
927 struct x86_exception *exception);
928gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
929 struct x86_exception *exception);
930gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
931 struct x86_exception *exception);
932gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
933 struct x86_exception *exception);
934gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
935 struct x86_exception *exception);
936
937int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
938
939int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
940 void *insn, int insn_len);
941void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
942void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
943
944void kvm_enable_tdp(void);
945void kvm_disable_tdp(void);
946
947static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
948 struct x86_exception *exception)
949{
950 return gpa;
951}
952
953static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
954{
955 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
956
957 return (struct kvm_mmu_page *)page_private(page);
958}
959
960static inline u16 kvm_read_ldt(void)
961{
962 u16 ldt;
963 asm("sldt %0" : "=g"(ldt));
964 return ldt;
965}
966
967static inline void kvm_load_ldt(u16 sel)
968{
969 asm("lldt %0" : : "rm"(sel));
970}
971
972#ifdef CONFIG_X86_64
973static inline unsigned long read_msr(unsigned long msr)
974{
975 u64 value;
976
977 rdmsrl(msr, value);
978 return value;
979}
980#endif
981
982static inline u32 get_rdx_init_val(void)
983{
984 return 0x600;
985}
986
987static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
988{
989 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
990}
991
992static inline u64 get_canonical(u64 la)
993{
994 return ((int64_t)la << 16) >> 16;
995}
996
997static inline bool is_noncanonical_address(u64 la)
998{
999#ifdef CONFIG_X86_64
1000 return get_canonical(la) != la;
1001#else
1002 return false;
1003#endif
1004}
1005
1006#define TSS_IOPB_BASE_OFFSET 0x66
1007#define TSS_BASE_SIZE 0x68
1008#define TSS_IOPB_SIZE (65536 / 8)
1009#define TSS_REDIRECTION_SIZE (256 / 8)
1010#define RMODE_TSS_SIZE \
1011 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1012
1013enum {
1014 TASK_SWITCH_CALL = 0,
1015 TASK_SWITCH_IRET = 1,
1016 TASK_SWITCH_JMP = 2,
1017 TASK_SWITCH_GATE = 3,
1018};
1019
1020#define HF_GIF_MASK (1 << 0)
1021#define HF_HIF_MASK (1 << 1)
1022#define HF_VINTR_MASK (1 << 2)
1023#define HF_NMI_MASK (1 << 3)
1024#define HF_IRET_MASK (1 << 4)
1025#define HF_GUEST_MASK (1 << 5)
1026
1027
1028
1029
1030
1031
1032asmlinkage void kvm_spurious_fault(void);
1033
1034#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1035 "666: " insn "\n\t" \
1036 "668: \n\t" \
1037 ".pushsection .fixup, \"ax\" \n" \
1038 "667: \n\t" \
1039 cleanup_insn "\n\t" \
1040 "cmpb $0, kvm_rebooting \n\t" \
1041 "jne 668b \n\t" \
1042 __ASM_SIZE(push) " $666b \n\t" \
1043 "call kvm_spurious_fault \n\t" \
1044 ".popsection \n\t" \
1045 _ASM_EXTABLE(666b, 667b)
1046
1047#define __kvm_handle_fault_on_reboot(insn) \
1048 ____kvm_handle_fault_on_reboot(insn, "")
1049
1050#define KVM_ARCH_WANT_MMU_NOTIFIER
1051int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1052int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1053int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1054int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1055void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1056int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1057int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1058int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1059int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1060int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1061void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1062void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1063void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1064 unsigned long address);
1065
1066void kvm_define_shared_msr(unsigned index, u32 msr);
1067int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1068
1069bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1070
1071void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1072 struct kvm_async_pf *work);
1073void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1074 struct kvm_async_pf *work);
1075void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1076 struct kvm_async_pf *work);
1077bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1078extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1079
1080void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1081
1082int kvm_is_in_guest(void);
1083
1084void kvm_pmu_init(struct kvm_vcpu *vcpu);
1085void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1086void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1087void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1088bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1089int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1090int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1091int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc);
1092int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1093void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1094void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1095
1096#endif
1097