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28#include "vmwgfx_kms.h"
29
30
31
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
34
35struct vmw_clip_rect {
36 int x1, x2, y1, y2;
37};
38
39
40
41
42
43static void vmw_clip_cliprects(struct drm_clip_rect *rects,
44 int num_rects,
45 struct vmw_clip_rect clip,
46 SVGASignedRect *out_rects,
47 int *out_num)
48{
49 int i, k;
50
51 for (i = 0, k = 0; i < num_rects; i++) {
52 int x1 = max_t(int, clip.x1, rects[i].x1);
53 int y1 = max_t(int, clip.y1, rects[i].y1);
54 int x2 = min_t(int, clip.x2, rects[i].x2);
55 int y2 = min_t(int, clip.y2, rects[i].y2);
56
57 if (x1 >= x2)
58 continue;
59 if (y1 >= y2)
60 continue;
61
62 out_rects[k].left = x1;
63 out_rects[k].top = y1;
64 out_rects[k].right = x2;
65 out_rects[k].bottom = y2;
66 k++;
67 }
68
69 *out_num = k;
70}
71
72void vmw_display_unit_cleanup(struct vmw_display_unit *du)
73{
74 if (du->cursor_surface)
75 vmw_surface_unreference(&du->cursor_surface);
76 if (du->cursor_dmabuf)
77 vmw_dmabuf_unreference(&du->cursor_dmabuf);
78 drm_connector_unregister(&du->connector);
79 drm_crtc_cleanup(&du->crtc);
80 drm_encoder_cleanup(&du->encoder);
81 drm_connector_cleanup(&du->connector);
82}
83
84
85
86
87
88int vmw_cursor_update_image(struct vmw_private *dev_priv,
89 u32 *image, u32 width, u32 height,
90 u32 hotspotX, u32 hotspotY)
91{
92 struct {
93 u32 cmd;
94 SVGAFifoCmdDefineAlphaCursor cursor;
95 } *cmd;
96 u32 image_size = width * height * 4;
97 u32 cmd_size = sizeof(*cmd) + image_size;
98
99 if (!image)
100 return -EINVAL;
101
102 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
103 if (unlikely(cmd == NULL)) {
104 DRM_ERROR("Fifo reserve failed.\n");
105 return -ENOMEM;
106 }
107
108 memset(cmd, 0, sizeof(*cmd));
109
110 memcpy(&cmd[1], image, image_size);
111
112 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
113 cmd->cursor.id = cpu_to_le32(0);
114 cmd->cursor.width = cpu_to_le32(width);
115 cmd->cursor.height = cpu_to_le32(height);
116 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
117 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
118
119 vmw_fifo_commit(dev_priv, cmd_size);
120
121 return 0;
122}
123
124int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
125 struct vmw_dma_buffer *dmabuf,
126 u32 width, u32 height,
127 u32 hotspotX, u32 hotspotY)
128{
129 struct ttm_bo_kmap_obj map;
130 unsigned long kmap_offset;
131 unsigned long kmap_num;
132 void *virtual;
133 bool dummy;
134 int ret;
135
136 kmap_offset = 0;
137 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
138
139 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
140 if (unlikely(ret != 0)) {
141 DRM_ERROR("reserve failed\n");
142 return -EINVAL;
143 }
144
145 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
146 if (unlikely(ret != 0))
147 goto err_unreserve;
148
149 virtual = ttm_kmap_obj_virtual(&map, &dummy);
150 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
151 hotspotX, hotspotY);
152
153 ttm_bo_kunmap(&map);
154err_unreserve:
155 ttm_bo_unreserve(&dmabuf->base);
156
157 return ret;
158}
159
160
161void vmw_cursor_update_position(struct vmw_private *dev_priv,
162 bool show, int x, int y)
163{
164 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
165 uint32_t count;
166
167 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
168 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
169 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
170 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
172}
173
174int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
175 uint32_t handle, uint32_t width, uint32_t height)
176{
177 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
178 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
179 struct vmw_surface *surface = NULL;
180 struct vmw_dma_buffer *dmabuf = NULL;
181 int ret;
182
183
184
185
186
187
188
189
190 drm_modeset_unlock_crtc(crtc);
191 drm_modeset_lock_all(dev_priv->dev);
192
193
194 if (handle && (width != 64 || height != 64)) {
195 ret = -EINVAL;
196 goto out;
197 }
198
199 if (handle) {
200 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
201
202 ret = vmw_user_lookup_handle(dev_priv, tfile,
203 handle, &surface, &dmabuf);
204 if (ret) {
205 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
206 ret = -EINVAL;
207 goto out;
208 }
209 }
210
211
212 if (surface && !surface->snooper.image) {
213 DRM_ERROR("surface not suitable for cursor\n");
214 vmw_surface_unreference(&surface);
215 ret = -EINVAL;
216 goto out;
217 }
218
219
220 if (du->cursor_surface) {
221 du->cursor_surface->snooper.crtc = NULL;
222 vmw_surface_unreference(&du->cursor_surface);
223 }
224 if (du->cursor_dmabuf)
225 vmw_dmabuf_unreference(&du->cursor_dmabuf);
226
227
228 if (surface) {
229
230 du->cursor_surface = surface;
231
232 du->cursor_surface->snooper.crtc = crtc;
233 du->cursor_age = du->cursor_surface->snooper.age;
234 vmw_cursor_update_image(dev_priv, surface->snooper.image,
235 64, 64, du->hotspot_x, du->hotspot_y);
236 } else if (dmabuf) {
237
238 du->cursor_dmabuf = dmabuf;
239
240 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
241 du->hotspot_x, du->hotspot_y);
242 } else {
243 vmw_cursor_update_position(dev_priv, false, 0, 0);
244 ret = 0;
245 goto out;
246 }
247
248 vmw_cursor_update_position(dev_priv, true,
249 du->cursor_x + du->hotspot_x,
250 du->cursor_y + du->hotspot_y);
251
252 ret = 0;
253out:
254 drm_modeset_unlock_all(dev_priv->dev);
255 drm_modeset_lock_crtc(crtc);
256
257 return ret;
258}
259
260int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
261{
262 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
263 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
264 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
265
266 du->cursor_x = x + crtc->x;
267 du->cursor_y = y + crtc->y;
268
269
270
271
272
273
274
275
276 drm_modeset_unlock_crtc(crtc);
277 drm_modeset_lock_all(dev_priv->dev);
278
279 vmw_cursor_update_position(dev_priv, shown,
280 du->cursor_x + du->hotspot_x,
281 du->cursor_y + du->hotspot_y);
282
283 drm_modeset_unlock_all(dev_priv->dev);
284 drm_modeset_lock_crtc(crtc);
285
286 return 0;
287}
288
289void vmw_kms_cursor_snoop(struct vmw_surface *srf,
290 struct ttm_object_file *tfile,
291 struct ttm_buffer_object *bo,
292 SVGA3dCmdHeader *header)
293{
294 struct ttm_bo_kmap_obj map;
295 unsigned long kmap_offset;
296 unsigned long kmap_num;
297 SVGA3dCopyBox *box;
298 unsigned box_count;
299 void *virtual;
300 bool dummy;
301 struct vmw_dma_cmd {
302 SVGA3dCmdHeader header;
303 SVGA3dCmdSurfaceDMA dma;
304 } *cmd;
305 int i, ret;
306
307 cmd = container_of(header, struct vmw_dma_cmd, header);
308
309
310 if (!srf->snooper.image)
311 return;
312
313 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
314 DRM_ERROR("face and mipmap for cursors should never != 0\n");
315 return;
316 }
317
318 if (cmd->header.size < 64) {
319 DRM_ERROR("at least one full copy box must be given\n");
320 return;
321 }
322
323 box = (SVGA3dCopyBox *)&cmd[1];
324 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
325 sizeof(SVGA3dCopyBox);
326
327 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
328 box->x != 0 || box->y != 0 || box->z != 0 ||
329 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
330 box->d != 1 || box_count != 1) {
331
332
333
334 DRM_ERROR("Cant snoop dma request for cursor!\n");
335 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
336 box->srcx, box->srcy, box->srcz,
337 box->x, box->y, box->z,
338 box->w, box->h, box->d, box_count,
339 cmd->dma.guest.ptr.offset);
340 return;
341 }
342
343 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
344 kmap_num = (64*64*4) >> PAGE_SHIFT;
345
346 ret = ttm_bo_reserve(bo, true, false, false, NULL);
347 if (unlikely(ret != 0)) {
348 DRM_ERROR("reserve failed\n");
349 return;
350 }
351
352 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
353 if (unlikely(ret != 0))
354 goto err_unreserve;
355
356 virtual = ttm_kmap_obj_virtual(&map, &dummy);
357
358 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
359 memcpy(srf->snooper.image, virtual, 64*64*4);
360 } else {
361
362 for (i = 0; i < box->h; i++)
363 memcpy(srf->snooper.image + i * 64,
364 virtual + i * cmd->dma.guest.pitch,
365 box->w * 4);
366 }
367
368 srf->snooper.age++;
369
370
371
372
373
374
375
376
377
378
379 ttm_bo_kunmap(&map);
380err_unreserve:
381 ttm_bo_unreserve(bo);
382}
383
384void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
385{
386 struct drm_device *dev = dev_priv->dev;
387 struct vmw_display_unit *du;
388 struct drm_crtc *crtc;
389
390 mutex_lock(&dev->mode_config.mutex);
391
392 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
393 du = vmw_crtc_to_du(crtc);
394 if (!du->cursor_surface ||
395 du->cursor_age == du->cursor_surface->snooper.age)
396 continue;
397
398 du->cursor_age = du->cursor_surface->snooper.age;
399 vmw_cursor_update_image(dev_priv,
400 du->cursor_surface->snooper.image,
401 64, 64, du->hotspot_x, du->hotspot_y);
402 }
403
404 mutex_unlock(&dev->mode_config.mutex);
405}
406
407
408
409
410
411
412
413
414
415#define vmw_framebuffer_to_vfbs(x) \
416 container_of(x, struct vmw_framebuffer_surface, base.base)
417
418struct vmw_framebuffer_surface {
419 struct vmw_framebuffer base;
420 struct vmw_surface *surface;
421 struct vmw_dma_buffer *buffer;
422 struct list_head head;
423 struct drm_master *master;
424};
425
426static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
427{
428 struct vmw_framebuffer_surface *vfbs =
429 vmw_framebuffer_to_vfbs(framebuffer);
430 struct vmw_master *vmaster = vmw_master(vfbs->master);
431
432
433 mutex_lock(&vmaster->fb_surf_mutex);
434 list_del(&vfbs->head);
435 mutex_unlock(&vmaster->fb_surf_mutex);
436
437 drm_master_put(&vfbs->master);
438 drm_framebuffer_cleanup(framebuffer);
439 vmw_surface_unreference(&vfbs->surface);
440 ttm_base_object_unref(&vfbs->base.user_obj);
441
442 kfree(vfbs);
443}
444
445static int do_surface_dirty_sou(struct vmw_private *dev_priv,
446 struct drm_file *file_priv,
447 struct vmw_framebuffer *framebuffer,
448 unsigned flags, unsigned color,
449 struct drm_clip_rect *clips,
450 unsigned num_clips, int inc,
451 struct vmw_fence_obj **out_fence)
452{
453 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
454 struct drm_clip_rect *clips_ptr;
455 struct drm_clip_rect *tmp;
456 struct drm_crtc *crtc;
457 size_t fifo_size;
458 int i, num_units;
459 int ret = 0;
460 int left, right, top, bottom;
461
462 struct {
463 SVGA3dCmdHeader header;
464 SVGA3dCmdBlitSurfaceToScreen body;
465 } *cmd;
466 SVGASignedRect *blits;
467
468 num_units = 0;
469 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
470 head) {
471 if (crtc->primary->fb != &framebuffer->base)
472 continue;
473 units[num_units++] = vmw_crtc_to_du(crtc);
474 }
475
476 BUG_ON(!clips || !num_clips);
477
478 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
479 if (unlikely(tmp == NULL)) {
480 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
481 return -ENOMEM;
482 }
483
484 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
485 cmd = kzalloc(fifo_size, GFP_KERNEL);
486 if (unlikely(cmd == NULL)) {
487 DRM_ERROR("Temporary fifo memory alloc failed.\n");
488 ret = -ENOMEM;
489 goto out_free_tmp;
490 }
491
492
493 blits = (SVGASignedRect *)&cmd[1];
494
495
496 left = clips->x1;
497 right = clips->x2;
498 top = clips->y1;
499 bottom = clips->y2;
500
501
502 for (i = 1, clips_ptr = clips + inc;
503 i < num_clips; i++, clips_ptr += inc) {
504 left = min_t(int, left, (int)clips_ptr->x1);
505 right = max_t(int, right, (int)clips_ptr->x2);
506 top = min_t(int, top, (int)clips_ptr->y1);
507 bottom = max_t(int, bottom, (int)clips_ptr->y2);
508 }
509
510
511 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
512 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
513
514 cmd->body.srcRect.left = left;
515 cmd->body.srcRect.right = right;
516 cmd->body.srcRect.top = top;
517 cmd->body.srcRect.bottom = bottom;
518
519 clips_ptr = clips;
520 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
521 tmp[i].x1 = clips_ptr->x1 - left;
522 tmp[i].x2 = clips_ptr->x2 - left;
523 tmp[i].y1 = clips_ptr->y1 - top;
524 tmp[i].y2 = clips_ptr->y2 - top;
525 }
526
527
528 for (i = 0; i < num_units; i++) {
529 struct vmw_display_unit *unit = units[i];
530 struct vmw_clip_rect clip;
531 int num;
532
533 clip.x1 = left - unit->crtc.x;
534 clip.y1 = top - unit->crtc.y;
535 clip.x2 = right - unit->crtc.x;
536 clip.y2 = bottom - unit->crtc.y;
537
538
539 if (clip.x1 >= unit->crtc.mode.hdisplay ||
540 clip.y1 >= unit->crtc.mode.vdisplay ||
541 clip.x2 <= 0 || clip.y2 <= 0)
542 continue;
543
544
545
546
547
548 cmd->body.destRect.left = clip.x1;
549 cmd->body.destRect.right = clip.x2;
550 cmd->body.destRect.top = clip.y1;
551 cmd->body.destRect.bottom = clip.y2;
552
553
554 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
555 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
556 clip.x1 = 0 - clip.x1;
557 clip.y1 = 0 - clip.y1;
558
559
560 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
561 cmd->body.destScreenId = unit->unit;
562
563
564 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
565
566
567 if (num == 0)
568 continue;
569
570
571 if (out_fence && *out_fence)
572 vmw_fence_obj_unreference(out_fence);
573
574
575 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
576 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
577 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
578 fifo_size, 0, NULL, out_fence);
579
580 if (unlikely(ret != 0))
581 break;
582 }
583
584
585 kfree(cmd);
586out_free_tmp:
587 kfree(tmp);
588
589 return ret;
590}
591
592static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
593 struct drm_file *file_priv,
594 unsigned flags, unsigned color,
595 struct drm_clip_rect *clips,
596 unsigned num_clips)
597{
598 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
599 struct vmw_framebuffer_surface *vfbs =
600 vmw_framebuffer_to_vfbs(framebuffer);
601 struct drm_clip_rect norect;
602 int ret, inc = 1;
603
604 if (unlikely(vfbs->master != file_priv->master))
605 return -EINVAL;
606
607
608 if (!dev_priv->sou_priv)
609 return -EINVAL;
610
611 drm_modeset_lock_all(dev_priv->dev);
612
613 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
614 if (unlikely(ret != 0)) {
615 drm_modeset_unlock_all(dev_priv->dev);
616 return ret;
617 }
618
619 if (!num_clips) {
620 num_clips = 1;
621 clips = &norect;
622 norect.x1 = norect.y1 = 0;
623 norect.x2 = framebuffer->width;
624 norect.y2 = framebuffer->height;
625 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
626 num_clips /= 2;
627 inc = 2;
628 }
629
630 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
631 flags, color,
632 clips, num_clips, inc, NULL);
633
634 ttm_read_unlock(&dev_priv->reservation_sem);
635
636 drm_modeset_unlock_all(dev_priv->dev);
637
638 return 0;
639}
640
641static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
642 .destroy = vmw_framebuffer_surface_destroy,
643 .dirty = vmw_framebuffer_surface_dirty,
644};
645
646static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
647 struct drm_file *file_priv,
648 struct vmw_surface *surface,
649 struct vmw_framebuffer **out,
650 const struct drm_mode_fb_cmd
651 *mode_cmd)
652
653{
654 struct drm_device *dev = dev_priv->dev;
655 struct vmw_framebuffer_surface *vfbs;
656 enum SVGA3dSurfaceFormat format;
657 struct vmw_master *vmaster = vmw_master(file_priv->master);
658 int ret;
659
660
661 if (!dev_priv->sou_priv)
662 return -ENOSYS;
663
664
665
666
667
668
669 if (unlikely(!surface->scanout))
670 return -EINVAL;
671
672 if (unlikely(surface->mip_levels[0] != 1 ||
673 surface->num_sizes != 1 ||
674 surface->base_size.width < mode_cmd->width ||
675 surface->base_size.height < mode_cmd->height ||
676 surface->base_size.depth != 1)) {
677 DRM_ERROR("Incompatible surface dimensions "
678 "for requested mode.\n");
679 return -EINVAL;
680 }
681
682 switch (mode_cmd->depth) {
683 case 32:
684 format = SVGA3D_A8R8G8B8;
685 break;
686 case 24:
687 format = SVGA3D_X8R8G8B8;
688 break;
689 case 16:
690 format = SVGA3D_R5G6B5;
691 break;
692 case 15:
693 format = SVGA3D_A1R5G5B5;
694 break;
695 case 8:
696 format = SVGA3D_LUMINANCE8;
697 break;
698 default:
699 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
700 return -EINVAL;
701 }
702
703 if (unlikely(format != surface->format)) {
704 DRM_ERROR("Invalid surface format for requested mode.\n");
705 return -EINVAL;
706 }
707
708 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
709 if (!vfbs) {
710 ret = -ENOMEM;
711 goto out_err1;
712 }
713
714 if (!vmw_surface_reference(surface)) {
715 DRM_ERROR("failed to reference surface %p\n", surface);
716 ret = -EINVAL;
717 goto out_err2;
718 }
719
720
721 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
722 vfbs->base.base.pitches[0] = mode_cmd->pitch;
723 vfbs->base.base.depth = mode_cmd->depth;
724 vfbs->base.base.width = mode_cmd->width;
725 vfbs->base.base.height = mode_cmd->height;
726 vfbs->surface = surface;
727 vfbs->base.user_handle = mode_cmd->handle;
728 vfbs->master = drm_master_get(file_priv->master);
729
730 mutex_lock(&vmaster->fb_surf_mutex);
731 list_add_tail(&vfbs->head, &vmaster->fb_surf);
732 mutex_unlock(&vmaster->fb_surf_mutex);
733
734 *out = &vfbs->base;
735
736 ret = drm_framebuffer_init(dev, &vfbs->base.base,
737 &vmw_framebuffer_surface_funcs);
738 if (ret)
739 goto out_err3;
740
741 return 0;
742
743out_err3:
744 vmw_surface_unreference(&surface);
745out_err2:
746 kfree(vfbs);
747out_err1:
748 return ret;
749}
750
751
752
753
754
755#define vmw_framebuffer_to_vfbd(x) \
756 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
757
758struct vmw_framebuffer_dmabuf {
759 struct vmw_framebuffer base;
760 struct vmw_dma_buffer *buffer;
761};
762
763static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
764{
765 struct vmw_framebuffer_dmabuf *vfbd =
766 vmw_framebuffer_to_vfbd(framebuffer);
767
768 drm_framebuffer_cleanup(framebuffer);
769 vmw_dmabuf_unreference(&vfbd->buffer);
770 ttm_base_object_unref(&vfbd->base.user_obj);
771
772 kfree(vfbd);
773}
774
775static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
776 struct vmw_framebuffer *framebuffer,
777 unsigned flags, unsigned color,
778 struct drm_clip_rect *clips,
779 unsigned num_clips, int increment)
780{
781 size_t fifo_size;
782 int i;
783
784 struct {
785 uint32_t header;
786 SVGAFifoCmdUpdate body;
787 } *cmd;
788
789 fifo_size = sizeof(*cmd) * num_clips;
790 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
791 if (unlikely(cmd == NULL)) {
792 DRM_ERROR("Fifo reserve failed.\n");
793 return -ENOMEM;
794 }
795
796 memset(cmd, 0, fifo_size);
797 for (i = 0; i < num_clips; i++, clips += increment) {
798 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
799 cmd[i].body.x = cpu_to_le32(clips->x1);
800 cmd[i].body.y = cpu_to_le32(clips->y1);
801 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
802 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
803 }
804
805 vmw_fifo_commit(dev_priv, fifo_size);
806 return 0;
807}
808
809static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
810 struct vmw_private *dev_priv,
811 struct vmw_framebuffer *framebuffer)
812{
813 int depth = framebuffer->base.depth;
814 size_t fifo_size;
815 int ret;
816
817 struct {
818 uint32_t header;
819 SVGAFifoCmdDefineGMRFB body;
820 } *cmd;
821
822
823
824
825
826 if (depth == 32)
827 depth = 24;
828
829 fifo_size = sizeof(*cmd);
830 cmd = kmalloc(fifo_size, GFP_KERNEL);
831 if (unlikely(cmd == NULL)) {
832 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
833 return -ENOMEM;
834 }
835
836 memset(cmd, 0, fifo_size);
837 cmd->header = SVGA_CMD_DEFINE_GMRFB;
838 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
839 cmd->body.format.colorDepth = depth;
840 cmd->body.format.reserved = 0;
841 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
842 cmd->body.ptr.gmrId = framebuffer->user_handle;
843 cmd->body.ptr.offset = 0;
844
845 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
846 fifo_size, 0, NULL, NULL);
847
848 kfree(cmd);
849
850 return ret;
851}
852
853static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
854 struct vmw_private *dev_priv,
855 struct vmw_framebuffer *framebuffer,
856 unsigned flags, unsigned color,
857 struct drm_clip_rect *clips,
858 unsigned num_clips, int increment,
859 struct vmw_fence_obj **out_fence)
860{
861 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
862 struct drm_clip_rect *clips_ptr;
863 int i, k, num_units, ret;
864 struct drm_crtc *crtc;
865 size_t fifo_size;
866
867 struct {
868 uint32_t header;
869 SVGAFifoCmdBlitGMRFBToScreen body;
870 } *blits;
871
872 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
873 if (unlikely(ret != 0))
874 return ret;
875
876 fifo_size = sizeof(*blits) * num_clips;
877 blits = kmalloc(fifo_size, GFP_KERNEL);
878 if (unlikely(blits == NULL)) {
879 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
880 return -ENOMEM;
881 }
882
883 num_units = 0;
884 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
885 if (crtc->primary->fb != &framebuffer->base)
886 continue;
887 units[num_units++] = vmw_crtc_to_du(crtc);
888 }
889
890 for (k = 0; k < num_units; k++) {
891 struct vmw_display_unit *unit = units[k];
892 int hit_num = 0;
893
894 clips_ptr = clips;
895 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
896 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
897 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
898 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
899 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
900 int move_x, move_y;
901
902
903 if (clip_x1 >= unit->crtc.mode.hdisplay ||
904 clip_y1 >= unit->crtc.mode.vdisplay ||
905 clip_x2 <= 0 || clip_y2 <= 0)
906 continue;
907
908
909 clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
910 clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
911
912
913 move_x = min_t(int, clip_x1, 0);
914 move_y = min_t(int, clip_y1, 0);
915
916
917 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
918 blits[hit_num].body.destScreenId = unit->unit;
919 blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
920 blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
921 blits[hit_num].body.destRect.left = clip_x1 - move_x;
922 blits[hit_num].body.destRect.top = clip_y1 - move_y;
923 blits[hit_num].body.destRect.right = clip_x2;
924 blits[hit_num].body.destRect.bottom = clip_y2;
925 hit_num++;
926 }
927
928
929 if (hit_num == 0)
930 continue;
931
932
933 if (out_fence && *out_fence)
934 vmw_fence_obj_unreference(out_fence);
935
936 fifo_size = sizeof(*blits) * hit_num;
937 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
938 fifo_size, 0, NULL, out_fence);
939
940 if (unlikely(ret != 0))
941 break;
942 }
943
944 kfree(blits);
945
946 return ret;
947}
948
949static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
950 struct drm_file *file_priv,
951 unsigned flags, unsigned color,
952 struct drm_clip_rect *clips,
953 unsigned num_clips)
954{
955 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
956 struct vmw_framebuffer_dmabuf *vfbd =
957 vmw_framebuffer_to_vfbd(framebuffer);
958 struct drm_clip_rect norect;
959 int ret, increment = 1;
960
961 drm_modeset_lock_all(dev_priv->dev);
962
963 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
964 if (unlikely(ret != 0)) {
965 drm_modeset_unlock_all(dev_priv->dev);
966 return ret;
967 }
968
969 if (!num_clips) {
970 num_clips = 1;
971 clips = &norect;
972 norect.x1 = norect.y1 = 0;
973 norect.x2 = framebuffer->width;
974 norect.y2 = framebuffer->height;
975 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
976 num_clips /= 2;
977 increment = 2;
978 }
979
980 if (dev_priv->ldu_priv) {
981 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
982 flags, color,
983 clips, num_clips, increment);
984 } else {
985 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
986 flags, color,
987 clips, num_clips, increment, NULL);
988 }
989
990 ttm_read_unlock(&dev_priv->reservation_sem);
991
992 drm_modeset_unlock_all(dev_priv->dev);
993
994 return ret;
995}
996
997static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
998 .destroy = vmw_framebuffer_dmabuf_destroy,
999 .dirty = vmw_framebuffer_dmabuf_dirty,
1000};
1001
1002
1003
1004
1005static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
1006{
1007 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1008 struct vmw_framebuffer_dmabuf *vfbd =
1009 vmw_framebuffer_to_vfbd(&vfb->base);
1010 int ret;
1011
1012
1013 BUG_ON(dev_priv->sou_priv);
1014
1015 vmw_overlay_pause_all(dev_priv);
1016
1017 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
1018
1019 vmw_overlay_resume_all(dev_priv);
1020
1021 WARN_ON(ret != 0);
1022
1023 return 0;
1024}
1025
1026static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
1027{
1028 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
1029 struct vmw_framebuffer_dmabuf *vfbd =
1030 vmw_framebuffer_to_vfbd(&vfb->base);
1031
1032 if (!vfbd->buffer) {
1033 WARN_ON(!vfbd->buffer);
1034 return 0;
1035 }
1036
1037 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
1038}
1039
1040static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
1041 struct vmw_dma_buffer *dmabuf,
1042 struct vmw_framebuffer **out,
1043 const struct drm_mode_fb_cmd
1044 *mode_cmd)
1045
1046{
1047 struct drm_device *dev = dev_priv->dev;
1048 struct vmw_framebuffer_dmabuf *vfbd;
1049 unsigned int requested_size;
1050 int ret;
1051
1052 requested_size = mode_cmd->height * mode_cmd->pitch;
1053 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
1054 DRM_ERROR("Screen buffer object size is too small "
1055 "for requested mode.\n");
1056 return -EINVAL;
1057 }
1058
1059
1060 if (dev_priv->sou_priv) {
1061 switch (mode_cmd->depth) {
1062 case 32:
1063 case 24:
1064
1065 if (mode_cmd->bpp == 32)
1066 break;
1067
1068 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1069 mode_cmd->depth, mode_cmd->bpp);
1070 return -EINVAL;
1071 case 16:
1072 case 15:
1073
1074 if (mode_cmd->bpp == 16)
1075 break;
1076
1077 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
1078 mode_cmd->depth, mode_cmd->bpp);
1079 return -EINVAL;
1080 default:
1081 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
1082 return -EINVAL;
1083 }
1084 }
1085
1086 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
1087 if (!vfbd) {
1088 ret = -ENOMEM;
1089 goto out_err1;
1090 }
1091
1092 if (!vmw_dmabuf_reference(dmabuf)) {
1093 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
1094 ret = -EINVAL;
1095 goto out_err2;
1096 }
1097
1098 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
1099 vfbd->base.base.pitches[0] = mode_cmd->pitch;
1100 vfbd->base.base.depth = mode_cmd->depth;
1101 vfbd->base.base.width = mode_cmd->width;
1102 vfbd->base.base.height = mode_cmd->height;
1103 if (!dev_priv->sou_priv) {
1104 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
1105 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
1106 }
1107 vfbd->base.dmabuf = true;
1108 vfbd->buffer = dmabuf;
1109 vfbd->base.user_handle = mode_cmd->handle;
1110 *out = &vfbd->base;
1111
1112 ret = drm_framebuffer_init(dev, &vfbd->base.base,
1113 &vmw_framebuffer_dmabuf_funcs);
1114 if (ret)
1115 goto out_err3;
1116
1117 return 0;
1118
1119out_err3:
1120 vmw_dmabuf_unreference(&dmabuf);
1121out_err2:
1122 kfree(vfbd);
1123out_err1:
1124 return ret;
1125}
1126
1127
1128
1129
1130
1131static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1132 struct drm_file *file_priv,
1133 struct drm_mode_fb_cmd2 *mode_cmd2)
1134{
1135 struct vmw_private *dev_priv = vmw_priv(dev);
1136 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1137 struct vmw_framebuffer *vfb = NULL;
1138 struct vmw_surface *surface = NULL;
1139 struct vmw_dma_buffer *bo = NULL;
1140 struct ttm_base_object *user_obj;
1141 struct drm_mode_fb_cmd mode_cmd;
1142 int ret;
1143
1144 mode_cmd.width = mode_cmd2->width;
1145 mode_cmd.height = mode_cmd2->height;
1146 mode_cmd.pitch = mode_cmd2->pitches[0];
1147 mode_cmd.handle = mode_cmd2->handles[0];
1148 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
1149 &mode_cmd.bpp);
1150
1151
1152
1153
1154
1155
1156
1157 if (!vmw_kms_validate_mode_vram(dev_priv,
1158 mode_cmd.pitch,
1159 mode_cmd.height)) {
1160 DRM_ERROR("VRAM size is too small for requested mode.\n");
1161 return ERR_PTR(-ENOMEM);
1162 }
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
1174 if (unlikely(user_obj == NULL)) {
1175 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1176 return ERR_PTR(-ENOENT);
1177 }
1178
1179
1180
1181
1182
1183
1184 ret = vmw_user_lookup_handle(dev_priv, tfile,
1185 mode_cmd.handle,
1186 &surface, &bo);
1187 if (ret)
1188 goto err_out;
1189
1190
1191 if (bo)
1192 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1193 &mode_cmd);
1194 else if (surface)
1195 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
1196 surface, &vfb, &mode_cmd);
1197 else
1198 BUG();
1199
1200err_out:
1201
1202 if (bo)
1203 vmw_dmabuf_unreference(&bo);
1204 if (surface)
1205 vmw_surface_unreference(&surface);
1206
1207 if (ret) {
1208 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1209 ttm_base_object_unref(&user_obj);
1210 return ERR_PTR(ret);
1211 } else
1212 vfb->user_obj = user_obj;
1213
1214 return &vfb->base;
1215}
1216
1217static const struct drm_mode_config_funcs vmw_kms_funcs = {
1218 .fb_create = vmw_kms_fb_create,
1219};
1220
1221int vmw_kms_present(struct vmw_private *dev_priv,
1222 struct drm_file *file_priv,
1223 struct vmw_framebuffer *vfb,
1224 struct vmw_surface *surface,
1225 uint32_t sid,
1226 int32_t destX, int32_t destY,
1227 struct drm_vmw_rect *clips,
1228 uint32_t num_clips)
1229{
1230 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1231 struct drm_clip_rect *tmp;
1232 struct drm_crtc *crtc;
1233 size_t fifo_size;
1234 int i, k, num_units;
1235 int ret = 0;
1236 int left, right, top, bottom;
1237
1238 struct {
1239 SVGA3dCmdHeader header;
1240 SVGA3dCmdBlitSurfaceToScreen body;
1241 } *cmd;
1242 SVGASignedRect *blits;
1243
1244 num_units = 0;
1245 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1246 if (crtc->primary->fb != &vfb->base)
1247 continue;
1248 units[num_units++] = vmw_crtc_to_du(crtc);
1249 }
1250
1251 BUG_ON(surface == NULL);
1252 BUG_ON(!clips || !num_clips);
1253
1254 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1255 if (unlikely(tmp == NULL)) {
1256 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1257 return -ENOMEM;
1258 }
1259
1260 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1261 cmd = kmalloc(fifo_size, GFP_KERNEL);
1262 if (unlikely(cmd == NULL)) {
1263 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1264 ret = -ENOMEM;
1265 goto out_free_tmp;
1266 }
1267
1268 left = clips->x;
1269 right = clips->x + clips->w;
1270 top = clips->y;
1271 bottom = clips->y + clips->h;
1272
1273 for (i = 1; i < num_clips; i++) {
1274 left = min_t(int, left, (int)clips[i].x);
1275 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1276 top = min_t(int, top, (int)clips[i].y);
1277 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1278 }
1279
1280
1281 memset(cmd, 0, fifo_size);
1282 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1283
1284 blits = (SVGASignedRect *)&cmd[1];
1285
1286 cmd->body.srcRect.left = left;
1287 cmd->body.srcRect.right = right;
1288 cmd->body.srcRect.top = top;
1289 cmd->body.srcRect.bottom = bottom;
1290
1291 for (i = 0; i < num_clips; i++) {
1292 tmp[i].x1 = clips[i].x - left;
1293 tmp[i].x2 = clips[i].x + clips[i].w - left;
1294 tmp[i].y1 = clips[i].y - top;
1295 tmp[i].y2 = clips[i].y + clips[i].h - top;
1296 }
1297
1298 for (k = 0; k < num_units; k++) {
1299 struct vmw_display_unit *unit = units[k];
1300 struct vmw_clip_rect clip;
1301 int num;
1302
1303 clip.x1 = left + destX - unit->crtc.x;
1304 clip.y1 = top + destY - unit->crtc.y;
1305 clip.x2 = right + destX - unit->crtc.x;
1306 clip.y2 = bottom + destY - unit->crtc.y;
1307
1308
1309 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1310 clip.y1 >= unit->crtc.mode.vdisplay ||
1311 clip.x2 <= 0 || clip.y2 <= 0)
1312 continue;
1313
1314
1315
1316
1317
1318 cmd->body.destRect.left = clip.x1;
1319 cmd->body.destRect.right = clip.x2;
1320 cmd->body.destRect.top = clip.y1;
1321 cmd->body.destRect.bottom = clip.y2;
1322
1323
1324 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1325 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1326 clip.x1 = 0 - clip.x1;
1327 clip.y1 = 0 - clip.y1;
1328
1329
1330 cmd->body.srcImage.sid = sid;
1331 cmd->body.destScreenId = unit->unit;
1332
1333
1334 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
1335
1336
1337 if (num == 0)
1338 continue;
1339
1340
1341 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1342 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1343 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1344 fifo_size, 0, NULL, NULL);
1345
1346 if (unlikely(ret != 0))
1347 break;
1348 }
1349
1350 kfree(cmd);
1351out_free_tmp:
1352 kfree(tmp);
1353
1354 return ret;
1355}
1356
1357int vmw_kms_readback(struct vmw_private *dev_priv,
1358 struct drm_file *file_priv,
1359 struct vmw_framebuffer *vfb,
1360 struct drm_vmw_fence_rep __user *user_fence_rep,
1361 struct drm_vmw_rect *clips,
1362 uint32_t num_clips)
1363{
1364 struct vmw_framebuffer_dmabuf *vfbd =
1365 vmw_framebuffer_to_vfbd(&vfb->base);
1366 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1367 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1368 struct drm_crtc *crtc;
1369 size_t fifo_size;
1370 int i, k, ret, num_units, blits_pos;
1371
1372 struct {
1373 uint32_t header;
1374 SVGAFifoCmdDefineGMRFB body;
1375 } *cmd;
1376 struct {
1377 uint32_t header;
1378 SVGAFifoCmdBlitScreenToGMRFB body;
1379 } *blits;
1380
1381 num_units = 0;
1382 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1383 if (crtc->primary->fb != &vfb->base)
1384 continue;
1385 units[num_units++] = vmw_crtc_to_du(crtc);
1386 }
1387
1388 BUG_ON(dmabuf == NULL);
1389 BUG_ON(!clips || !num_clips);
1390
1391
1392 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1393 cmd = kmalloc(fifo_size, GFP_KERNEL);
1394 if (unlikely(cmd == NULL)) {
1395 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1396 return -ENOMEM;
1397 }
1398
1399 memset(cmd, 0, fifo_size);
1400 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1401 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1402 cmd->body.format.colorDepth = vfb->base.depth;
1403 cmd->body.format.reserved = 0;
1404 cmd->body.bytesPerLine = vfb->base.pitches[0];
1405 cmd->body.ptr.gmrId = vfb->user_handle;
1406 cmd->body.ptr.offset = 0;
1407
1408 blits = (void *)&cmd[1];
1409 blits_pos = 0;
1410 for (i = 0; i < num_units; i++) {
1411 struct drm_vmw_rect *c = clips;
1412 for (k = 0; k < num_clips; k++, c++) {
1413
1414 int clip_x1 = c->x - units[i]->crtc.x;
1415 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1416 int clip_y1 = c->y - units[i]->crtc.y;
1417 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1418 int dest_x = c->x;
1419 int dest_y = c->y;
1420
1421
1422
1423
1424 if (clip_x1 < 0)
1425 dest_x += -clip_x1;
1426 if (clip_y1 < 0)
1427 dest_y += -clip_y1;
1428
1429
1430 clip_x1 = max(clip_x1, 0);
1431 clip_y1 = max(clip_y1, 0);
1432 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1433 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1434
1435
1436 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1437 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1438 clip_x2 <= 0 || clip_y2 <= 0)
1439 continue;
1440
1441 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1442 blits[blits_pos].body.srcScreenId = units[i]->unit;
1443 blits[blits_pos].body.destOrigin.x = dest_x;
1444 blits[blits_pos].body.destOrigin.y = dest_y;
1445
1446 blits[blits_pos].body.srcRect.left = clip_x1;
1447 blits[blits_pos].body.srcRect.top = clip_y1;
1448 blits[blits_pos].body.srcRect.right = clip_x2;
1449 blits[blits_pos].body.srcRect.bottom = clip_y2;
1450 blits_pos++;
1451 }
1452 }
1453
1454 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1455
1456 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1457 0, user_fence_rep, NULL);
1458
1459 kfree(cmd);
1460
1461 return ret;
1462}
1463
1464int vmw_kms_init(struct vmw_private *dev_priv)
1465{
1466 struct drm_device *dev = dev_priv->dev;
1467 int ret;
1468
1469 drm_mode_config_init(dev);
1470 dev->mode_config.funcs = &vmw_kms_funcs;
1471 dev->mode_config.min_width = 1;
1472 dev->mode_config.min_height = 1;
1473
1474 dev->mode_config.max_width = 8192;
1475 dev->mode_config.max_height = 8192;
1476
1477 ret = vmw_kms_init_screen_object_display(dev_priv);
1478 if (ret)
1479 (void)vmw_kms_init_legacy_display_system(dev_priv);
1480
1481 return 0;
1482}
1483
1484int vmw_kms_close(struct vmw_private *dev_priv)
1485{
1486
1487
1488
1489
1490
1491 drm_mode_config_cleanup(dev_priv->dev);
1492 if (dev_priv->sou_priv)
1493 vmw_kms_close_screen_object_display(dev_priv);
1494 else
1495 vmw_kms_close_legacy_display_system(dev_priv);
1496 return 0;
1497}
1498
1499int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1500 struct drm_file *file_priv)
1501{
1502 struct drm_vmw_cursor_bypass_arg *arg = data;
1503 struct vmw_display_unit *du;
1504 struct drm_crtc *crtc;
1505 int ret = 0;
1506
1507
1508 mutex_lock(&dev->mode_config.mutex);
1509 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1510
1511 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1512 du = vmw_crtc_to_du(crtc);
1513 du->hotspot_x = arg->xhot;
1514 du->hotspot_y = arg->yhot;
1515 }
1516
1517 mutex_unlock(&dev->mode_config.mutex);
1518 return 0;
1519 }
1520
1521 crtc = drm_crtc_find(dev, arg->crtc_id);
1522 if (!crtc) {
1523 ret = -ENOENT;
1524 goto out;
1525 }
1526
1527 du = vmw_crtc_to_du(crtc);
1528
1529 du->hotspot_x = arg->xhot;
1530 du->hotspot_y = arg->yhot;
1531
1532out:
1533 mutex_unlock(&dev->mode_config.mutex);
1534
1535 return ret;
1536}
1537
1538int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1539 unsigned width, unsigned height, unsigned pitch,
1540 unsigned bpp, unsigned depth)
1541{
1542 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1543 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1544 else if (vmw_fifo_have_pitchlock(vmw_priv))
1545 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1546 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1547 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1548 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1549
1550 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1551 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1552 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1553 return -EINVAL;
1554 }
1555
1556 return 0;
1557}
1558
1559int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1560{
1561 struct vmw_vga_topology_state *save;
1562 uint32_t i;
1563
1564 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1565 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1566 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1567 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1568 vmw_priv->vga_pitchlock =
1569 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1570 else if (vmw_fifo_have_pitchlock(vmw_priv))
1571 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1572 SVGA_FIFO_PITCHLOCK);
1573
1574 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1575 return 0;
1576
1577 vmw_priv->num_displays = vmw_read(vmw_priv,
1578 SVGA_REG_NUM_GUEST_DISPLAYS);
1579
1580 if (vmw_priv->num_displays == 0)
1581 vmw_priv->num_displays = 1;
1582
1583 for (i = 0; i < vmw_priv->num_displays; ++i) {
1584 save = &vmw_priv->vga_save[i];
1585 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1586 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1587 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1588 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1589 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1590 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1591 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1592 if (i == 0 && vmw_priv->num_displays == 1 &&
1593 save->width == 0 && save->height == 0) {
1594
1595
1596
1597
1598
1599
1600 save->width = vmw_priv->vga_width - save->pos_x;
1601 save->height = vmw_priv->vga_height - save->pos_y;
1602 }
1603 }
1604
1605 return 0;
1606}
1607
1608int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1609{
1610 struct vmw_vga_topology_state *save;
1611 uint32_t i;
1612
1613 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1614 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1615 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1616 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1617 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1618 vmw_priv->vga_pitchlock);
1619 else if (vmw_fifo_have_pitchlock(vmw_priv))
1620 iowrite32(vmw_priv->vga_pitchlock,
1621 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1622
1623 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1624 return 0;
1625
1626 for (i = 0; i < vmw_priv->num_displays; ++i) {
1627 save = &vmw_priv->vga_save[i];
1628 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1629 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1630 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1631 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1632 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1633 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1634 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1635 }
1636
1637 return 0;
1638}
1639
1640bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1641 uint32_t pitch,
1642 uint32_t height)
1643{
1644 return ((u64) pitch * (u64) height) < (u64) dev_priv->prim_bb_mem;
1645}
1646
1647
1648
1649
1650
1651u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1652{
1653 return 0;
1654}
1655
1656
1657
1658
1659int vmw_enable_vblank(struct drm_device *dev, int crtc)
1660{
1661 return -ENOSYS;
1662}
1663
1664
1665
1666
1667void vmw_disable_vblank(struct drm_device *dev, int crtc)
1668{
1669}
1670
1671
1672
1673
1674
1675
1676static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1677 struct drm_vmw_rect *rects)
1678{
1679 struct drm_device *dev = dev_priv->dev;
1680 struct vmw_display_unit *du;
1681 struct drm_connector *con;
1682
1683 mutex_lock(&dev->mode_config.mutex);
1684
1685#if 0
1686 {
1687 unsigned int i;
1688
1689 DRM_INFO("%s: new layout ", __func__);
1690 for (i = 0; i < num; i++)
1691 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1692 rects[i].w, rects[i].h);
1693 DRM_INFO("\n");
1694 }
1695#endif
1696
1697 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1698 du = vmw_connector_to_du(con);
1699 if (num > du->unit) {
1700 du->pref_width = rects[du->unit].w;
1701 du->pref_height = rects[du->unit].h;
1702 du->pref_active = true;
1703 du->gui_x = rects[du->unit].x;
1704 du->gui_y = rects[du->unit].y;
1705 } else {
1706 du->pref_width = 800;
1707 du->pref_height = 600;
1708 du->pref_active = false;
1709 }
1710 con->status = vmw_du_connector_detect(con, true);
1711 }
1712
1713 mutex_unlock(&dev->mode_config.mutex);
1714
1715 return 0;
1716}
1717
1718int vmw_du_page_flip(struct drm_crtc *crtc,
1719 struct drm_framebuffer *fb,
1720 struct drm_pending_vblank_event *event,
1721 uint32_t page_flip_flags)
1722{
1723 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1724 struct drm_framebuffer *old_fb = crtc->primary->fb;
1725 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
1726 struct drm_file *file_priv ;
1727 struct vmw_fence_obj *fence = NULL;
1728 struct drm_clip_rect clips;
1729 int ret;
1730
1731 if (event == NULL)
1732 return -EINVAL;
1733
1734
1735 if (!dev_priv->sou_priv)
1736 return -ENOSYS;
1737
1738 file_priv = event->base.file_priv;
1739 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1740 return -EINVAL;
1741
1742 crtc->primary->fb = fb;
1743
1744
1745 clips.x1 = clips.y1 = 0;
1746 clips.x2 = fb->width;
1747 clips.y2 = fb->height;
1748
1749 if (vfb->dmabuf)
1750 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
1751 0, 0, &clips, 1, 1, &fence);
1752 else
1753 ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
1754 0, 0, &clips, 1, 1, &fence);
1755
1756
1757 if (ret != 0)
1758 goto out_no_fence;
1759 if (!fence) {
1760 ret = -EINVAL;
1761 goto out_no_fence;
1762 }
1763
1764 ret = vmw_event_fence_action_queue(file_priv, fence,
1765 &event->base,
1766 &event->event.tv_sec,
1767 &event->event.tv_usec,
1768 true);
1769
1770
1771
1772
1773
1774 vmw_fence_obj_unreference(&fence);
1775
1776 if (vmw_crtc_to_du(crtc)->is_implicit)
1777 vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
1778
1779 return ret;
1780
1781out_no_fence:
1782 crtc->primary->fb = old_fb;
1783 return ret;
1784}
1785
1786
1787void vmw_du_crtc_save(struct drm_crtc *crtc)
1788{
1789}
1790
1791void vmw_du_crtc_restore(struct drm_crtc *crtc)
1792{
1793}
1794
1795void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1796 u16 *r, u16 *g, u16 *b,
1797 uint32_t start, uint32_t size)
1798{
1799 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1800 int i;
1801
1802 for (i = 0; i < size; i++) {
1803 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1804 r[i], g[i], b[i]);
1805 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1806 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1807 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1808 }
1809}
1810
1811void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1812{
1813}
1814
1815void vmw_du_connector_save(struct drm_connector *connector)
1816{
1817}
1818
1819void vmw_du_connector_restore(struct drm_connector *connector)
1820{
1821}
1822
1823enum drm_connector_status
1824vmw_du_connector_detect(struct drm_connector *connector, bool force)
1825{
1826 uint32_t num_displays;
1827 struct drm_device *dev = connector->dev;
1828 struct vmw_private *dev_priv = vmw_priv(dev);
1829 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1830
1831 mutex_lock(&dev_priv->hw_mutex);
1832 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1833 mutex_unlock(&dev_priv->hw_mutex);
1834
1835 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1836 du->pref_active) ?
1837 connector_status_connected : connector_status_disconnected);
1838}
1839
1840static struct drm_display_mode vmw_kms_connector_builtin[] = {
1841
1842 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1843 752, 800, 0, 480, 489, 492, 525, 0,
1844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1845
1846 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1847 968, 1056, 0, 600, 601, 605, 628, 0,
1848 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1849
1850 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1851 1184, 1344, 0, 768, 771, 777, 806, 0,
1852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1853
1854 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1855 1344, 1600, 0, 864, 865, 868, 900, 0,
1856 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857
1858 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1859 1472, 1664, 0, 768, 771, 778, 798, 0,
1860 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1861
1862 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1863 1480, 1680, 0, 800, 803, 809, 831, 0,
1864 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1865
1866 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1867 1488, 1800, 0, 960, 961, 964, 1000, 0,
1868 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1869
1870 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1871 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1872 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1873
1874 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1875 1536, 1792, 0, 768, 771, 777, 795, 0,
1876 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1877
1878 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1879 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1880 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881
1882 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1883 1672, 1904, 0, 900, 903, 909, 934, 0,
1884 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1885
1886 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1887 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1888 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1889
1890 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1891 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1892 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1893
1894 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1895 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1897
1898 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1899 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1900 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1901
1902 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1903 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1905
1906 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1907 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1908 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1909
1910 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1911 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1912 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1913
1914 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1915};
1916
1917
1918
1919
1920
1921
1922
1923
1924static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1925{
1926 mode->hsync_start = mode->hdisplay + 50;
1927 mode->hsync_end = mode->hsync_start + 50;
1928 mode->htotal = mode->hsync_end + 50;
1929
1930 mode->vsync_start = mode->vdisplay + 50;
1931 mode->vsync_end = mode->vsync_start + 50;
1932 mode->vtotal = mode->vsync_end + 50;
1933
1934 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1935 mode->vrefresh = drm_mode_vrefresh(mode);
1936}
1937
1938
1939int vmw_du_connector_fill_modes(struct drm_connector *connector,
1940 uint32_t max_width, uint32_t max_height)
1941{
1942 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1943 struct drm_device *dev = connector->dev;
1944 struct vmw_private *dev_priv = vmw_priv(dev);
1945 struct drm_display_mode *mode = NULL;
1946 struct drm_display_mode *bmode;
1947 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1948 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1949 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1950 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1951 };
1952 int i;
1953 u32 assumed_bpp = 2;
1954
1955
1956
1957
1958
1959 if (dev_priv->sou_priv)
1960 assumed_bpp = 4;
1961
1962
1963 {
1964 mode = drm_mode_duplicate(dev, &prefmode);
1965 if (!mode)
1966 return 0;
1967 mode->hdisplay = du->pref_width;
1968 mode->vdisplay = du->pref_height;
1969 vmw_guess_mode_timing(mode);
1970
1971 if (vmw_kms_validate_mode_vram(dev_priv,
1972 mode->hdisplay * assumed_bpp,
1973 mode->vdisplay)) {
1974 drm_mode_probed_add(connector, mode);
1975 } else {
1976 drm_mode_destroy(dev, mode);
1977 mode = NULL;
1978 }
1979
1980 if (du->pref_mode) {
1981 list_del_init(&du->pref_mode->head);
1982 drm_mode_destroy(dev, du->pref_mode);
1983 }
1984
1985
1986 du->pref_mode = mode;
1987 }
1988
1989 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1990 bmode = &vmw_kms_connector_builtin[i];
1991 if (bmode->hdisplay > max_width ||
1992 bmode->vdisplay > max_height)
1993 continue;
1994
1995 if (!vmw_kms_validate_mode_vram(dev_priv,
1996 bmode->hdisplay * assumed_bpp,
1997 bmode->vdisplay))
1998 continue;
1999
2000 mode = drm_mode_duplicate(dev, bmode);
2001 if (!mode)
2002 return 0;
2003 mode->vrefresh = drm_mode_vrefresh(mode);
2004
2005 drm_mode_probed_add(connector, mode);
2006 }
2007
2008
2009 if (du->pref_mode)
2010 list_move(&du->pref_mode->head, &connector->probed_modes);
2011
2012 drm_mode_connector_list_update(connector, true);
2013
2014 return 1;
2015}
2016
2017int vmw_du_connector_set_property(struct drm_connector *connector,
2018 struct drm_property *property,
2019 uint64_t val)
2020{
2021 return 0;
2022}
2023
2024
2025int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2026 struct drm_file *file_priv)
2027{
2028 struct vmw_private *dev_priv = vmw_priv(dev);
2029 struct drm_vmw_update_layout_arg *arg =
2030 (struct drm_vmw_update_layout_arg *)data;
2031 void __user *user_rects;
2032 struct drm_vmw_rect *rects;
2033 unsigned rects_size;
2034 int ret;
2035 int i;
2036 struct drm_mode_config *mode_config = &dev->mode_config;
2037
2038 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2039 if (unlikely(ret != 0))
2040 return ret;
2041
2042 if (!arg->num_outputs) {
2043 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2044 vmw_du_update_layout(dev_priv, 1, &def_rect);
2045 goto out_unlock;
2046 }
2047
2048 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
2049 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2050 GFP_KERNEL);
2051 if (unlikely(!rects)) {
2052 ret = -ENOMEM;
2053 goto out_unlock;
2054 }
2055
2056 user_rects = (void __user *)(unsigned long)arg->rects;
2057 ret = copy_from_user(rects, user_rects, rects_size);
2058 if (unlikely(ret != 0)) {
2059 DRM_ERROR("Failed to get rects.\n");
2060 ret = -EFAULT;
2061 goto out_free;
2062 }
2063
2064 for (i = 0; i < arg->num_outputs; ++i) {
2065 if (rects[i].x < 0 ||
2066 rects[i].y < 0 ||
2067 rects[i].x + rects[i].w > mode_config->max_width ||
2068 rects[i].y + rects[i].h > mode_config->max_height) {
2069 DRM_ERROR("Invalid GUI layout.\n");
2070 ret = -EINVAL;
2071 goto out_free;
2072 }
2073 }
2074
2075 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
2076
2077out_free:
2078 kfree(rects);
2079out_unlock:
2080 ttm_read_unlock(&dev_priv->reservation_sem);
2081 return ret;
2082}
2083