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7#ifndef _8390_h
8#define _8390_h
9
10#include <linux/if_ether.h>
11#include <linux/ioport.h>
12#include <linux/irqreturn.h>
13#include <linux/skbuff.h>
14
15#define TX_PAGES 12
16
17
18struct e8390_pkt_hdr {
19 unsigned char status;
20 unsigned char next;
21 unsigned short count;
22};
23
24#ifdef CONFIG_NET_POLL_CONTROLLER
25void ei_poll(struct net_device *dev);
26void eip_poll(struct net_device *dev);
27#endif
28
29
30
31void NS8390_init(struct net_device *dev, int startp);
32int ei_open(struct net_device *dev);
33int ei_close(struct net_device *dev);
34irqreturn_t ei_interrupt(int irq, void *dev_id);
35void ei_tx_timeout(struct net_device *dev);
36netdev_tx_t ei_start_xmit(struct sk_buff *skb, struct net_device *dev);
37void ei_set_multicast_list(struct net_device *dev);
38struct net_device_stats *ei_get_stats(struct net_device *dev);
39
40extern const struct net_device_ops ei_netdev_ops;
41
42struct net_device *__alloc_ei_netdev(int size);
43static inline struct net_device *alloc_ei_netdev(void)
44{
45 return __alloc_ei_netdev(0);
46}
47
48
49void NS8390p_init(struct net_device *dev, int startp);
50int eip_open(struct net_device *dev);
51int eip_close(struct net_device *dev);
52irqreturn_t eip_interrupt(int irq, void *dev_id);
53void eip_tx_timeout(struct net_device *dev);
54netdev_tx_t eip_start_xmit(struct sk_buff *skb, struct net_device *dev);
55void eip_set_multicast_list(struct net_device *dev);
56struct net_device_stats *eip_get_stats(struct net_device *dev);
57
58extern const struct net_device_ops eip_netdev_ops;
59
60struct net_device *__alloc_eip_netdev(int size);
61static inline struct net_device *alloc_eip_netdev(void)
62{
63 return __alloc_eip_netdev(0);
64}
65
66
67struct ei_device {
68 const char *name;
69 void (*reset_8390)(struct net_device *);
70 void (*get_8390_hdr)(struct net_device *, struct e8390_pkt_hdr *, int);
71 void (*block_output)(struct net_device *, int, const unsigned char *, int);
72 void (*block_input)(struct net_device *, int, struct sk_buff *, int);
73 unsigned long rmem_start;
74 unsigned long rmem_end;
75 void __iomem *mem;
76 unsigned char mcfilter[8];
77 unsigned open:1;
78 unsigned word16:1;
79 unsigned bigendian:1;
80
81 unsigned txing:1;
82 unsigned irqlock:1;
83 unsigned dmaing:1;
84 unsigned char tx_start_page, rx_start_page, stop_page;
85 unsigned char current_page;
86 unsigned char interface_num;
87 unsigned char txqueue;
88 short tx1, tx2;
89 short lasttx;
90 unsigned char reg0;
91 unsigned char reg5;
92 unsigned char saved_irq;
93 u32 *reg_offset;
94 spinlock_t page_lock;
95 unsigned long priv;
96 u32 msg_enable;
97#ifdef AX88796_PLATFORM
98 unsigned char rxcr_base;
99#endif
100};
101
102
103#define MAX_SERVICE 12
104
105
106#define TX_TIMEOUT (20*HZ/100)
107
108#define ei_status (*(struct ei_device *)netdev_priv(dev))
109
110
111#define E8390_TX_IRQ_MASK 0xa
112#define E8390_RX_IRQ_MASK 0x5
113
114#ifdef AX88796_PLATFORM
115#define E8390_RXCONFIG (ei_status.rxcr_base | 0x04)
116#define E8390_RXOFF (ei_status.rxcr_base | 0x20)
117#else
118#define E8390_RXCONFIG 0x4
119#define E8390_RXOFF 0x20
120#endif
121
122#define E8390_TXCONFIG 0x00
123#define E8390_TXOFF 0x02
124
125
126
127#define E8390_STOP 0x01
128#define E8390_START 0x02
129#define E8390_TRANS 0x04
130#define E8390_RREAD 0x08
131#define E8390_RWRITE 0x10
132#define E8390_NODMA 0x20
133#define E8390_PAGE0 0x00
134#define E8390_PAGE1 0x40
135#define E8390_PAGE2 0x80
136
137
138
139
140
141
142
143#ifndef ei_inb
144#define ei_inb(_p) inb(_p)
145#define ei_outb(_v,_p) outb(_v,_p)
146#define ei_inb_p(_p) inb(_p)
147#define ei_outb_p(_v,_p) outb(_v,_p)
148#endif
149
150#ifndef EI_SHIFT
151#define EI_SHIFT(x) (x)
152#endif
153
154#define E8390_CMD EI_SHIFT(0x00)
155
156#define EN0_CLDALO EI_SHIFT(0x01)
157#define EN0_STARTPG EI_SHIFT(0x01)
158#define EN0_CLDAHI EI_SHIFT(0x02)
159#define EN0_STOPPG EI_SHIFT(0x02)
160#define EN0_BOUNDARY EI_SHIFT(0x03)
161#define EN0_TSR EI_SHIFT(0x04)
162#define EN0_TPSR EI_SHIFT(0x04)
163#define EN0_NCR EI_SHIFT(0x05)
164#define EN0_TCNTLO EI_SHIFT(0x05)
165#define EN0_FIFO EI_SHIFT(0x06)
166#define EN0_TCNTHI EI_SHIFT(0x06)
167#define EN0_ISR EI_SHIFT(0x07)
168#define EN0_CRDALO EI_SHIFT(0x08)
169#define EN0_RSARLO EI_SHIFT(0x08)
170#define EN0_CRDAHI EI_SHIFT(0x09)
171#define EN0_RSARHI EI_SHIFT(0x09)
172#define EN0_RCNTLO EI_SHIFT(0x0a)
173#define EN0_RCNTHI EI_SHIFT(0x0b)
174#define EN0_RSR EI_SHIFT(0x0c)
175#define EN0_RXCR EI_SHIFT(0x0c)
176#define EN0_TXCR EI_SHIFT(0x0d)
177#define EN0_COUNTER0 EI_SHIFT(0x0d)
178#define EN0_DCFG EI_SHIFT(0x0e)
179#define EN0_COUNTER1 EI_SHIFT(0x0e)
180#define EN0_IMR EI_SHIFT(0x0f)
181#define EN0_COUNTER2 EI_SHIFT(0x0f)
182
183
184#define ENISR_RX 0x01
185#define ENISR_TX 0x02
186#define ENISR_RX_ERR 0x04
187#define ENISR_TX_ERR 0x08
188#define ENISR_OVER 0x10
189#define ENISR_COUNTERS 0x20
190#define ENISR_RDC 0x40
191#define ENISR_RESET 0x80
192#define ENISR_ALL 0x3f
193
194
195#define ENDCFG_WTS 0x01
196#define ENDCFG_BOS 0x02
197
198
199#define EN1_PHYS EI_SHIFT(0x01)
200#define EN1_PHYS_SHIFT(i) EI_SHIFT(i+1)
201#define EN1_CURPAG EI_SHIFT(0x07)
202#define EN1_MULT EI_SHIFT(0x08)
203#define EN1_MULT_SHIFT(i) EI_SHIFT(8+i)
204
205
206#define ENRSR_RXOK 0x01
207#define ENRSR_CRC 0x02
208#define ENRSR_FAE 0x04
209#define ENRSR_FO 0x08
210#define ENRSR_MPA 0x10
211#define ENRSR_PHY 0x20
212#define ENRSR_DIS 0x40
213#define ENRSR_DEF 0x80
214
215
216#define ENTSR_PTX 0x01
217#define ENTSR_ND 0x02
218#define ENTSR_COL 0x04
219#define ENTSR_ABT 0x08
220#define ENTSR_CRS 0x10
221#define ENTSR_FU 0x20
222#define ENTSR_CDH 0x40
223#define ENTSR_OWC 0x80
224
225#endif
226