1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117#include <linux/spinlock.h>
118#include <linux/tcp.h>
119#include <linux/if_vlan.h>
120#include <net/busy_poll.h>
121#include <linux/clk.h>
122#include <linux/if_ether.h>
123#include <linux/net_tstamp.h>
124#include <linux/phy.h>
125
126#include "xgbe.h"
127#include "xgbe-common.h"
128
129static int xgbe_poll(struct napi_struct *, int);
130static void xgbe_set_rx_mode(struct net_device *);
131
132static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
133{
134 return (ring->rdesc_count - (ring->cur - ring->dirty));
135}
136
137static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)
138{
139 unsigned int rx_buf_size;
140
141 if (mtu > XGMAC_JUMBO_PACKET_MTU) {
142 netdev_alert(netdev, "MTU exceeds maximum supported value\n");
143 return -EINVAL;
144 }
145
146 rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
147 if (rx_buf_size < XGBE_RX_MIN_BUF_SIZE)
148 rx_buf_size = XGBE_RX_MIN_BUF_SIZE;
149 rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) &
150 ~(XGBE_RX_BUF_ALIGN - 1);
151
152 return rx_buf_size;
153}
154
155static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)
156{
157 struct xgbe_hw_if *hw_if = &pdata->hw_if;
158 struct xgbe_channel *channel;
159 enum xgbe_int int_id;
160 unsigned int i;
161
162 channel = pdata->channel;
163 for (i = 0; i < pdata->channel_count; i++, channel++) {
164 if (channel->tx_ring && channel->rx_ring)
165 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
166 else if (channel->tx_ring)
167 int_id = XGMAC_INT_DMA_CH_SR_TI;
168 else if (channel->rx_ring)
169 int_id = XGMAC_INT_DMA_CH_SR_RI;
170 else
171 continue;
172
173 hw_if->enable_int(channel, int_id);
174 }
175}
176
177static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)
178{
179 struct xgbe_hw_if *hw_if = &pdata->hw_if;
180 struct xgbe_channel *channel;
181 enum xgbe_int int_id;
182 unsigned int i;
183
184 channel = pdata->channel;
185 for (i = 0; i < pdata->channel_count; i++, channel++) {
186 if (channel->tx_ring && channel->rx_ring)
187 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
188 else if (channel->tx_ring)
189 int_id = XGMAC_INT_DMA_CH_SR_TI;
190 else if (channel->rx_ring)
191 int_id = XGMAC_INT_DMA_CH_SR_RI;
192 else
193 continue;
194
195 hw_if->disable_int(channel, int_id);
196 }
197}
198
199static irqreturn_t xgbe_isr(int irq, void *data)
200{
201 struct xgbe_prv_data *pdata = data;
202 struct xgbe_hw_if *hw_if = &pdata->hw_if;
203 struct xgbe_channel *channel;
204 unsigned int dma_isr, dma_ch_isr;
205 unsigned int mac_isr, mac_tssr;
206 unsigned int i;
207
208
209
210
211
212 dma_isr = XGMAC_IOREAD(pdata, DMA_ISR);
213 if (!dma_isr)
214 goto isr_done;
215
216 DBGPR("-->xgbe_isr\n");
217
218 DBGPR(" DMA_ISR = %08x\n", dma_isr);
219 DBGPR(" DMA_DS0 = %08x\n", XGMAC_IOREAD(pdata, DMA_DSR0));
220 DBGPR(" DMA_DS1 = %08x\n", XGMAC_IOREAD(pdata, DMA_DSR1));
221
222 for (i = 0; i < pdata->channel_count; i++) {
223 if (!(dma_isr & (1 << i)))
224 continue;
225
226 channel = pdata->channel + i;
227
228 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
229 DBGPR(" DMA_CH%u_ISR = %08x\n", i, dma_ch_isr);
230
231 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
232 XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI)) {
233 if (napi_schedule_prep(&pdata->napi)) {
234
235 xgbe_disable_rx_tx_ints(pdata);
236
237
238 __napi_schedule(&pdata->napi);
239 }
240 }
241
242
243 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
244 schedule_work(&pdata->restart_work);
245
246
247 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
248 }
249
250 if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {
251 mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);
252
253 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))
254 hw_if->tx_mmc_int(pdata);
255
256 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS))
257 hw_if->rx_mmc_int(pdata);
258
259 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {
260 mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);
261
262 if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {
263
264 pdata->tx_tstamp =
265 hw_if->get_tx_tstamp(pdata);
266 schedule_work(&pdata->tx_tstamp_work);
267 }
268 }
269 }
270
271 DBGPR(" DMA_ISR = %08x\n", XGMAC_IOREAD(pdata, DMA_ISR));
272
273 DBGPR("<--xgbe_isr\n");
274
275isr_done:
276 return IRQ_HANDLED;
277}
278
279static enum hrtimer_restart xgbe_tx_timer(struct hrtimer *timer)
280{
281 struct xgbe_channel *channel = container_of(timer,
282 struct xgbe_channel,
283 tx_timer);
284 struct xgbe_ring *ring = channel->tx_ring;
285 struct xgbe_prv_data *pdata = channel->pdata;
286 unsigned long flags;
287
288 DBGPR("-->xgbe_tx_timer\n");
289
290 spin_lock_irqsave(&ring->lock, flags);
291
292 if (napi_schedule_prep(&pdata->napi)) {
293
294 xgbe_disable_rx_tx_ints(pdata);
295
296
297 __napi_schedule(&pdata->napi);
298 }
299
300 channel->tx_timer_active = 0;
301
302 spin_unlock_irqrestore(&ring->lock, flags);
303
304 DBGPR("<--xgbe_tx_timer\n");
305
306 return HRTIMER_NORESTART;
307}
308
309static void xgbe_init_tx_timers(struct xgbe_prv_data *pdata)
310{
311 struct xgbe_channel *channel;
312 unsigned int i;
313
314 DBGPR("-->xgbe_init_tx_timers\n");
315
316 channel = pdata->channel;
317 for (i = 0; i < pdata->channel_count; i++, channel++) {
318 if (!channel->tx_ring)
319 break;
320
321 DBGPR(" %s adding tx timer\n", channel->name);
322 hrtimer_init(&channel->tx_timer, CLOCK_MONOTONIC,
323 HRTIMER_MODE_REL);
324 channel->tx_timer.function = xgbe_tx_timer;
325 }
326
327 DBGPR("<--xgbe_init_tx_timers\n");
328}
329
330static void xgbe_stop_tx_timers(struct xgbe_prv_data *pdata)
331{
332 struct xgbe_channel *channel;
333 unsigned int i;
334
335 DBGPR("-->xgbe_stop_tx_timers\n");
336
337 channel = pdata->channel;
338 for (i = 0; i < pdata->channel_count; i++, channel++) {
339 if (!channel->tx_ring)
340 break;
341
342 DBGPR(" %s deleting tx timer\n", channel->name);
343 channel->tx_timer_active = 0;
344 hrtimer_cancel(&channel->tx_timer);
345 }
346
347 DBGPR("<--xgbe_stop_tx_timers\n");
348}
349
350void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
351{
352 unsigned int mac_hfr0, mac_hfr1, mac_hfr2;
353 struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
354
355 DBGPR("-->xgbe_get_all_hw_features\n");
356
357 mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);
358 mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);
359 mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);
360
361 memset(hw_feat, 0, sizeof(*hw_feat));
362
363 hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
364
365
366 hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
367 hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
368 hw_feat->sma = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL);
369 hw_feat->rwk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL);
370 hw_feat->mgk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL);
371 hw_feat->mmc = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL);
372 hw_feat->aoe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL);
373 hw_feat->ts = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL);
374 hw_feat->eee = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL);
375 hw_feat->tx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL);
376 hw_feat->rx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL);
377 hw_feat->addn_mac = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R,
378 ADDMACADRSEL);
379 hw_feat->ts_src = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);
380 hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);
381
382
383 hw_feat->rx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
384 RXFIFOSIZE);
385 hw_feat->tx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
386 TXFIFOSIZE);
387 hw_feat->dcb = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
388 hw_feat->sph = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
389 hw_feat->tso = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
390 hw_feat->dma_debug = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA);
391 hw_feat->tc_cnt = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC);
392 hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
393 HASHTBLSZ);
394 hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
395 L3L4FNUM);
396
397
398 hw_feat->rx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT);
399 hw_feat->tx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT);
400 hw_feat->rx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT);
401 hw_feat->tx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT);
402 hw_feat->pps_out_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);
403 hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);
404
405
406 switch (hw_feat->hash_table_size) {
407 case 0:
408 break;
409 case 1:
410 hw_feat->hash_table_size = 64;
411 break;
412 case 2:
413 hw_feat->hash_table_size = 128;
414 break;
415 case 3:
416 hw_feat->hash_table_size = 256;
417 break;
418 }
419
420
421
422
423 hw_feat->rx_q_cnt++;
424 hw_feat->tx_q_cnt++;
425 hw_feat->rx_ch_cnt++;
426 hw_feat->tx_ch_cnt++;
427
428 DBGPR("<--xgbe_get_all_hw_features\n");
429}
430
431static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)
432{
433 if (add)
434 netif_napi_add(pdata->netdev, &pdata->napi, xgbe_poll,
435 NAPI_POLL_WEIGHT);
436 napi_enable(&pdata->napi);
437}
438
439static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
440{
441 napi_disable(&pdata->napi);
442
443 if (del)
444 netif_napi_del(&pdata->napi);
445}
446
447void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
448{
449 struct xgbe_hw_if *hw_if = &pdata->hw_if;
450
451 DBGPR("-->xgbe_init_tx_coalesce\n");
452
453 pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS;
454 pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES;
455
456 hw_if->config_tx_coalesce(pdata);
457
458 DBGPR("<--xgbe_init_tx_coalesce\n");
459}
460
461void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)
462{
463 struct xgbe_hw_if *hw_if = &pdata->hw_if;
464
465 DBGPR("-->xgbe_init_rx_coalesce\n");
466
467 pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
468 pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
469
470 hw_if->config_rx_coalesce(pdata);
471
472 DBGPR("<--xgbe_init_rx_coalesce\n");
473}
474
475static void xgbe_free_tx_skbuff(struct xgbe_prv_data *pdata)
476{
477 struct xgbe_desc_if *desc_if = &pdata->desc_if;
478 struct xgbe_channel *channel;
479 struct xgbe_ring *ring;
480 struct xgbe_ring_data *rdata;
481 unsigned int i, j;
482
483 DBGPR("-->xgbe_free_tx_skbuff\n");
484
485 channel = pdata->channel;
486 for (i = 0; i < pdata->channel_count; i++, channel++) {
487 ring = channel->tx_ring;
488 if (!ring)
489 break;
490
491 for (j = 0; j < ring->rdesc_count; j++) {
492 rdata = XGBE_GET_DESC_DATA(ring, j);
493 desc_if->unmap_skb(pdata, rdata);
494 }
495 }
496
497 DBGPR("<--xgbe_free_tx_skbuff\n");
498}
499
500static void xgbe_free_rx_skbuff(struct xgbe_prv_data *pdata)
501{
502 struct xgbe_desc_if *desc_if = &pdata->desc_if;
503 struct xgbe_channel *channel;
504 struct xgbe_ring *ring;
505 struct xgbe_ring_data *rdata;
506 unsigned int i, j;
507
508 DBGPR("-->xgbe_free_rx_skbuff\n");
509
510 channel = pdata->channel;
511 for (i = 0; i < pdata->channel_count; i++, channel++) {
512 ring = channel->rx_ring;
513 if (!ring)
514 break;
515
516 for (j = 0; j < ring->rdesc_count; j++) {
517 rdata = XGBE_GET_DESC_DATA(ring, j);
518 desc_if->unmap_skb(pdata, rdata);
519 }
520 }
521
522 DBGPR("<--xgbe_free_rx_skbuff\n");
523}
524
525static void xgbe_adjust_link(struct net_device *netdev)
526{
527 struct xgbe_prv_data *pdata = netdev_priv(netdev);
528 struct xgbe_hw_if *hw_if = &pdata->hw_if;
529 struct phy_device *phydev = pdata->phydev;
530 int new_state = 0;
531
532 if (phydev == NULL)
533 return;
534
535 if (phydev->link) {
536
537 if (pdata->pause_autoneg) {
538 if (phydev->pause || phydev->asym_pause) {
539 pdata->tx_pause = 1;
540 pdata->rx_pause = 1;
541 } else {
542 pdata->tx_pause = 0;
543 pdata->rx_pause = 0;
544 }
545 }
546
547 if (pdata->tx_pause != pdata->phy_tx_pause) {
548 hw_if->config_tx_flow_control(pdata);
549 pdata->phy_tx_pause = pdata->tx_pause;
550 }
551
552 if (pdata->rx_pause != pdata->phy_rx_pause) {
553 hw_if->config_rx_flow_control(pdata);
554 pdata->phy_rx_pause = pdata->rx_pause;
555 }
556
557
558 if (phydev->speed != pdata->phy_speed) {
559 new_state = 1;
560
561 switch (phydev->speed) {
562 case SPEED_10000:
563 hw_if->set_xgmii_speed(pdata);
564 break;
565
566 case SPEED_2500:
567 hw_if->set_gmii_2500_speed(pdata);
568 break;
569
570 case SPEED_1000:
571 hw_if->set_gmii_speed(pdata);
572 break;
573 }
574 pdata->phy_speed = phydev->speed;
575 }
576
577 if (phydev->link != pdata->phy_link) {
578 new_state = 1;
579 pdata->phy_link = 1;
580 }
581 } else if (pdata->phy_link) {
582 new_state = 1;
583 pdata->phy_link = 0;
584 pdata->phy_speed = SPEED_UNKNOWN;
585 }
586
587 if (new_state)
588 phy_print_status(phydev);
589}
590
591static int xgbe_phy_init(struct xgbe_prv_data *pdata)
592{
593 struct net_device *netdev = pdata->netdev;
594 struct phy_device *phydev = pdata->phydev;
595 int ret;
596
597 pdata->phy_link = -1;
598 pdata->phy_speed = SPEED_UNKNOWN;
599 pdata->phy_tx_pause = pdata->tx_pause;
600 pdata->phy_rx_pause = pdata->rx_pause;
601
602 ret = phy_connect_direct(netdev, phydev, &xgbe_adjust_link,
603 pdata->phy_mode);
604 if (ret) {
605 netdev_err(netdev, "phy_connect_direct failed\n");
606 return ret;
607 }
608
609 if (!phydev->drv || (phydev->drv->phy_id == 0)) {
610 netdev_err(netdev, "phy_id not valid\n");
611 ret = -ENODEV;
612 goto err_phy_connect;
613 }
614 DBGPR(" phy_connect_direct succeeded for PHY %s, link=%d\n",
615 dev_name(&phydev->dev), phydev->link);
616
617 return 0;
618
619err_phy_connect:
620 phy_disconnect(phydev);
621
622 return ret;
623}
624
625static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
626{
627 if (!pdata->phydev)
628 return;
629
630 phy_disconnect(pdata->phydev);
631}
632
633int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
634{
635 struct xgbe_prv_data *pdata = netdev_priv(netdev);
636 struct xgbe_hw_if *hw_if = &pdata->hw_if;
637 unsigned long flags;
638
639 DBGPR("-->xgbe_powerdown\n");
640
641 if (!netif_running(netdev) ||
642 (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) {
643 netdev_alert(netdev, "Device is already powered down\n");
644 DBGPR("<--xgbe_powerdown\n");
645 return -EINVAL;
646 }
647
648 phy_stop(pdata->phydev);
649
650 spin_lock_irqsave(&pdata->lock, flags);
651
652 if (caller == XGMAC_DRIVER_CONTEXT)
653 netif_device_detach(netdev);
654
655 netif_tx_stop_all_queues(netdev);
656 xgbe_napi_disable(pdata, 0);
657
658
659 hw_if->powerdown_tx(pdata);
660 hw_if->powerdown_rx(pdata);
661
662 pdata->power_down = 1;
663
664 spin_unlock_irqrestore(&pdata->lock, flags);
665
666 DBGPR("<--xgbe_powerdown\n");
667
668 return 0;
669}
670
671int xgbe_powerup(struct net_device *netdev, unsigned int caller)
672{
673 struct xgbe_prv_data *pdata = netdev_priv(netdev);
674 struct xgbe_hw_if *hw_if = &pdata->hw_if;
675 unsigned long flags;
676
677 DBGPR("-->xgbe_powerup\n");
678
679 if (!netif_running(netdev) ||
680 (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) {
681 netdev_alert(netdev, "Device is already powered up\n");
682 DBGPR("<--xgbe_powerup\n");
683 return -EINVAL;
684 }
685
686 spin_lock_irqsave(&pdata->lock, flags);
687
688 pdata->power_down = 0;
689
690 phy_start(pdata->phydev);
691
692
693 hw_if->powerup_tx(pdata);
694 hw_if->powerup_rx(pdata);
695
696 if (caller == XGMAC_DRIVER_CONTEXT)
697 netif_device_attach(netdev);
698
699 xgbe_napi_enable(pdata, 0);
700 netif_tx_start_all_queues(netdev);
701
702 spin_unlock_irqrestore(&pdata->lock, flags);
703
704 DBGPR("<--xgbe_powerup\n");
705
706 return 0;
707}
708
709static int xgbe_start(struct xgbe_prv_data *pdata)
710{
711 struct xgbe_hw_if *hw_if = &pdata->hw_if;
712 struct net_device *netdev = pdata->netdev;
713
714 DBGPR("-->xgbe_start\n");
715
716 xgbe_set_rx_mode(netdev);
717
718 hw_if->init(pdata);
719
720 phy_start(pdata->phydev);
721
722 hw_if->enable_tx(pdata);
723 hw_if->enable_rx(pdata);
724
725 xgbe_init_tx_timers(pdata);
726
727 xgbe_napi_enable(pdata, 1);
728 netif_tx_start_all_queues(netdev);
729
730 DBGPR("<--xgbe_start\n");
731
732 return 0;
733}
734
735static void xgbe_stop(struct xgbe_prv_data *pdata)
736{
737 struct xgbe_hw_if *hw_if = &pdata->hw_if;
738 struct net_device *netdev = pdata->netdev;
739
740 DBGPR("-->xgbe_stop\n");
741
742 phy_stop(pdata->phydev);
743
744 netif_tx_stop_all_queues(netdev);
745 xgbe_napi_disable(pdata, 1);
746
747 xgbe_stop_tx_timers(pdata);
748
749 hw_if->disable_tx(pdata);
750 hw_if->disable_rx(pdata);
751
752 DBGPR("<--xgbe_stop\n");
753}
754
755static void xgbe_restart_dev(struct xgbe_prv_data *pdata, unsigned int reset)
756{
757 struct xgbe_hw_if *hw_if = &pdata->hw_if;
758
759 DBGPR("-->xgbe_restart_dev\n");
760
761
762 if (!netif_running(pdata->netdev))
763 return;
764
765 xgbe_stop(pdata);
766 synchronize_irq(pdata->irq_number);
767
768 xgbe_free_tx_skbuff(pdata);
769 xgbe_free_rx_skbuff(pdata);
770
771
772 if (reset)
773 hw_if->exit(pdata);
774
775 xgbe_start(pdata);
776
777 DBGPR("<--xgbe_restart_dev\n");
778}
779
780static void xgbe_restart(struct work_struct *work)
781{
782 struct xgbe_prv_data *pdata = container_of(work,
783 struct xgbe_prv_data,
784 restart_work);
785
786 rtnl_lock();
787
788 xgbe_restart_dev(pdata, 1);
789
790 rtnl_unlock();
791}
792
793static void xgbe_tx_tstamp(struct work_struct *work)
794{
795 struct xgbe_prv_data *pdata = container_of(work,
796 struct xgbe_prv_data,
797 tx_tstamp_work);
798 struct skb_shared_hwtstamps hwtstamps;
799 u64 nsec;
800 unsigned long flags;
801
802 if (pdata->tx_tstamp) {
803 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
804 pdata->tx_tstamp);
805
806 memset(&hwtstamps, 0, sizeof(hwtstamps));
807 hwtstamps.hwtstamp = ns_to_ktime(nsec);
808 skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps);
809 }
810
811 dev_kfree_skb_any(pdata->tx_tstamp_skb);
812
813 spin_lock_irqsave(&pdata->tstamp_lock, flags);
814 pdata->tx_tstamp_skb = NULL;
815 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
816}
817
818static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,
819 struct ifreq *ifreq)
820{
821 if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config,
822 sizeof(pdata->tstamp_config)))
823 return -EFAULT;
824
825 return 0;
826}
827
828static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,
829 struct ifreq *ifreq)
830{
831 struct hwtstamp_config config;
832 unsigned int mac_tscr;
833
834 if (copy_from_user(&config, ifreq->ifr_data, sizeof(config)))
835 return -EFAULT;
836
837 if (config.flags)
838 return -EINVAL;
839
840 mac_tscr = 0;
841
842 switch (config.tx_type) {
843 case HWTSTAMP_TX_OFF:
844 break;
845
846 case HWTSTAMP_TX_ON:
847 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
848 break;
849
850 default:
851 return -ERANGE;
852 }
853
854 switch (config.rx_filter) {
855 case HWTSTAMP_FILTER_NONE:
856 break;
857
858 case HWTSTAMP_FILTER_ALL:
859 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);
860 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
861 break;
862
863
864 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
865 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
866
867 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
868 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
869 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
870 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
871 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
872 break;
873
874
875 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
876 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
877
878 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
879 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
880 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
881 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
882 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
883 break;
884
885
886 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
887 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
888
889 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
890 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
891 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
892 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
893 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
894 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
895 break;
896
897
898 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
899 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
900 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
901 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
902 break;
903
904
905 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
906 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
907 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
908 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
909 break;
910
911
912 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
913 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
914 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
915 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
916 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
917 break;
918
919
920 case HWTSTAMP_FILTER_PTP_V2_EVENT:
921 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
922 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
923 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
924 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
925 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
926 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
927 break;
928
929
930 case HWTSTAMP_FILTER_PTP_V2_SYNC:
931 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
932 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
933 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
934 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
935 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
936 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
937 break;
938
939
940 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
941 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
942 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
943 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
944 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
945 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
946 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
947 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
948 break;
949
950 default:
951 return -ERANGE;
952 }
953
954 pdata->hw_if.config_tstamp(pdata, mac_tscr);
955
956 memcpy(&pdata->tstamp_config, &config, sizeof(config));
957
958 return 0;
959}
960
961static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,
962 struct sk_buff *skb,
963 struct xgbe_packet_data *packet)
964{
965 unsigned long flags;
966
967 if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) {
968 spin_lock_irqsave(&pdata->tstamp_lock, flags);
969 if (pdata->tx_tstamp_skb) {
970
971 XGMAC_SET_BITS(packet->attributes,
972 TX_PACKET_ATTRIBUTES, PTP, 0);
973 } else {
974 pdata->tx_tstamp_skb = skb_get(skb);
975 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
976 }
977 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
978 }
979
980 if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP))
981 skb_tx_timestamp(skb);
982}
983
984static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)
985{
986 if (vlan_tx_tag_present(skb))
987 packet->vlan_ctag = vlan_tx_tag_get(skb);
988}
989
990static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)
991{
992 int ret;
993
994 if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
995 TSO_ENABLE))
996 return 0;
997
998 ret = skb_cow_head(skb, 0);
999 if (ret)
1000 return ret;
1001
1002 packet->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1003 packet->tcp_header_len = tcp_hdrlen(skb);
1004 packet->tcp_payload_len = skb->len - packet->header_len;
1005 packet->mss = skb_shinfo(skb)->gso_size;
1006 DBGPR(" packet->header_len=%u\n", packet->header_len);
1007 DBGPR(" packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n",
1008 packet->tcp_header_len, packet->tcp_payload_len);
1009 DBGPR(" packet->mss=%u\n", packet->mss);
1010
1011 return 0;
1012}
1013
1014static int xgbe_is_tso(struct sk_buff *skb)
1015{
1016 if (skb->ip_summed != CHECKSUM_PARTIAL)
1017 return 0;
1018
1019 if (!skb_is_gso(skb))
1020 return 0;
1021
1022 DBGPR(" TSO packet to be processed\n");
1023
1024 return 1;
1025}
1026
1027static void xgbe_packet_info(struct xgbe_prv_data *pdata,
1028 struct xgbe_ring *ring, struct sk_buff *skb,
1029 struct xgbe_packet_data *packet)
1030{
1031 struct skb_frag_struct *frag;
1032 unsigned int context_desc;
1033 unsigned int len;
1034 unsigned int i;
1035
1036 context_desc = 0;
1037 packet->rdesc_count = 0;
1038
1039 if (xgbe_is_tso(skb)) {
1040
1041 if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) {
1042 context_desc = 1;
1043 packet->rdesc_count++;
1044 }
1045
1046
1047 packet->rdesc_count++;
1048
1049 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1050 TSO_ENABLE, 1);
1051 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1052 CSUM_ENABLE, 1);
1053 } else if (skb->ip_summed == CHECKSUM_PARTIAL)
1054 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1055 CSUM_ENABLE, 1);
1056
1057 if (vlan_tx_tag_present(skb)) {
1058
1059 if (vlan_tx_tag_get(skb) != ring->tx.cur_vlan_ctag)
1060
1061 if (!context_desc) {
1062 context_desc = 1;
1063 packet->rdesc_count++;
1064 }
1065
1066 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1067 VLAN_CTAG, 1);
1068 }
1069
1070 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1071 (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON))
1072 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1073 PTP, 1);
1074
1075 for (len = skb_headlen(skb); len;) {
1076 packet->rdesc_count++;
1077 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1078 }
1079
1080 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1081 frag = &skb_shinfo(skb)->frags[i];
1082 for (len = skb_frag_size(frag); len; ) {
1083 packet->rdesc_count++;
1084 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1085 }
1086 }
1087}
1088
1089static int xgbe_open(struct net_device *netdev)
1090{
1091 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1092 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1093 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1094 int ret;
1095
1096 DBGPR("-->xgbe_open\n");
1097
1098
1099 ret = xgbe_phy_init(pdata);
1100 if (ret)
1101 return ret;
1102
1103
1104 ret = clk_prepare_enable(pdata->sysclk);
1105 if (ret) {
1106 netdev_alert(netdev, "dma clk_prepare_enable failed\n");
1107 goto err_phy_init;
1108 }
1109
1110 ret = clk_prepare_enable(pdata->ptpclk);
1111 if (ret) {
1112 netdev_alert(netdev, "ptp clk_prepare_enable failed\n");
1113 goto err_sysclk;
1114 }
1115
1116
1117 ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu);
1118 if (ret < 0)
1119 goto err_ptpclk;
1120 pdata->rx_buf_size = ret;
1121
1122
1123 ret = desc_if->alloc_ring_resources(pdata);
1124 if (ret)
1125 goto err_ptpclk;
1126
1127
1128 INIT_WORK(&pdata->restart_work, xgbe_restart);
1129 INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
1130
1131
1132 ret = devm_request_irq(pdata->dev, netdev->irq, xgbe_isr, 0,
1133 netdev->name, pdata);
1134 if (ret) {
1135 netdev_alert(netdev, "error requesting irq %d\n",
1136 pdata->irq_number);
1137 goto err_irq;
1138 }
1139 pdata->irq_number = netdev->irq;
1140
1141 ret = xgbe_start(pdata);
1142 if (ret)
1143 goto err_start;
1144
1145 DBGPR("<--xgbe_open\n");
1146
1147 return 0;
1148
1149err_start:
1150 hw_if->exit(pdata);
1151
1152 devm_free_irq(pdata->dev, pdata->irq_number, pdata);
1153 pdata->irq_number = 0;
1154
1155err_irq:
1156 desc_if->free_ring_resources(pdata);
1157
1158err_ptpclk:
1159 clk_disable_unprepare(pdata->ptpclk);
1160
1161err_sysclk:
1162 clk_disable_unprepare(pdata->sysclk);
1163
1164err_phy_init:
1165 xgbe_phy_exit(pdata);
1166
1167 return ret;
1168}
1169
1170static int xgbe_close(struct net_device *netdev)
1171{
1172 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1173 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1174 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1175
1176 DBGPR("-->xgbe_close\n");
1177
1178
1179 xgbe_stop(pdata);
1180
1181
1182 hw_if->exit(pdata);
1183
1184
1185 desc_if->free_ring_resources(pdata);
1186
1187
1188 if (pdata->irq_number != 0) {
1189 devm_free_irq(pdata->dev, pdata->irq_number, pdata);
1190 pdata->irq_number = 0;
1191 }
1192
1193
1194 clk_disable_unprepare(pdata->ptpclk);
1195 clk_disable_unprepare(pdata->sysclk);
1196
1197
1198 xgbe_phy_exit(pdata);
1199
1200 DBGPR("<--xgbe_close\n");
1201
1202 return 0;
1203}
1204
1205static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
1206{
1207 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1208 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1209 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1210 struct xgbe_channel *channel;
1211 struct xgbe_ring *ring;
1212 struct xgbe_packet_data *packet;
1213 unsigned long flags;
1214 int ret;
1215
1216 DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
1217
1218 channel = pdata->channel + skb->queue_mapping;
1219 ring = channel->tx_ring;
1220 packet = &ring->packet_data;
1221
1222 ret = NETDEV_TX_OK;
1223
1224 spin_lock_irqsave(&ring->lock, flags);
1225
1226 if (skb->len == 0) {
1227 netdev_err(netdev, "empty skb received from stack\n");
1228 dev_kfree_skb_any(skb);
1229 goto tx_netdev_return;
1230 }
1231
1232
1233 memset(packet, 0, sizeof(*packet));
1234 xgbe_packet_info(pdata, ring, skb, packet);
1235
1236
1237 if (packet->rdesc_count > xgbe_tx_avail_desc(ring)) {
1238 DBGPR(" Tx queue stopped, not enough descriptors available\n");
1239 netif_stop_subqueue(netdev, channel->queue_index);
1240 ring->tx.queue_stopped = 1;
1241 ret = NETDEV_TX_BUSY;
1242 goto tx_netdev_return;
1243 }
1244
1245 ret = xgbe_prep_tso(skb, packet);
1246 if (ret) {
1247 netdev_err(netdev, "error processing TSO packet\n");
1248 dev_kfree_skb_any(skb);
1249 goto tx_netdev_return;
1250 }
1251 xgbe_prep_vlan(skb, packet);
1252
1253 if (!desc_if->map_tx_skb(channel, skb)) {
1254 dev_kfree_skb_any(skb);
1255 goto tx_netdev_return;
1256 }
1257
1258 xgbe_prep_tx_tstamp(pdata, skb, packet);
1259
1260
1261 hw_if->pre_xmit(channel);
1262
1263#ifdef XGMAC_ENABLE_TX_PKT_DUMP
1264 xgbe_print_pkt(netdev, skb, true);
1265#endif
1266
1267tx_netdev_return:
1268 spin_unlock_irqrestore(&ring->lock, flags);
1269
1270 DBGPR("<--xgbe_xmit\n");
1271
1272 return ret;
1273}
1274
1275static void xgbe_set_rx_mode(struct net_device *netdev)
1276{
1277 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1278 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1279 unsigned int pr_mode, am_mode;
1280
1281 DBGPR("-->xgbe_set_rx_mode\n");
1282
1283 pr_mode = ((netdev->flags & IFF_PROMISC) != 0);
1284 am_mode = ((netdev->flags & IFF_ALLMULTI) != 0);
1285
1286 hw_if->set_promiscuous_mode(pdata, pr_mode);
1287 hw_if->set_all_multicast_mode(pdata, am_mode);
1288
1289 hw_if->add_mac_addresses(pdata);
1290
1291 DBGPR("<--xgbe_set_rx_mode\n");
1292}
1293
1294static int xgbe_set_mac_address(struct net_device *netdev, void *addr)
1295{
1296 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1297 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1298 struct sockaddr *saddr = addr;
1299
1300 DBGPR("-->xgbe_set_mac_address\n");
1301
1302 if (!is_valid_ether_addr(saddr->sa_data))
1303 return -EADDRNOTAVAIL;
1304
1305 memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len);
1306
1307 hw_if->set_mac_address(pdata, netdev->dev_addr);
1308
1309 DBGPR("<--xgbe_set_mac_address\n");
1310
1311 return 0;
1312}
1313
1314static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)
1315{
1316 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1317 int ret;
1318
1319 switch (cmd) {
1320 case SIOCGHWTSTAMP:
1321 ret = xgbe_get_hwtstamp_settings(pdata, ifreq);
1322 break;
1323
1324 case SIOCSHWTSTAMP:
1325 ret = xgbe_set_hwtstamp_settings(pdata, ifreq);
1326 break;
1327
1328 default:
1329 ret = -EOPNOTSUPP;
1330 }
1331
1332 return ret;
1333}
1334
1335static int xgbe_change_mtu(struct net_device *netdev, int mtu)
1336{
1337 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1338 int ret;
1339
1340 DBGPR("-->xgbe_change_mtu\n");
1341
1342 ret = xgbe_calc_rx_buf_size(netdev, mtu);
1343 if (ret < 0)
1344 return ret;
1345
1346 pdata->rx_buf_size = ret;
1347 netdev->mtu = mtu;
1348
1349 xgbe_restart_dev(pdata, 0);
1350
1351 DBGPR("<--xgbe_change_mtu\n");
1352
1353 return 0;
1354}
1355
1356static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,
1357 struct rtnl_link_stats64 *s)
1358{
1359 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1360 struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
1361
1362 DBGPR("-->%s\n", __func__);
1363
1364 pdata->hw_if.read_mmc_stats(pdata);
1365
1366 s->rx_packets = pstats->rxframecount_gb;
1367 s->rx_bytes = pstats->rxoctetcount_gb;
1368 s->rx_errors = pstats->rxframecount_gb -
1369 pstats->rxbroadcastframes_g -
1370 pstats->rxmulticastframes_g -
1371 pstats->rxunicastframes_g;
1372 s->multicast = pstats->rxmulticastframes_g;
1373 s->rx_length_errors = pstats->rxlengtherror;
1374 s->rx_crc_errors = pstats->rxcrcerror;
1375 s->rx_fifo_errors = pstats->rxfifooverflow;
1376
1377 s->tx_packets = pstats->txframecount_gb;
1378 s->tx_bytes = pstats->txoctetcount_gb;
1379 s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g;
1380 s->tx_dropped = netdev->stats.tx_dropped;
1381
1382 DBGPR("<--%s\n", __func__);
1383
1384 return s;
1385}
1386
1387static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
1388 u16 vid)
1389{
1390 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1391 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1392
1393 DBGPR("-->%s\n", __func__);
1394
1395 set_bit(vid, pdata->active_vlans);
1396 hw_if->update_vlan_hash_table(pdata);
1397
1398 DBGPR("<--%s\n", __func__);
1399
1400 return 0;
1401}
1402
1403static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
1404 u16 vid)
1405{
1406 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1407 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1408
1409 DBGPR("-->%s\n", __func__);
1410
1411 clear_bit(vid, pdata->active_vlans);
1412 hw_if->update_vlan_hash_table(pdata);
1413
1414 DBGPR("<--%s\n", __func__);
1415
1416 return 0;
1417}
1418
1419#ifdef CONFIG_NET_POLL_CONTROLLER
1420static void xgbe_poll_controller(struct net_device *netdev)
1421{
1422 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1423
1424 DBGPR("-->xgbe_poll_controller\n");
1425
1426 disable_irq(pdata->irq_number);
1427
1428 xgbe_isr(pdata->irq_number, pdata);
1429
1430 enable_irq(pdata->irq_number);
1431
1432 DBGPR("<--xgbe_poll_controller\n");
1433}
1434#endif
1435
1436static int xgbe_setup_tc(struct net_device *netdev, u8 tc)
1437{
1438 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1439 unsigned int offset, queue;
1440 u8 i;
1441
1442 if (tc && (tc != pdata->hw_feat.tc_cnt))
1443 return -EINVAL;
1444
1445 if (tc) {
1446 netdev_set_num_tc(netdev, tc);
1447 for (i = 0, queue = 0, offset = 0; i < tc; i++) {
1448 while ((queue < pdata->tx_q_count) &&
1449 (pdata->q2tc_map[queue] == i))
1450 queue++;
1451
1452 DBGPR(" TC%u using TXq%u-%u\n", i, offset, queue - 1);
1453 netdev_set_tc_queue(netdev, i, queue - offset, offset);
1454 offset = queue;
1455 }
1456 } else {
1457 netdev_reset_tc(netdev);
1458 }
1459
1460 return 0;
1461}
1462
1463static int xgbe_set_features(struct net_device *netdev,
1464 netdev_features_t features)
1465{
1466 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1467 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1468 netdev_features_t rxcsum, rxvlan, rxvlan_filter;
1469
1470 rxcsum = pdata->netdev_features & NETIF_F_RXCSUM;
1471 rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX;
1472 rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER;
1473
1474 if ((features & NETIF_F_RXCSUM) && !rxcsum)
1475 hw_if->enable_rx_csum(pdata);
1476 else if (!(features & NETIF_F_RXCSUM) && rxcsum)
1477 hw_if->disable_rx_csum(pdata);
1478
1479 if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan)
1480 hw_if->enable_rx_vlan_stripping(pdata);
1481 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan)
1482 hw_if->disable_rx_vlan_stripping(pdata);
1483
1484 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter)
1485 hw_if->enable_rx_vlan_filtering(pdata);
1486 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter)
1487 hw_if->disable_rx_vlan_filtering(pdata);
1488
1489 pdata->netdev_features = features;
1490
1491 DBGPR("<--xgbe_set_features\n");
1492
1493 return 0;
1494}
1495
1496static const struct net_device_ops xgbe_netdev_ops = {
1497 .ndo_open = xgbe_open,
1498 .ndo_stop = xgbe_close,
1499 .ndo_start_xmit = xgbe_xmit,
1500 .ndo_set_rx_mode = xgbe_set_rx_mode,
1501 .ndo_set_mac_address = xgbe_set_mac_address,
1502 .ndo_validate_addr = eth_validate_addr,
1503 .ndo_do_ioctl = xgbe_ioctl,
1504 .ndo_change_mtu = xgbe_change_mtu,
1505 .ndo_get_stats64 = xgbe_get_stats64,
1506 .ndo_vlan_rx_add_vid = xgbe_vlan_rx_add_vid,
1507 .ndo_vlan_rx_kill_vid = xgbe_vlan_rx_kill_vid,
1508#ifdef CONFIG_NET_POLL_CONTROLLER
1509 .ndo_poll_controller = xgbe_poll_controller,
1510#endif
1511 .ndo_setup_tc = xgbe_setup_tc,
1512 .ndo_set_features = xgbe_set_features,
1513};
1514
1515struct net_device_ops *xgbe_get_netdev_ops(void)
1516{
1517 return (struct net_device_ops *)&xgbe_netdev_ops;
1518}
1519
1520static void xgbe_rx_refresh(struct xgbe_channel *channel)
1521{
1522 struct xgbe_prv_data *pdata = channel->pdata;
1523 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1524 struct xgbe_ring *ring = channel->rx_ring;
1525 struct xgbe_ring_data *rdata;
1526
1527 desc_if->realloc_skb(channel);
1528
1529
1530
1531 rdata = XGBE_GET_DESC_DATA(ring, ring->rx.realloc_index - 1);
1532 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
1533 lower_32_bits(rdata->rdesc_dma));
1534}
1535
1536static int xgbe_tx_poll(struct xgbe_channel *channel)
1537{
1538 struct xgbe_prv_data *pdata = channel->pdata;
1539 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1540 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1541 struct xgbe_ring *ring = channel->tx_ring;
1542 struct xgbe_ring_data *rdata;
1543 struct xgbe_ring_desc *rdesc;
1544 struct net_device *netdev = pdata->netdev;
1545 unsigned long flags;
1546 int processed = 0;
1547
1548 DBGPR("-->xgbe_tx_poll\n");
1549
1550
1551 if (!ring)
1552 return 0;
1553
1554 spin_lock_irqsave(&ring->lock, flags);
1555
1556 while ((processed < XGBE_TX_DESC_MAX_PROC) &&
1557 (ring->dirty < ring->cur)) {
1558 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
1559 rdesc = rdata->rdesc;
1560
1561 if (!hw_if->tx_complete(rdesc))
1562 break;
1563
1564#ifdef XGMAC_ENABLE_TX_DESC_DUMP
1565 xgbe_dump_tx_desc(ring, ring->dirty, 1, 0);
1566#endif
1567
1568
1569 desc_if->unmap_skb(pdata, rdata);
1570 hw_if->tx_desc_reset(rdata);
1571
1572 processed++;
1573 ring->dirty++;
1574 }
1575
1576 if ((ring->tx.queue_stopped == 1) &&
1577 (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) {
1578 ring->tx.queue_stopped = 0;
1579 netif_wake_subqueue(netdev, channel->queue_index);
1580 }
1581
1582 DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
1583
1584 spin_unlock_irqrestore(&ring->lock, flags);
1585
1586 return processed;
1587}
1588
1589static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
1590{
1591 struct xgbe_prv_data *pdata = channel->pdata;
1592 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1593 struct xgbe_ring *ring = channel->rx_ring;
1594 struct xgbe_ring_data *rdata;
1595 struct xgbe_packet_data *packet;
1596 struct net_device *netdev = pdata->netdev;
1597 struct sk_buff *skb;
1598 struct skb_shared_hwtstamps *hwtstamps;
1599 unsigned int incomplete, error, context_next, context;
1600 unsigned int len, put_len, max_len;
1601 unsigned int received = 0;
1602 int packet_count = 0;
1603
1604 DBGPR("-->xgbe_rx_poll: budget=%d\n", budget);
1605
1606
1607 if (!ring)
1608 return 0;
1609
1610 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
1611 packet = &ring->packet_data;
1612 while (packet_count < budget) {
1613 DBGPR(" cur = %d\n", ring->cur);
1614
1615
1616 if (!received && rdata->state_saved) {
1617 incomplete = rdata->state.incomplete;
1618 context_next = rdata->state.context_next;
1619 skb = rdata->state.skb;
1620 error = rdata->state.error;
1621 len = rdata->state.len;
1622 } else {
1623 memset(packet, 0, sizeof(*packet));
1624 incomplete = 0;
1625 context_next = 0;
1626 skb = NULL;
1627 error = 0;
1628 len = 0;
1629 }
1630
1631read_again:
1632 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
1633
1634 if (ring->dirty > (XGBE_RX_DESC_CNT >> 3))
1635 xgbe_rx_refresh(channel);
1636
1637 if (hw_if->dev_read(channel))
1638 break;
1639
1640 received++;
1641 ring->cur++;
1642 ring->dirty++;
1643
1644 dma_unmap_single(pdata->dev, rdata->skb_dma,
1645 rdata->skb_dma_len, DMA_FROM_DEVICE);
1646 rdata->skb_dma = 0;
1647
1648 incomplete = XGMAC_GET_BITS(packet->attributes,
1649 RX_PACKET_ATTRIBUTES,
1650 INCOMPLETE);
1651 context_next = XGMAC_GET_BITS(packet->attributes,
1652 RX_PACKET_ATTRIBUTES,
1653 CONTEXT_NEXT);
1654 context = XGMAC_GET_BITS(packet->attributes,
1655 RX_PACKET_ATTRIBUTES,
1656 CONTEXT);
1657
1658
1659 if ((incomplete || context_next) && error)
1660 goto read_again;
1661
1662 if (error || packet->errors) {
1663 if (packet->errors)
1664 DBGPR("Error in received packet\n");
1665 dev_kfree_skb(skb);
1666 goto next_packet;
1667 }
1668
1669 if (!context) {
1670 put_len = rdata->len - len;
1671 if (skb) {
1672 if (pskb_expand_head(skb, 0, put_len,
1673 GFP_ATOMIC)) {
1674 DBGPR("pskb_expand_head error\n");
1675 if (incomplete) {
1676 error = 1;
1677 goto read_again;
1678 }
1679
1680 dev_kfree_skb(skb);
1681 goto next_packet;
1682 }
1683 memcpy(skb_tail_pointer(skb), rdata->skb->data,
1684 put_len);
1685 } else {
1686 skb = rdata->skb;
1687 rdata->skb = NULL;
1688 }
1689 skb_put(skb, put_len);
1690 len += put_len;
1691 }
1692
1693 if (incomplete || context_next)
1694 goto read_again;
1695
1696
1697 if (!skb)
1698 goto next_packet;
1699
1700
1701 max_len = netdev->mtu + ETH_HLEN;
1702 if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1703 (skb->protocol == htons(ETH_P_8021Q)))
1704 max_len += VLAN_HLEN;
1705
1706 if (skb->len > max_len) {
1707 DBGPR("packet length exceeds configured MTU\n");
1708 dev_kfree_skb(skb);
1709 goto next_packet;
1710 }
1711
1712#ifdef XGMAC_ENABLE_RX_PKT_DUMP
1713 xgbe_print_pkt(netdev, skb, false);
1714#endif
1715
1716 skb_checksum_none_assert(skb);
1717 if (XGMAC_GET_BITS(packet->attributes,
1718 RX_PACKET_ATTRIBUTES, CSUM_DONE))
1719 skb->ip_summed = CHECKSUM_UNNECESSARY;
1720
1721 if (XGMAC_GET_BITS(packet->attributes,
1722 RX_PACKET_ATTRIBUTES, VLAN_CTAG))
1723 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1724 packet->vlan_ctag);
1725
1726 if (XGMAC_GET_BITS(packet->attributes,
1727 RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {
1728 u64 nsec;
1729
1730 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
1731 packet->rx_tstamp);
1732 hwtstamps = skb_hwtstamps(skb);
1733 hwtstamps->hwtstamp = ns_to_ktime(nsec);
1734 }
1735
1736 skb->dev = netdev;
1737 skb->protocol = eth_type_trans(skb, netdev);
1738 skb_record_rx_queue(skb, channel->queue_index);
1739 skb_mark_napi_id(skb, &pdata->napi);
1740
1741 netdev->last_rx = jiffies;
1742 napi_gro_receive(&pdata->napi, skb);
1743
1744next_packet:
1745 packet_count++;
1746 }
1747
1748
1749 if (received && (incomplete || context_next)) {
1750 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
1751 rdata->state_saved = 1;
1752 rdata->state.incomplete = incomplete;
1753 rdata->state.context_next = context_next;
1754 rdata->state.skb = skb;
1755 rdata->state.len = len;
1756 rdata->state.error = error;
1757 }
1758
1759 DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count);
1760
1761 return packet_count;
1762}
1763
1764static int xgbe_poll(struct napi_struct *napi, int budget)
1765{
1766 struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data,
1767 napi);
1768 struct xgbe_channel *channel;
1769 int ring_budget;
1770 int processed, last_processed;
1771 unsigned int i;
1772
1773 DBGPR("-->xgbe_poll: budget=%d\n", budget);
1774
1775 processed = 0;
1776 ring_budget = budget / pdata->rx_ring_count;
1777 do {
1778 last_processed = processed;
1779
1780 channel = pdata->channel;
1781 for (i = 0; i < pdata->channel_count; i++, channel++) {
1782
1783 xgbe_tx_poll(channel);
1784
1785
1786 if (ring_budget > (budget - processed))
1787 ring_budget = budget - processed;
1788 processed += xgbe_rx_poll(channel, ring_budget);
1789 }
1790 } while ((processed < budget) && (processed != last_processed));
1791
1792
1793 if (processed < budget) {
1794
1795 napi_complete(napi);
1796
1797
1798 xgbe_enable_rx_tx_ints(pdata);
1799 }
1800
1801 DBGPR("<--xgbe_poll: received = %d\n", processed);
1802
1803 return processed;
1804}
1805
1806void xgbe_dump_tx_desc(struct xgbe_ring *ring, unsigned int idx,
1807 unsigned int count, unsigned int flag)
1808{
1809 struct xgbe_ring_data *rdata;
1810 struct xgbe_ring_desc *rdesc;
1811
1812 while (count--) {
1813 rdata = XGBE_GET_DESC_DATA(ring, idx);
1814 rdesc = rdata->rdesc;
1815 DBGPR("TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx,
1816 (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE",
1817 le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1),
1818 le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3));
1819 idx++;
1820 }
1821}
1822
1823void xgbe_dump_rx_desc(struct xgbe_ring *ring, struct xgbe_ring_desc *desc,
1824 unsigned int idx)
1825{
1826 DBGPR("RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n", idx,
1827 le32_to_cpu(desc->desc0), le32_to_cpu(desc->desc1),
1828 le32_to_cpu(desc->desc2), le32_to_cpu(desc->desc3));
1829}
1830
1831void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)
1832{
1833 struct ethhdr *eth = (struct ethhdr *)skb->data;
1834 unsigned char *buf = skb->data;
1835 unsigned char buffer[128];
1836 unsigned int i, j;
1837
1838 netdev_alert(netdev, "\n************** SKB dump ****************\n");
1839
1840 netdev_alert(netdev, "%s packet of %d bytes\n",
1841 (tx_rx ? "TX" : "RX"), skb->len);
1842
1843 netdev_alert(netdev, "Dst MAC addr: %pM\n", eth->h_dest);
1844 netdev_alert(netdev, "Src MAC addr: %pM\n", eth->h_source);
1845 netdev_alert(netdev, "Protocol: 0x%04hx\n", ntohs(eth->h_proto));
1846
1847 for (i = 0, j = 0; i < skb->len;) {
1848 j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",
1849 buf[i++]);
1850
1851 if ((i % 32) == 0) {
1852 netdev_alert(netdev, " 0x%04x: %s\n", i - 32, buffer);
1853 j = 0;
1854 } else if ((i % 16) == 0) {
1855 buffer[j++] = ' ';
1856 buffer[j++] = ' ';
1857 } else if ((i % 4) == 0) {
1858 buffer[j++] = ' ';
1859 }
1860 }
1861 if (i % 32)
1862 netdev_alert(netdev, " 0x%04x: %s\n", i - (i % 32), buffer);
1863
1864 netdev_alert(netdev, "\n************** SKB dump ****************\n");
1865}
1866
