LXR linux/drivers/net/wireless/b43/phy

   1#ifndef LINUX_B43_PHY_G_H_
   2#define LINUX_B43_PHY_G_H_
   3
   4/* OFDM PHY registers are defined in the A-PHY header. */
   5#include "phy_a.h"
   6
   7/* CCK (B) PHY Registers */
   8#define B43_PHY_VERSION_CCK             B43_PHY_CCK(0x00)       /* Versioning register for B-PHY */
   9#define B43_PHY_CCKBBANDCFG             B43_PHY_CCK(0x01)       /* Contains antenna 0/1 control bit */
  10#define B43_PHY_PGACTL                  B43_PHY_CCK(0x15)       /* PGA control */
  11#define  B43_PHY_PGACTL_LPF             0x1000  /* Low pass filter (?) */
  12#define  B43_PHY_PGACTL_LOWBANDW        0x0040  /* Low bandwidth flag */
  13#define  B43_PHY_PGACTL_UNKNOWN         0xEFA0
  14#define B43_PHY_FBCTL1                  B43_PHY_CCK(0x18)       /* Frequency bandwidth control 1 */
  15#define B43_PHY_ITSSI                   B43_PHY_CCK(0x29)       /* Idle TSSI */
  16#define B43_PHY_LO_LEAKAGE              B43_PHY_CCK(0x2D)       /* Measured LO leakage */
  17#define B43_PHY_ENERGY                  B43_PHY_CCK(0x33)       /* Energy */
  18#define B43_PHY_SYNCCTL                 B43_PHY_CCK(0x35)
  19#define B43_PHY_FBCTL2                  B43_PHY_CCK(0x38)       /* Frequency bandwidth control 2 */
  20#define B43_PHY_DACCTL                  B43_PHY_CCK(0x60)       /* DAC control */
  21#define B43_PHY_RCCALOVER               B43_PHY_CCK(0x78)       /* RC calibration override */
  22
  23/* Extended G-PHY Registers */
  24#define B43_PHY_CLASSCTL                B43_PHY_EXTG(0x02)      /* Classify control */
  25#define B43_PHY_GTABCTL                 B43_PHY_EXTG(0x03)      /* G-PHY table control (see below) */
  26#define  B43_PHY_GTABOFF                0x03FF  /* G-PHY table offset (see below) */
  27#define  B43_PHY_GTABNR                 0xFC00  /* G-PHY table number (see below) */
  28#define  B43_PHY_GTABNR_SHIFT           10
  29#define B43_PHY_GTABDATA                B43_PHY_EXTG(0x04)      /* G-PHY table data */
  30#define B43_PHY_LO_MASK                 B43_PHY_EXTG(0x0F)      /* Local Oscillator control mask */
  31#define B43_PHY_LO_CTL                  B43_PHY_EXTG(0x10)      /* Local Oscillator control */
  32#define B43_PHY_RFOVER                  B43_PHY_EXTG(0x11)      /* RF override */
  33#define B43_PHY_RFOVERVAL               B43_PHY_EXTG(0x12)      /* RF override value */
  34#define  B43_PHY_RFOVERVAL_EXTLNA       0x8000
  35#define  B43_PHY_RFOVERVAL_LNA          0x7000
  36#define  B43_PHY_RFOVERVAL_LNA_SHIFT    12
  37#define  B43_PHY_RFOVERVAL_PGA          0x0F00
  38#define  B43_PHY_RFOVERVAL_PGA_SHIFT    8
  39#define  B43_PHY_RFOVERVAL_UNK          0x0010  /* Unknown, always set. */
  40#define  B43_PHY_RFOVERVAL_TRSWRX       0x00E0
  41#define  B43_PHY_RFOVERVAL_BW           0x0003  /* Bandwidth flags */
  42#define   B43_PHY_RFOVERVAL_BW_LPF      0x0001  /* Low Pass Filter */
  43#define   B43_PHY_RFOVERVAL_BW_LBW      0x0002  /* Low Bandwidth (when set), high when unset */
  44#define B43_PHY_ANALOGOVER              B43_PHY_EXTG(0x14)      /* Analog override */
  45#define B43_PHY_ANALOGOVERVAL           B43_PHY_EXTG(0x15)      /* Analog override value */
  46
  47
  48/*** G-PHY table numbers */
  49#define B43_GTAB(number, offset)        (((number) << B43_PHY_GTABNR_SHIFT) | (offset))
  50#define B43_GTAB_NRSSI                  B43_GTAB(0x00, 0)
  51#define B43_GTAB_TRFEMW                 B43_GTAB(0x0C, 0x120)
  52#define B43_GTAB_ORIGTR                 B43_GTAB(0x2E, 0x298)
  53
  54u16 b43_gtab_read(struct b43_wldev *dev, u16 table, u16 offset);
  55void b43_gtab_write(struct b43_wldev *dev, u16 table, u16 offset, u16 value);
  56
  57
  58/* Returns the boolean whether "TX Magnification" is enabled. */
  59#define has_tx_magnification(phy) \
  60        (((phy)->rev >= 2) &&                   \
  61         ((phy)->radio_ver == 0x2050) &&        \
  62         ((phy)->radio_rev == 8))
  63/* Card uses the loopback gain stuff */
  64#define has_loopback_gain(phy) \
  65        (((phy)->rev > 1) || ((phy)->gmode))
  66
  67/* Radio Attenuation (RF Attenuation) */
  68struct b43_rfatt {
  69        u8 att;                 /* Attenuation value */
  70        bool with_padmix;       /* Flag, PAD Mixer enabled. */
  71};
  72struct b43_rfatt_list {
  73        /* Attenuation values list */
  74        const struct b43_rfatt *list;
  75        u8 len;
  76        /* Minimum/Maximum attenuation values */
  77        u8 min_val;
  78        u8 max_val;
  79};
  80
  81/* Returns true, if the values are the same. */
  82static inline bool b43_compare_rfatt(const struct b43_rfatt *a,
  83                                     const struct b43_rfatt *b)
  84{
  85        return ((a->att == b->att) &&
  86                (a->with_padmix == b->with_padmix));
  87}
  88
  89/* Baseband Attenuation */
  90struct b43_bbatt {
  91        u8 att;                 /* Attenuation value */
  92};
  93struct b43_bbatt_list {
  94        /* Attenuation values list */
  95        const struct b43_bbatt *list;
  96        u8 len;
  97        /* Minimum/Maximum attenuation values */
  98        u8 min_val;
  99        u8 max_val;
 100};
 101
 102/* Returns true, if the values are the same. */
 103static inline bool b43_compare_bbatt(const struct b43_bbatt *a,
 104                                     const struct b43_bbatt *b)
 105{
 106        return (a->att == b->att);
 107}
 108
 109/* tx_control bits. */
 110#define B43_TXCTL_PA3DB         0x40    /* PA Gain 3dB */
 111#define B43_TXCTL_PA2DB         0x20    /* PA Gain 2dB */
 112#define B43_TXCTL_TXMIX         0x10    /* TX Mixer Gain */
 113
 114struct b43_txpower_lo_control;
 115
 116struct b43_phy_g {
 117        /* ACI (adjacent channel interference) flags. */
 118        bool aci_enable;
 119        bool aci_wlan_automatic;
 120        bool aci_hw_rssi;
 121
 122        /* Radio switched on/off */
 123        bool radio_on;
 124        struct {
 125                /* Values saved when turning the radio off.
 126                 * They are needed when turning it on again. */
 127                bool valid;
 128                u16 rfover;
 129                u16 rfoverval;
 130        } radio_off_context;
 131
 132        u16 minlowsig[2];
 133        u16 minlowsigpos[2];
 134
 135        /* Pointer to the table used to convert a
 136         * TSSI value to dBm-Q5.2 */
 137        const s8 *tssi2dbm;
 138        /* tssi2dbm is kmalloc()ed. Only used for free()ing. */
 139        bool dyn_tssi_tbl;
 140        /* Target idle TSSI */
 141        int tgt_idle_tssi;
 142        /* Current idle TSSI */
 143        int cur_idle_tssi;
 144        /* The current average TSSI. */
 145        u8 average_tssi;
 146        /* Current TX power level attenuation control values */
 147        struct b43_bbatt bbatt;
 148        struct b43_rfatt rfatt;
 149        u8 tx_control;          /* B43_TXCTL_XXX */
 150        /* The calculated attenuation deltas that are used later
 151         * when adjusting the actual power output. */
 152        int bbatt_delta;
 153        int rfatt_delta;
 154
 155        /* LocalOscillator control values. */
 156        struct b43_txpower_lo_control *lo_control;
 157        /* Values from b43_calc_loopback_gain() */
 158        s16 max_lb_gain;        /* Maximum Loopback gain in hdB */
 159        s16 trsw_rx_gain;       /* TRSW RX gain in hdB */
 160        s16 lna_lod_gain;       /* LNA lod */
 161        s16 lna_gain;           /* LNA */
 162        s16 pga_gain;           /* PGA */
 163
 164        /* Current Interference Mitigation mode */
 165        int interfmode;
 166        /* Stack of saved values from the Interference Mitigation code.
 167         * Each value in the stack is laid out as follows:
 168         * bit 0-11:  offset
 169         * bit 12-15: register ID
 170         * bit 16-32: value
 171         * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
 172         */
 173#define B43_INTERFSTACK_SIZE    26
 174        u32 interfstack[B43_INTERFSTACK_SIZE];  //FIXME: use a data structure
 175
 176        /* Saved values from the NRSSI Slope calculation */
 177        s16 nrssi[2];
 178        s32 nrssislope;
 179        /* In memory nrssi lookup table. */
 180        s8 nrssi_lt[64];
 181
 182        u16 lofcal;
 183
 184        u16 initval;            //FIXME rename?
 185
 186        /* The device does address auto increment for the OFDM tables.
 187         * We cache the previously used address here and omit the address
 188         * write on the next table access, if possible. */
 189        u16 ofdmtab_addr; /* The address currently set in hardware. */
 190        enum { /* The last data flow direction. */
 191                B43_OFDMTAB_DIRECTION_UNKNOWN = 0,
 192                B43_OFDMTAB_DIRECTION_READ,
 193                B43_OFDMTAB_DIRECTION_WRITE,
 194        } ofdmtab_addr_direction;
 195};
 196
 197void b43_gphy_set_baseband_attenuation(struct b43_wldev *dev,
 198                                       u16 baseband_attenuation);
 199void b43_gphy_channel_switch(struct b43_wldev *dev,
 200                             unsigned int channel,
 201                             bool synthetic_pu_workaround);
 202u8 * b43_generate_dyn_tssi2dbm_tab(struct b43_wldev *dev,
 203                                   s16 pab0, s16 pab1, s16 pab2);
 204
 205struct b43_phy_operations;
 206extern const struct b43_phy_operations b43_phyops_g;
 207
 208#endif /* LINUX_B43_PHY_G_H_ */
 209