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31#if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32#define SUPPORT_SYSRQ
33#endif
34
35#include <linux/module.h>
36#include <linux/ioport.h>
37#include <linux/init.h>
38#include <linux/console.h>
39#include <linux/sysrq.h>
40#include <linux/device.h>
41#include <linux/tty.h>
42#include <linux/tty_flip.h>
43#include <linux/serial_core.h>
44#include <linux/serial.h>
45#include <linux/amba/bus.h>
46#include <linux/amba/serial.h>
47#include <linux/clk.h>
48#include <linux/slab.h>
49#include <linux/io.h>
50
51#define UART_NR 8
52
53#define SERIAL_AMBA_MAJOR 204
54#define SERIAL_AMBA_MINOR 16
55#define SERIAL_AMBA_NR UART_NR
56
57#define AMBA_ISR_PASS_LIMIT 256
58
59#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
60#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
61
62#define UART_DUMMY_RSR_RX 256
63#define UART_PORT_SIZE 64
64
65
66
67
68struct uart_amba_port {
69 struct uart_port port;
70 struct clk *clk;
71 struct amba_device *dev;
72 struct amba_pl010_data *data;
73 unsigned int old_status;
74};
75
76static void pl010_stop_tx(struct uart_port *port)
77{
78 struct uart_amba_port *uap = (struct uart_amba_port *)port;
79 unsigned int cr;
80
81 cr = readb(uap->port.membase + UART010_CR);
82 cr &= ~UART010_CR_TIE;
83 writel(cr, uap->port.membase + UART010_CR);
84}
85
86static void pl010_start_tx(struct uart_port *port)
87{
88 struct uart_amba_port *uap = (struct uart_amba_port *)port;
89 unsigned int cr;
90
91 cr = readb(uap->port.membase + UART010_CR);
92 cr |= UART010_CR_TIE;
93 writel(cr, uap->port.membase + UART010_CR);
94}
95
96static void pl010_stop_rx(struct uart_port *port)
97{
98 struct uart_amba_port *uap = (struct uart_amba_port *)port;
99 unsigned int cr;
100
101 cr = readb(uap->port.membase + UART010_CR);
102 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
103 writel(cr, uap->port.membase + UART010_CR);
104}
105
106static void pl010_enable_ms(struct uart_port *port)
107{
108 struct uart_amba_port *uap = (struct uart_amba_port *)port;
109 unsigned int cr;
110
111 cr = readb(uap->port.membase + UART010_CR);
112 cr |= UART010_CR_MSIE;
113 writel(cr, uap->port.membase + UART010_CR);
114}
115
116static void pl010_rx_chars(struct uart_amba_port *uap)
117{
118 unsigned int status, ch, flag, rsr, max_count = 256;
119
120 status = readb(uap->port.membase + UART01x_FR);
121 while (UART_RX_DATA(status) && max_count--) {
122 ch = readb(uap->port.membase + UART01x_DR);
123 flag = TTY_NORMAL;
124
125 uap->port.icount.rx++;
126
127
128
129
130
131 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
132 if (unlikely(rsr & UART01x_RSR_ANY)) {
133 writel(0, uap->port.membase + UART01x_ECR);
134
135 if (rsr & UART01x_RSR_BE) {
136 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
137 uap->port.icount.brk++;
138 if (uart_handle_break(&uap->port))
139 goto ignore_char;
140 } else if (rsr & UART01x_RSR_PE)
141 uap->port.icount.parity++;
142 else if (rsr & UART01x_RSR_FE)
143 uap->port.icount.frame++;
144 if (rsr & UART01x_RSR_OE)
145 uap->port.icount.overrun++;
146
147 rsr &= uap->port.read_status_mask;
148
149 if (rsr & UART01x_RSR_BE)
150 flag = TTY_BREAK;
151 else if (rsr & UART01x_RSR_PE)
152 flag = TTY_PARITY;
153 else if (rsr & UART01x_RSR_FE)
154 flag = TTY_FRAME;
155 }
156
157 if (uart_handle_sysrq_char(&uap->port, ch))
158 goto ignore_char;
159
160 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
161
162 ignore_char:
163 status = readb(uap->port.membase + UART01x_FR);
164 }
165 spin_unlock(&uap->port.lock);
166 tty_flip_buffer_push(&uap->port.state->port);
167 spin_lock(&uap->port.lock);
168}
169
170static void pl010_tx_chars(struct uart_amba_port *uap)
171{
172 struct circ_buf *xmit = &uap->port.state->xmit;
173 int count;
174
175 if (uap->port.x_char) {
176 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
177 uap->port.icount.tx++;
178 uap->port.x_char = 0;
179 return;
180 }
181 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
182 pl010_stop_tx(&uap->port);
183 return;
184 }
185
186 count = uap->port.fifosize >> 1;
187 do {
188 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
189 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
190 uap->port.icount.tx++;
191 if (uart_circ_empty(xmit))
192 break;
193 } while (--count > 0);
194
195 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
196 uart_write_wakeup(&uap->port);
197
198 if (uart_circ_empty(xmit))
199 pl010_stop_tx(&uap->port);
200}
201
202static void pl010_modem_status(struct uart_amba_port *uap)
203{
204 unsigned int status, delta;
205
206 writel(0, uap->port.membase + UART010_ICR);
207
208 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
209
210 delta = status ^ uap->old_status;
211 uap->old_status = status;
212
213 if (!delta)
214 return;
215
216 if (delta & UART01x_FR_DCD)
217 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
218
219 if (delta & UART01x_FR_DSR)
220 uap->port.icount.dsr++;
221
222 if (delta & UART01x_FR_CTS)
223 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
224
225 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
226}
227
228static irqreturn_t pl010_int(int irq, void *dev_id)
229{
230 struct uart_amba_port *uap = dev_id;
231 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
232 int handled = 0;
233
234 spin_lock(&uap->port.lock);
235
236 status = readb(uap->port.membase + UART010_IIR);
237 if (status) {
238 do {
239 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
240 pl010_rx_chars(uap);
241 if (status & UART010_IIR_MIS)
242 pl010_modem_status(uap);
243 if (status & UART010_IIR_TIS)
244 pl010_tx_chars(uap);
245
246 if (pass_counter-- == 0)
247 break;
248
249 status = readb(uap->port.membase + UART010_IIR);
250 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
251 UART010_IIR_TIS));
252 handled = 1;
253 }
254
255 spin_unlock(&uap->port.lock);
256
257 return IRQ_RETVAL(handled);
258}
259
260static unsigned int pl010_tx_empty(struct uart_port *port)
261{
262 struct uart_amba_port *uap = (struct uart_amba_port *)port;
263 unsigned int status = readb(uap->port.membase + UART01x_FR);
264 return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
265}
266
267static unsigned int pl010_get_mctrl(struct uart_port *port)
268{
269 struct uart_amba_port *uap = (struct uart_amba_port *)port;
270 unsigned int result = 0;
271 unsigned int status;
272
273 status = readb(uap->port.membase + UART01x_FR);
274 if (status & UART01x_FR_DCD)
275 result |= TIOCM_CAR;
276 if (status & UART01x_FR_DSR)
277 result |= TIOCM_DSR;
278 if (status & UART01x_FR_CTS)
279 result |= TIOCM_CTS;
280
281 return result;
282}
283
284static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
285{
286 struct uart_amba_port *uap = (struct uart_amba_port *)port;
287
288 if (uap->data)
289 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
290}
291
292static void pl010_break_ctl(struct uart_port *port, int break_state)
293{
294 struct uart_amba_port *uap = (struct uart_amba_port *)port;
295 unsigned long flags;
296 unsigned int lcr_h;
297
298 spin_lock_irqsave(&uap->port.lock, flags);
299 lcr_h = readb(uap->port.membase + UART010_LCRH);
300 if (break_state == -1)
301 lcr_h |= UART01x_LCRH_BRK;
302 else
303 lcr_h &= ~UART01x_LCRH_BRK;
304 writel(lcr_h, uap->port.membase + UART010_LCRH);
305 spin_unlock_irqrestore(&uap->port.lock, flags);
306}
307
308static int pl010_startup(struct uart_port *port)
309{
310 struct uart_amba_port *uap = (struct uart_amba_port *)port;
311 int retval;
312
313
314
315
316 retval = clk_prepare_enable(uap->clk);
317 if (retval)
318 goto out;
319
320 uap->port.uartclk = clk_get_rate(uap->clk);
321
322
323
324
325 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
326 if (retval)
327 goto clk_dis;
328
329
330
331
332 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
333
334
335
336
337 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
338 uap->port.membase + UART010_CR);
339
340 return 0;
341
342 clk_dis:
343 clk_disable_unprepare(uap->clk);
344 out:
345 return retval;
346}
347
348static void pl010_shutdown(struct uart_port *port)
349{
350 struct uart_amba_port *uap = (struct uart_amba_port *)port;
351
352
353
354
355 free_irq(uap->port.irq, uap);
356
357
358
359
360 writel(0, uap->port.membase + UART010_CR);
361
362
363 writel(readb(uap->port.membase + UART010_LCRH) &
364 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
365 uap->port.membase + UART010_LCRH);
366
367
368
369
370 clk_disable_unprepare(uap->clk);
371}
372
373static void
374pl010_set_termios(struct uart_port *port, struct ktermios *termios,
375 struct ktermios *old)
376{
377 struct uart_amba_port *uap = (struct uart_amba_port *)port;
378 unsigned int lcr_h, old_cr;
379 unsigned long flags;
380 unsigned int baud, quot;
381
382
383
384
385 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
386 quot = uart_get_divisor(port, baud);
387
388 switch (termios->c_cflag & CSIZE) {
389 case CS5:
390 lcr_h = UART01x_LCRH_WLEN_5;
391 break;
392 case CS6:
393 lcr_h = UART01x_LCRH_WLEN_6;
394 break;
395 case CS7:
396 lcr_h = UART01x_LCRH_WLEN_7;
397 break;
398 default:
399 lcr_h = UART01x_LCRH_WLEN_8;
400 break;
401 }
402 if (termios->c_cflag & CSTOPB)
403 lcr_h |= UART01x_LCRH_STP2;
404 if (termios->c_cflag & PARENB) {
405 lcr_h |= UART01x_LCRH_PEN;
406 if (!(termios->c_cflag & PARODD))
407 lcr_h |= UART01x_LCRH_EPS;
408 }
409 if (uap->port.fifosize > 1)
410 lcr_h |= UART01x_LCRH_FEN;
411
412 spin_lock_irqsave(&uap->port.lock, flags);
413
414
415
416
417 uart_update_timeout(port, termios->c_cflag, baud);
418
419 uap->port.read_status_mask = UART01x_RSR_OE;
420 if (termios->c_iflag & INPCK)
421 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
422 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
423 uap->port.read_status_mask |= UART01x_RSR_BE;
424
425
426
427
428 uap->port.ignore_status_mask = 0;
429 if (termios->c_iflag & IGNPAR)
430 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
431 if (termios->c_iflag & IGNBRK) {
432 uap->port.ignore_status_mask |= UART01x_RSR_BE;
433
434
435
436
437 if (termios->c_iflag & IGNPAR)
438 uap->port.ignore_status_mask |= UART01x_RSR_OE;
439 }
440
441
442
443
444 if ((termios->c_cflag & CREAD) == 0)
445 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
446
447
448 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
449
450 if (UART_ENABLE_MS(port, termios->c_cflag))
451 old_cr |= UART010_CR_MSIE;
452
453 writel(0, uap->port.membase + UART010_CR);
454
455
456 quot -= 1;
457 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
458 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
459
460
461
462
463
464
465 writel(lcr_h, uap->port.membase + UART010_LCRH);
466 writel(old_cr, uap->port.membase + UART010_CR);
467
468 spin_unlock_irqrestore(&uap->port.lock, flags);
469}
470
471static void pl010_set_ldisc(struct uart_port *port, int new)
472{
473 if (new == N_PPS) {
474 port->flags |= UPF_HARDPPS_CD;
475 pl010_enable_ms(port);
476 } else
477 port->flags &= ~UPF_HARDPPS_CD;
478}
479
480static const char *pl010_type(struct uart_port *port)
481{
482 return port->type == PORT_AMBA ? "AMBA" : NULL;
483}
484
485
486
487
488static void pl010_release_port(struct uart_port *port)
489{
490 release_mem_region(port->mapbase, UART_PORT_SIZE);
491}
492
493
494
495
496static int pl010_request_port(struct uart_port *port)
497{
498 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
499 != NULL ? 0 : -EBUSY;
500}
501
502
503
504
505static void pl010_config_port(struct uart_port *port, int flags)
506{
507 if (flags & UART_CONFIG_TYPE) {
508 port->type = PORT_AMBA;
509 pl010_request_port(port);
510 }
511}
512
513
514
515
516static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
517{
518 int ret = 0;
519 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
520 ret = -EINVAL;
521 if (ser->irq < 0 || ser->irq >= nr_irqs)
522 ret = -EINVAL;
523 if (ser->baud_base < 9600)
524 ret = -EINVAL;
525 return ret;
526}
527
528static struct uart_ops amba_pl010_pops = {
529 .tx_empty = pl010_tx_empty,
530 .set_mctrl = pl010_set_mctrl,
531 .get_mctrl = pl010_get_mctrl,
532 .stop_tx = pl010_stop_tx,
533 .start_tx = pl010_start_tx,
534 .stop_rx = pl010_stop_rx,
535 .enable_ms = pl010_enable_ms,
536 .break_ctl = pl010_break_ctl,
537 .startup = pl010_startup,
538 .shutdown = pl010_shutdown,
539 .set_termios = pl010_set_termios,
540 .set_ldisc = pl010_set_ldisc,
541 .type = pl010_type,
542 .release_port = pl010_release_port,
543 .request_port = pl010_request_port,
544 .config_port = pl010_config_port,
545 .verify_port = pl010_verify_port,
546};
547
548static struct uart_amba_port *amba_ports[UART_NR];
549
550#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
551
552static void pl010_console_putchar(struct uart_port *port, int ch)
553{
554 struct uart_amba_port *uap = (struct uart_amba_port *)port;
555 unsigned int status;
556
557 do {
558 status = readb(uap->port.membase + UART01x_FR);
559 barrier();
560 } while (!UART_TX_READY(status));
561 writel(ch, uap->port.membase + UART01x_DR);
562}
563
564static void
565pl010_console_write(struct console *co, const char *s, unsigned int count)
566{
567 struct uart_amba_port *uap = amba_ports[co->index];
568 unsigned int status, old_cr;
569
570 clk_enable(uap->clk);
571
572
573
574
575 old_cr = readb(uap->port.membase + UART010_CR);
576 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
577
578 uart_console_write(&uap->port, s, count, pl010_console_putchar);
579
580
581
582
583
584 do {
585 status = readb(uap->port.membase + UART01x_FR);
586 barrier();
587 } while (status & UART01x_FR_BUSY);
588 writel(old_cr, uap->port.membase + UART010_CR);
589
590 clk_disable(uap->clk);
591}
592
593static void __init
594pl010_console_get_options(struct uart_amba_port *uap, int *baud,
595 int *parity, int *bits)
596{
597 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
598 unsigned int lcr_h, quot;
599 lcr_h = readb(uap->port.membase + UART010_LCRH);
600
601 *parity = 'n';
602 if (lcr_h & UART01x_LCRH_PEN) {
603 if (lcr_h & UART01x_LCRH_EPS)
604 *parity = 'e';
605 else
606 *parity = 'o';
607 }
608
609 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
610 *bits = 7;
611 else
612 *bits = 8;
613
614 quot = readb(uap->port.membase + UART010_LCRL) |
615 readb(uap->port.membase + UART010_LCRM) << 8;
616 *baud = uap->port.uartclk / (16 * (quot + 1));
617 }
618}
619
620static int __init pl010_console_setup(struct console *co, char *options)
621{
622 struct uart_amba_port *uap;
623 int baud = 38400;
624 int bits = 8;
625 int parity = 'n';
626 int flow = 'n';
627 int ret;
628
629
630
631
632
633
634 if (co->index >= UART_NR)
635 co->index = 0;
636 uap = amba_ports[co->index];
637 if (!uap)
638 return -ENODEV;
639
640 ret = clk_prepare(uap->clk);
641 if (ret)
642 return ret;
643
644 uap->port.uartclk = clk_get_rate(uap->clk);
645
646 if (options)
647 uart_parse_options(options, &baud, &parity, &bits, &flow);
648 else
649 pl010_console_get_options(uap, &baud, &parity, &bits);
650
651 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
652}
653
654static struct uart_driver amba_reg;
655static struct console amba_console = {
656 .name = "ttyAM",
657 .write = pl010_console_write,
658 .device = uart_console_device,
659 .setup = pl010_console_setup,
660 .flags = CON_PRINTBUFFER,
661 .index = -1,
662 .data = &amba_reg,
663};
664
665#define AMBA_CONSOLE &amba_console
666#else
667#define AMBA_CONSOLE NULL
668#endif
669
670static struct uart_driver amba_reg = {
671 .owner = THIS_MODULE,
672 .driver_name = "ttyAM",
673 .dev_name = "ttyAM",
674 .major = SERIAL_AMBA_MAJOR,
675 .minor = SERIAL_AMBA_MINOR,
676 .nr = UART_NR,
677 .cons = AMBA_CONSOLE,
678};
679
680static int pl010_probe(struct amba_device *dev, const struct amba_id *id)
681{
682 struct uart_amba_port *uap;
683 void __iomem *base;
684 int i, ret;
685
686 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
687 if (amba_ports[i] == NULL)
688 break;
689
690 if (i == ARRAY_SIZE(amba_ports))
691 return -EBUSY;
692
693 uap = devm_kzalloc(&dev->dev, sizeof(struct uart_amba_port),
694 GFP_KERNEL);
695 if (!uap)
696 return -ENOMEM;
697
698 base = devm_ioremap(&dev->dev, dev->res.start,
699 resource_size(&dev->res));
700 if (!base)
701 return -ENOMEM;
702
703 uap->clk = devm_clk_get(&dev->dev, NULL);
704 if (IS_ERR(uap->clk))
705 return PTR_ERR(uap->clk);
706
707 uap->port.dev = &dev->dev;
708 uap->port.mapbase = dev->res.start;
709 uap->port.membase = base;
710 uap->port.iotype = UPIO_MEM;
711 uap->port.irq = dev->irq[0];
712 uap->port.fifosize = 16;
713 uap->port.ops = &amba_pl010_pops;
714 uap->port.flags = UPF_BOOT_AUTOCONF;
715 uap->port.line = i;
716 uap->dev = dev;
717 uap->data = dev_get_platdata(&dev->dev);
718
719 amba_ports[i] = uap;
720
721 amba_set_drvdata(dev, uap);
722 ret = uart_add_one_port(&amba_reg, &uap->port);
723 if (ret)
724 amba_ports[i] = NULL;
725
726 return ret;
727}
728
729static int pl010_remove(struct amba_device *dev)
730{
731 struct uart_amba_port *uap = amba_get_drvdata(dev);
732 int i;
733
734 uart_remove_one_port(&amba_reg, &uap->port);
735
736 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
737 if (amba_ports[i] == uap)
738 amba_ports[i] = NULL;
739
740 return 0;
741}
742
743#ifdef CONFIG_PM_SLEEP
744static int pl010_suspend(struct device *dev)
745{
746 struct uart_amba_port *uap = dev_get_drvdata(dev);
747
748 if (uap)
749 uart_suspend_port(&amba_reg, &uap->port);
750
751 return 0;
752}
753
754static int pl010_resume(struct device *dev)
755{
756 struct uart_amba_port *uap = dev_get_drvdata(dev);
757
758 if (uap)
759 uart_resume_port(&amba_reg, &uap->port);
760
761 return 0;
762}
763#endif
764
765static SIMPLE_DEV_PM_OPS(pl010_dev_pm_ops, pl010_suspend, pl010_resume);
766
767static struct amba_id pl010_ids[] = {
768 {
769 .id = 0x00041010,
770 .mask = 0x000fffff,
771 },
772 { 0, 0 },
773};
774
775MODULE_DEVICE_TABLE(amba, pl010_ids);
776
777static struct amba_driver pl010_driver = {
778 .drv = {
779 .name = "uart-pl010",
780 .pm = &pl010_dev_pm_ops,
781 },
782 .id_table = pl010_ids,
783 .probe = pl010_probe,
784 .remove = pl010_remove,
785};
786
787static int __init pl010_init(void)
788{
789 int ret;
790
791 printk(KERN_INFO "Serial: AMBA driver\n");
792
793 ret = uart_register_driver(&amba_reg);
794 if (ret == 0) {
795 ret = amba_driver_register(&pl010_driver);
796 if (ret)
797 uart_unregister_driver(&amba_reg);
798 }
799 return ret;
800}
801
802static void __exit pl010_exit(void)
803{
804 amba_driver_unregister(&pl010_driver);
805 uart_unregister_driver(&amba_reg);
806}
807
808module_init(pl010_init);
809module_exit(pl010_exit);
810
811MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
812MODULE_DESCRIPTION("ARM AMBA serial port driver");
813MODULE_LICENSE("GPL");
814