1#ifndef _LINUX_IRQ_H
2#define _LINUX_IRQ_H
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12#include <linux/smp.h>
13#include <linux/linkage.h>
14#include <linux/cache.h>
15#include <linux/spinlock.h>
16#include <linux/cpumask.h>
17#include <linux/gfp.h>
18#include <linux/irqreturn.h>
19#include <linux/irqnr.h>
20#include <linux/errno.h>
21#include <linux/topology.h>
22#include <linux/wait.h>
23
24#include <asm/irq.h>
25#include <asm/ptrace.h>
26#include <asm/irq_regs.h>
27
28struct seq_file;
29struct module;
30struct irq_desc;
31struct irq_data;
32typedef void (*irq_flow_handler_t)(unsigned int irq,
33 struct irq_desc *desc);
34typedef void (*irq_preflow_handler_t)(struct irq_data *data);
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77enum {
78 IRQ_TYPE_NONE = 0x00000000,
79 IRQ_TYPE_EDGE_RISING = 0x00000001,
80 IRQ_TYPE_EDGE_FALLING = 0x00000002,
81 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
82 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
83 IRQ_TYPE_LEVEL_LOW = 0x00000008,
84 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
85 IRQ_TYPE_SENSE_MASK = 0x0000000f,
86 IRQ_TYPE_DEFAULT = IRQ_TYPE_SENSE_MASK,
87
88 IRQ_TYPE_PROBE = 0x00000010,
89
90 IRQ_LEVEL = (1 << 8),
91 IRQ_PER_CPU = (1 << 9),
92 IRQ_NOPROBE = (1 << 10),
93 IRQ_NOREQUEST = (1 << 11),
94 IRQ_NOAUTOEN = (1 << 12),
95 IRQ_NO_BALANCING = (1 << 13),
96 IRQ_MOVE_PCNTXT = (1 << 14),
97 IRQ_NESTED_THREAD = (1 << 15),
98 IRQ_NOTHREAD = (1 << 16),
99 IRQ_PER_CPU_DEVID = (1 << 17),
100 IRQ_IS_POLLED = (1 << 18),
101};
102
103#define IRQF_MODIFY_MASK \
104 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
105 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
106 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \
107 IRQ_IS_POLLED)
108
109#define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
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117enum {
118 IRQ_SET_MASK_OK = 0,
119 IRQ_SET_MASK_OK_NOCOPY,
120};
121
122struct msi_desc;
123struct irq_domain;
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146struct irq_data {
147 u32 mask;
148 unsigned int irq;
149 unsigned long hwirq;
150 unsigned int node;
151 unsigned int state_use_accessors;
152 struct irq_chip *chip;
153 struct irq_domain *domain;
154 void *handler_data;
155 void *chip_data;
156 struct msi_desc *msi_desc;
157 cpumask_var_t affinity;
158};
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178enum {
179 IRQD_TRIGGER_MASK = 0xf,
180 IRQD_SETAFFINITY_PENDING = (1 << 8),
181 IRQD_NO_BALANCING = (1 << 10),
182 IRQD_PER_CPU = (1 << 11),
183 IRQD_AFFINITY_SET = (1 << 12),
184 IRQD_LEVEL = (1 << 13),
185 IRQD_WAKEUP_STATE = (1 << 14),
186 IRQD_MOVE_PCNTXT = (1 << 15),
187 IRQD_IRQ_DISABLED = (1 << 16),
188 IRQD_IRQ_MASKED = (1 << 17),
189 IRQD_IRQ_INPROGRESS = (1 << 18),
190 IRQD_WAKEUP_ARMED = (1 << 19),
191};
192
193static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
194{
195 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
196}
197
198static inline bool irqd_is_per_cpu(struct irq_data *d)
199{
200 return d->state_use_accessors & IRQD_PER_CPU;
201}
202
203static inline bool irqd_can_balance(struct irq_data *d)
204{
205 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
206}
207
208static inline bool irqd_affinity_was_set(struct irq_data *d)
209{
210 return d->state_use_accessors & IRQD_AFFINITY_SET;
211}
212
213static inline void irqd_mark_affinity_was_set(struct irq_data *d)
214{
215 d->state_use_accessors |= IRQD_AFFINITY_SET;
216}
217
218static inline u32 irqd_get_trigger_type(struct irq_data *d)
219{
220 return d->state_use_accessors & IRQD_TRIGGER_MASK;
221}
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226static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
227{
228 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
229 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
230}
231
232static inline bool irqd_is_level_type(struct irq_data *d)
233{
234 return d->state_use_accessors & IRQD_LEVEL;
235}
236
237static inline bool irqd_is_wakeup_set(struct irq_data *d)
238{
239 return d->state_use_accessors & IRQD_WAKEUP_STATE;
240}
241
242static inline bool irqd_can_move_in_process_context(struct irq_data *d)
243{
244 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
245}
246
247static inline bool irqd_irq_disabled(struct irq_data *d)
248{
249 return d->state_use_accessors & IRQD_IRQ_DISABLED;
250}
251
252static inline bool irqd_irq_masked(struct irq_data *d)
253{
254 return d->state_use_accessors & IRQD_IRQ_MASKED;
255}
256
257static inline bool irqd_irq_inprogress(struct irq_data *d)
258{
259 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
260}
261
262static inline bool irqd_is_wakeup_armed(struct irq_data *d)
263{
264 return d->state_use_accessors & IRQD_WAKEUP_ARMED;
265}
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273static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
274{
275 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
276}
277
278static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
279{
280 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
281}
282
283static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
284{
285 return d->hwirq;
286}
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320struct irq_chip {
321 const char *name;
322 unsigned int (*irq_startup)(struct irq_data *data);
323 void (*irq_shutdown)(struct irq_data *data);
324 void (*irq_enable)(struct irq_data *data);
325 void (*irq_disable)(struct irq_data *data);
326
327 void (*irq_ack)(struct irq_data *data);
328 void (*irq_mask)(struct irq_data *data);
329 void (*irq_mask_ack)(struct irq_data *data);
330 void (*irq_unmask)(struct irq_data *data);
331 void (*irq_eoi)(struct irq_data *data);
332
333 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
334 int (*irq_retrigger)(struct irq_data *data);
335 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
336 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
337
338 void (*irq_bus_lock)(struct irq_data *data);
339 void (*irq_bus_sync_unlock)(struct irq_data *data);
340
341 void (*irq_cpu_online)(struct irq_data *data);
342 void (*irq_cpu_offline)(struct irq_data *data);
343
344 void (*irq_suspend)(struct irq_data *data);
345 void (*irq_resume)(struct irq_data *data);
346 void (*irq_pm_shutdown)(struct irq_data *data);
347
348 void (*irq_calc_mask)(struct irq_data *data);
349
350 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
351 int (*irq_request_resources)(struct irq_data *data);
352 void (*irq_release_resources)(struct irq_data *data);
353
354 unsigned long flags;
355};
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369enum {
370 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
371 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
372 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
373 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
374 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
375 IRQCHIP_ONESHOT_SAFE = (1 << 5),
376 IRQCHIP_EOI_THREADED = (1 << 6),
377};
378
379
380#include <linux/irqdesc.h>
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385#include <asm/hw_irq.h>
386
387#ifndef NR_IRQS_LEGACY
388# define NR_IRQS_LEGACY 0
389#endif
390
391#ifndef ARCH_IRQ_INIT_FLAGS
392# define ARCH_IRQ_INIT_FLAGS 0
393#endif
394
395#define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
396
397struct irqaction;
398extern int setup_irq(unsigned int irq, struct irqaction *new);
399extern void remove_irq(unsigned int irq, struct irqaction *act);
400extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
401extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
402
403extern void irq_cpu_online(void);
404extern void irq_cpu_offline(void);
405extern int irq_set_affinity_locked(struct irq_data *data,
406 const struct cpumask *cpumask, bool force);
407
408#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
409void irq_move_irq(struct irq_data *data);
410void irq_move_masked_irq(struct irq_data *data);
411#else
412static inline void irq_move_irq(struct irq_data *data) { }
413static inline void irq_move_masked_irq(struct irq_data *data) { }
414#endif
415
416extern int no_irq_affinity;
417
418#ifdef CONFIG_HARDIRQS_SW_RESEND
419int irq_set_parent(int irq, int parent_irq);
420#else
421static inline int irq_set_parent(int irq, int parent_irq)
422{
423 return 0;
424}
425#endif
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431extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
432extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
433extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
434extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
435extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
436extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
437extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc);
438extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
439extern void handle_nested_irq(unsigned int irq);
440
441
442extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
443 irqreturn_t action_ret);
444
445
446
447extern int noirqdebug_setup(char *str);
448
449
450extern int can_request_irq(unsigned int irq, unsigned long irqflags);
451
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453extern struct irq_chip no_irq_chip;
454extern struct irq_chip dummy_irq_chip;
455
456extern void
457irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
458 irq_flow_handler_t handle, const char *name);
459
460static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
461 irq_flow_handler_t handle)
462{
463 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
464}
465
466extern int irq_set_percpu_devid(unsigned int irq);
467
468extern void
469__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
470 const char *name);
471
472static inline void
473irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
474{
475 __irq_set_handler(irq, handle, 0, NULL);
476}
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483static inline void
484irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
485{
486 __irq_set_handler(irq, handle, 1, NULL);
487}
488
489void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
490
491static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
492{
493 irq_modify_status(irq, 0, set);
494}
495
496static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
497{
498 irq_modify_status(irq, clr, 0);
499}
500
501static inline void irq_set_noprobe(unsigned int irq)
502{
503 irq_modify_status(irq, 0, IRQ_NOPROBE);
504}
505
506static inline void irq_set_probe(unsigned int irq)
507{
508 irq_modify_status(irq, IRQ_NOPROBE, 0);
509}
510
511static inline void irq_set_nothread(unsigned int irq)
512{
513 irq_modify_status(irq, 0, IRQ_NOTHREAD);
514}
515
516static inline void irq_set_thread(unsigned int irq)
517{
518 irq_modify_status(irq, IRQ_NOTHREAD, 0);
519}
520
521static inline void irq_set_nested_thread(unsigned int irq, bool nest)
522{
523 if (nest)
524 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
525 else
526 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
527}
528
529static inline void irq_set_percpu_devid_flags(unsigned int irq)
530{
531 irq_set_status_flags(irq,
532 IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD |
533 IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
534}
535
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537extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
538extern int irq_set_handler_data(unsigned int irq, void *data);
539extern int irq_set_chip_data(unsigned int irq, void *data);
540extern int irq_set_irq_type(unsigned int irq, unsigned int type);
541extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
542extern int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
543 struct msi_desc *entry);
544extern struct irq_data *irq_get_irq_data(unsigned int irq);
545
546static inline struct irq_chip *irq_get_chip(unsigned int irq)
547{
548 struct irq_data *d = irq_get_irq_data(irq);
549 return d ? d->chip : NULL;
550}
551
552static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
553{
554 return d->chip;
555}
556
557static inline void *irq_get_chip_data(unsigned int irq)
558{
559 struct irq_data *d = irq_get_irq_data(irq);
560 return d ? d->chip_data : NULL;
561}
562
563static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
564{
565 return d->chip_data;
566}
567
568static inline void *irq_get_handler_data(unsigned int irq)
569{
570 struct irq_data *d = irq_get_irq_data(irq);
571 return d ? d->handler_data : NULL;
572}
573
574static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
575{
576 return d->handler_data;
577}
578
579static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
580{
581 struct irq_data *d = irq_get_irq_data(irq);
582 return d ? d->msi_desc : NULL;
583}
584
585static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
586{
587 return d->msi_desc;
588}
589
590static inline u32 irq_get_trigger_type(unsigned int irq)
591{
592 struct irq_data *d = irq_get_irq_data(irq);
593 return d ? irqd_get_trigger_type(d) : 0;
594}
595
596unsigned int arch_dynirq_lower_bound(unsigned int from);
597
598int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
599 struct module *owner);
600
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602#define irq_alloc_descs(irq, from, cnt, node) \
603 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
604
605#define irq_alloc_desc(node) \
606 irq_alloc_descs(-1, 0, 1, node)
607
608#define irq_alloc_desc_at(at, node) \
609 irq_alloc_descs(at, at, 1, node)
610
611#define irq_alloc_desc_from(from, node) \
612 irq_alloc_descs(-1, from, 1, node)
613
614#define irq_alloc_descs_from(from, cnt, node) \
615 irq_alloc_descs(-1, from, cnt, node)
616
617void irq_free_descs(unsigned int irq, unsigned int cnt);
618static inline void irq_free_desc(unsigned int irq)
619{
620 irq_free_descs(irq, 1);
621}
622
623#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
624unsigned int irq_alloc_hwirqs(int cnt, int node);
625static inline unsigned int irq_alloc_hwirq(int node)
626{
627 return irq_alloc_hwirqs(1, node);
628}
629void irq_free_hwirqs(unsigned int from, int cnt);
630static inline void irq_free_hwirq(unsigned int irq)
631{
632 return irq_free_hwirqs(irq, 1);
633}
634int arch_setup_hwirq(unsigned int irq, int node);
635void arch_teardown_hwirq(unsigned int irq);
636#endif
637
638#ifdef CONFIG_GENERIC_IRQ_LEGACY
639void irq_init_desc(unsigned int irq);
640#endif
641
642#ifndef irq_reg_writel
643# define irq_reg_writel(val, addr) writel(val, addr)
644#endif
645#ifndef irq_reg_readl
646# define irq_reg_readl(addr) readl(addr)
647#endif
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659struct irq_chip_regs {
660 unsigned long enable;
661 unsigned long disable;
662 unsigned long mask;
663 unsigned long ack;
664 unsigned long eoi;
665 unsigned long type;
666 unsigned long polarity;
667};
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682struct irq_chip_type {
683 struct irq_chip chip;
684 struct irq_chip_regs regs;
685 irq_flow_handler_t handler;
686 u32 type;
687 u32 mask_cache_priv;
688 u32 *mask_cache;
689};
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716struct irq_chip_generic {
717 raw_spinlock_t lock;
718 void __iomem *reg_base;
719 unsigned int irq_base;
720 unsigned int irq_cnt;
721 u32 mask_cache;
722 u32 type_cache;
723 u32 polarity_cache;
724 u32 wake_enabled;
725 u32 wake_active;
726 unsigned int num_ct;
727 void *private;
728 unsigned long installed;
729 unsigned long unused;
730 struct irq_domain *domain;
731 struct list_head list;
732 struct irq_chip_type chip_types[0];
733};
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744enum irq_gc_flags {
745 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
746 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
747 IRQ_GC_MASK_CACHE_PER_TYPE = 1 << 2,
748 IRQ_GC_NO_MASK = 1 << 3,
749};
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760struct irq_domain_chip_generic {
761 unsigned int irqs_per_chip;
762 unsigned int num_chips;
763 unsigned int irq_flags_to_clear;
764 unsigned int irq_flags_to_set;
765 enum irq_gc_flags gc_flags;
766 struct irq_chip_generic *gc[0];
767};
768
769
770void irq_gc_noop(struct irq_data *d);
771void irq_gc_mask_disable_reg(struct irq_data *d);
772void irq_gc_mask_set_bit(struct irq_data *d);
773void irq_gc_mask_clr_bit(struct irq_data *d);
774void irq_gc_unmask_enable_reg(struct irq_data *d);
775void irq_gc_ack_set_bit(struct irq_data *d);
776void irq_gc_ack_clr_bit(struct irq_data *d);
777void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
778void irq_gc_eoi(struct irq_data *d);
779int irq_gc_set_wake(struct irq_data *d, unsigned int on);
780
781
782int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
783 irq_hw_number_t hw_irq);
784struct irq_chip_generic *
785irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
786 void __iomem *reg_base, irq_flow_handler_t handler);
787void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
788 enum irq_gc_flags flags, unsigned int clr,
789 unsigned int set);
790int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
791void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
792 unsigned int clr, unsigned int set);
793
794struct irq_chip_generic *irq_get_domain_generic_chip(struct irq_domain *d, unsigned int hw_irq);
795int irq_alloc_domain_generic_chips(struct irq_domain *d, int irqs_per_chip,
796 int num_ct, const char *name,
797 irq_flow_handler_t handler,
798 unsigned int clr, unsigned int set,
799 enum irq_gc_flags flags);
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801
802static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
803{
804 return container_of(d->chip, struct irq_chip_type, chip);
805}
806
807#define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
808
809#ifdef CONFIG_SMP
810static inline void irq_gc_lock(struct irq_chip_generic *gc)
811{
812 raw_spin_lock(&gc->lock);
813}
814
815static inline void irq_gc_unlock(struct irq_chip_generic *gc)
816{
817 raw_spin_unlock(&gc->lock);
818}
819#else
820static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
821static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
822#endif
823
824#endif
825