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24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/pm.h>
29#include <linux/i2c.h>
30#include <linux/interrupt.h>
31#include <linux/gpio.h>
32#include <linux/regulator/consumer.h>
33#include <linux/slab.h>
34#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
38#include <sound/initval.h>
39#include <sound/tlv.h>
40
41#include <sound/tlv320dac33-plat.h>
42#include "tlv320dac33.h"
43
44
45
46
47
48
49
50#define DAC33_FIFO_SIZE_16BIT 6144
51#define DAC33_FIFO_SIZE_24BIT 4096
52#define DAC33_MODE7_MARGIN 10
53
54#define BURST_BASEFREQ_HZ 49152000
55
56#define SAMPLES_TO_US(rate, samples) \
57 (1000000000 / (((rate) * 1000) / (samples)))
58
59#define US_TO_SAMPLES(rate, us) \
60 ((rate) / (1000000 / ((us) < 1000000 ? (us) : 1000000)))
61
62#define UTHR_FROM_PERIOD_SIZE(samples, playrate, burstrate) \
63 (((samples)*5000) / (((burstrate)*5000) / ((burstrate) - (playrate))))
64
65static void dac33_calculate_times(struct snd_pcm_substream *substream,
66 struct snd_soc_codec *codec);
67static int dac33_prepare_chip(struct snd_pcm_substream *substream,
68 struct snd_soc_codec *codec);
69
70enum dac33_state {
71 DAC33_IDLE = 0,
72 DAC33_PREFILL,
73 DAC33_PLAYBACK,
74 DAC33_FLUSH,
75};
76
77enum dac33_fifo_modes {
78 DAC33_FIFO_BYPASS = 0,
79 DAC33_FIFO_MODE1,
80 DAC33_FIFO_MODE7,
81 DAC33_FIFO_LAST_MODE,
82};
83
84#define DAC33_NUM_SUPPLIES 3
85static const char *dac33_supply_names[DAC33_NUM_SUPPLIES] = {
86 "AVDD",
87 "DVDD",
88 "IOVDD",
89};
90
91struct tlv320dac33_priv {
92 struct mutex mutex;
93 struct workqueue_struct *dac33_wq;
94 struct work_struct work;
95 struct snd_soc_codec *codec;
96 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES];
97 struct snd_pcm_substream *substream;
98 int power_gpio;
99 int chip_power;
100 int irq;
101 unsigned int refclk;
102
103 unsigned int alarm_threshold;
104 enum dac33_fifo_modes fifo_mode;
105 unsigned int fifo_size;
106 unsigned int nsample;
107 int mode1_latency;
108
109 u8 burst_bclkdiv;
110 unsigned int burst_rate;
111
112 int keep_bclk;
113
114 spinlock_t lock;
115 unsigned long long t_stamp1;
116 unsigned long long t_stamp2;
117
118 unsigned int mode1_us_burst;
119
120 unsigned int mode7_us_to_lthr;
121
122 unsigned int uthr;
123
124 enum dac33_state state;
125 void *control_data;
126};
127
128static const u8 dac33_reg[DAC33_CACHEREGNUM] = {
1290x00, 0x00, 0x00, 0x00,
1300x00, 0x00, 0x00, 0x00,
1310x00, 0x00, 0x00, 0x00,
1320x00, 0x00, 0x00, 0x00,
1330x00, 0x00, 0x00, 0x00,
1340x00, 0x00, 0x00, 0x00,
1350x00, 0x00, 0x00, 0x00,
1360x00, 0x00, 0x00, 0x00,
1370x00, 0x00, 0x00, 0x00,
1380x00, 0x00, 0x00, 0x00,
1390x00, 0x00, 0x00, 0x00,
1400x00, 0x00, 0x00, 0x80,
1410x80, 0x00, 0x00, 0x00,
1420x00, 0x00, 0x00, 0x00,
1430x00, 0x00,
144
145 0x00, 0x00,
1460x00, 0x00, 0x00, 0x00,
147
1480x00, 0x00, 0x00, 0x00,
1490x00, 0x80,
150
151 0x80, 0x80,
152
1530x80, 0x00, 0x00,
154
155 0x00,
1560x00, 0x00, 0x00, 0x00,
1570x00, 0x00, 0x00, 0x00,
1580x00, 0x00, 0x00, 0x00,
1590x00, 0x00, 0x00, 0x00,
1600x00, 0x00, 0x00, 0x00,
1610x00, 0x00, 0x00, 0x00,
1620x00, 0x00, 0x00, 0x00,
1630x00, 0x00, 0x00, 0x00,
1640x00, 0x00, 0x00, 0x00,
1650x00, 0x00, 0x00, 0x00,
1660x00, 0x00, 0x00, 0x00,
1670x00, 0x00, 0x00, 0x00,
1680x00,
169
170 0xda, 0x33, 0x03,
171};
172
173
174static inline unsigned int dac33_read_reg_cache(struct snd_soc_codec *codec,
175 unsigned reg)
176{
177 u8 *cache = codec->reg_cache;
178 if (reg >= DAC33_CACHEREGNUM)
179 return 0;
180
181 return cache[reg];
182}
183
184static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
185 u8 reg, u8 value)
186{
187 u8 *cache = codec->reg_cache;
188 if (reg >= DAC33_CACHEREGNUM)
189 return;
190
191 cache[reg] = value;
192}
193
194static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
195 u8 *value)
196{
197 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
198 int val, ret = 0;
199
200 *value = reg & 0xff;
201
202
203 if (dac33->chip_power) {
204 val = i2c_smbus_read_byte_data(codec->control_data, value[0]);
205 if (val < 0) {
206 dev_err(codec->dev, "Read failed (%d)\n", val);
207 value[0] = dac33_read_reg_cache(codec, reg);
208 ret = val;
209 } else {
210 value[0] = val;
211 dac33_write_reg_cache(codec, reg, val);
212 }
213 } else {
214 value[0] = dac33_read_reg_cache(codec, reg);
215 }
216
217 return ret;
218}
219
220static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
221 unsigned int value)
222{
223 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
224 u8 data[2];
225 int ret = 0;
226
227
228
229
230
231
232 data[0] = reg & 0xff;
233 data[1] = value & 0xff;
234
235 dac33_write_reg_cache(codec, data[0], data[1]);
236 if (dac33->chip_power) {
237 ret = codec->hw_write(codec->control_data, data, 2);
238 if (ret != 2)
239 dev_err(codec->dev, "Write failed (%d)\n", ret);
240 else
241 ret = 0;
242 }
243
244 return ret;
245}
246
247static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
248 unsigned int value)
249{
250 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
251 int ret;
252
253 mutex_lock(&dac33->mutex);
254 ret = dac33_write(codec, reg, value);
255 mutex_unlock(&dac33->mutex);
256
257 return ret;
258}
259
260#define DAC33_I2C_ADDR_AUTOINC 0x80
261static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
262 unsigned int value)
263{
264 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
265 u8 data[3];
266 int ret = 0;
267
268
269
270
271
272
273
274 data[0] = reg & 0xff;
275 data[1] = (value >> 8) & 0xff;
276 data[2] = value & 0xff;
277
278 dac33_write_reg_cache(codec, data[0], data[1]);
279 dac33_write_reg_cache(codec, data[0] + 1, data[2]);
280
281 if (dac33->chip_power) {
282
283 data[0] |= DAC33_I2C_ADDR_AUTOINC;
284 ret = codec->hw_write(codec->control_data, data, 3);
285 if (ret != 3)
286 dev_err(codec->dev, "Write failed (%d)\n", ret);
287 else
288 ret = 0;
289 }
290
291 return ret;
292}
293
294static void dac33_init_chip(struct snd_soc_codec *codec)
295{
296 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
297
298 if (unlikely(!dac33->chip_power))
299 return;
300
301
302 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
303
304 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
305 DAC33_DACSRCL_LEFT);
306
307 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
308
309
310
311 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
312
313
314 dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL,
315 dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL));
316 dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL,
317 dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL));
318
319 dac33_write(codec, DAC33_LINEL_TO_LLO_VOL,
320 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
321 dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
322 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
323
324 dac33_write(codec, DAC33_OUT_AMP_CTRL,
325 dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL));
326
327 dac33_write(codec, DAC33_LDAC_PWR_CTRL,
328 dac33_read_reg_cache(codec, DAC33_LDAC_PWR_CTRL));
329 dac33_write(codec, DAC33_RDAC_PWR_CTRL,
330 dac33_read_reg_cache(codec, DAC33_RDAC_PWR_CTRL));
331}
332
333static inline int dac33_read_id(struct snd_soc_codec *codec)
334{
335 int i, ret = 0;
336 u8 reg;
337
338 for (i = 0; i < 3; i++) {
339 ret = dac33_read(codec, DAC33_DEVICE_ID_MSB + i, ®);
340 if (ret < 0)
341 break;
342 }
343
344 return ret;
345}
346
347static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
348{
349 u8 reg;
350
351 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
352 if (power)
353 reg |= DAC33_PDNALLB;
354 else
355 reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB |
356 DAC33_DACRPDNB | DAC33_DACLPDNB);
357 dac33_write(codec, DAC33_PWR_CTRL, reg);
358}
359
360static inline void dac33_disable_digital(struct snd_soc_codec *codec)
361{
362 u8 reg;
363
364
365 reg = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
366 reg &= ~DAC33_BCLKON;
367 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg);
368
369
370 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
371 reg &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
372 dac33_write(codec, DAC33_PWR_CTRL, reg);
373}
374
375static int dac33_hard_power(struct snd_soc_codec *codec, int power)
376{
377 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
378 int ret = 0;
379
380 mutex_lock(&dac33->mutex);
381
382
383 if (unlikely(power == dac33->chip_power)) {
384 dev_dbg(codec->dev, "Trying to set the same power state: %s\n",
385 power ? "ON" : "OFF");
386 goto exit;
387 }
388
389 if (power) {
390 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies),
391 dac33->supplies);
392 if (ret != 0) {
393 dev_err(codec->dev,
394 "Failed to enable supplies: %d\n", ret);
395 goto exit;
396 }
397
398 if (dac33->power_gpio >= 0)
399 gpio_set_value(dac33->power_gpio, 1);
400
401 dac33->chip_power = 1;
402 } else {
403 dac33_soft_power(codec, 0);
404 if (dac33->power_gpio >= 0)
405 gpio_set_value(dac33->power_gpio, 0);
406
407 ret = regulator_bulk_disable(ARRAY_SIZE(dac33->supplies),
408 dac33->supplies);
409 if (ret != 0) {
410 dev_err(codec->dev,
411 "Failed to disable supplies: %d\n", ret);
412 goto exit;
413 }
414
415 dac33->chip_power = 0;
416 }
417
418exit:
419 mutex_unlock(&dac33->mutex);
420 return ret;
421}
422
423static int dac33_playback_event(struct snd_soc_dapm_widget *w,
424 struct snd_kcontrol *kcontrol, int event)
425{
426 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(w->codec);
427
428 switch (event) {
429 case SND_SOC_DAPM_PRE_PMU:
430 if (likely(dac33->substream)) {
431 dac33_calculate_times(dac33->substream, w->codec);
432 dac33_prepare_chip(dac33->substream, w->codec);
433 }
434 break;
435 case SND_SOC_DAPM_POST_PMD:
436 dac33_disable_digital(w->codec);
437 break;
438 }
439 return 0;
440}
441
442static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol)
444{
445 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
446 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
447
448 ucontrol->value.integer.value[0] = dac33->fifo_mode;
449
450 return 0;
451}
452
453static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
454 struct snd_ctl_elem_value *ucontrol)
455{
456 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
457 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
458 int ret = 0;
459
460 if (dac33->fifo_mode == ucontrol->value.integer.value[0])
461 return 0;
462
463 if (snd_soc_codec_is_active(codec))
464 return -EPERM;
465
466 if (ucontrol->value.integer.value[0] < 0 ||
467 ucontrol->value.integer.value[0] >= DAC33_FIFO_LAST_MODE)
468 ret = -EINVAL;
469 else
470 dac33->fifo_mode = ucontrol->value.integer.value[0];
471
472 return ret;
473}
474
475
476static const char *dac33_fifo_mode_texts[] = {
477 "Bypass", "Mode 1", "Mode 7"
478};
479
480static SOC_ENUM_SINGLE_EXT_DECL(dac33_fifo_mode_enum, dac33_fifo_mode_texts);
481
482
483static const char *lr_lineout_gain_texts[] = {
484 "Line -12dB DAC 0dB", "Line -6dB DAC 6dB",
485 "Line 0dB DAC 12dB", "Line 6dB DAC 18dB",
486};
487
488static SOC_ENUM_SINGLE_DECL(l_lineout_gain_enum,
489 DAC33_LDAC_PWR_CTRL, 0,
490 lr_lineout_gain_texts);
491
492static SOC_ENUM_SINGLE_DECL(r_lineout_gain_enum,
493 DAC33_RDAC_PWR_CTRL, 0,
494 lr_lineout_gain_texts);
495
496
497
498
499
500
501
502
503static DECLARE_TLV_DB_SCALE(dac_digivol_tlv, -6350, 50, 0);
504
505static const struct snd_kcontrol_new dac33_snd_controls[] = {
506 SOC_DOUBLE_R_TLV("DAC Digital Playback Volume",
507 DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL,
508 0, 0x7f, 1, dac_digivol_tlv),
509 SOC_DOUBLE_R("DAC Digital Playback Switch",
510 DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL, 7, 1, 1),
511 SOC_DOUBLE_R("Line to Line Out Volume",
512 DAC33_LINEL_TO_LLO_VOL, DAC33_LINER_TO_RLO_VOL, 0, 127, 1),
513 SOC_ENUM("Left Line Output Gain", l_lineout_gain_enum),
514 SOC_ENUM("Right Line Output Gain", r_lineout_gain_enum),
515};
516
517static const struct snd_kcontrol_new dac33_mode_snd_controls[] = {
518 SOC_ENUM_EXT("FIFO Mode", dac33_fifo_mode_enum,
519 dac33_get_fifo_mode, dac33_set_fifo_mode),
520};
521
522
523static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
524 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1);
525
526static const struct snd_kcontrol_new dac33_dapm_abypassr_control =
527 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1);
528
529
530static const char *dac33_lr_lom_texts[] = {"DAC", "LOP"};
531
532static SOC_ENUM_SINGLE_DECL(dac33_left_lom_enum,
533 DAC33_OUT_AMP_CTRL, 3,
534 dac33_lr_lom_texts);
535
536static const struct snd_kcontrol_new dac33_dapm_left_lom_control =
537SOC_DAPM_ENUM("Route", dac33_left_lom_enum);
538
539static SOC_ENUM_SINGLE_DECL(dac33_right_lom_enum,
540 DAC33_OUT_AMP_CTRL, 2,
541 dac33_lr_lom_texts);
542
543static const struct snd_kcontrol_new dac33_dapm_right_lom_control =
544SOC_DAPM_ENUM("Route", dac33_right_lom_enum);
545
546static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
547 SND_SOC_DAPM_OUTPUT("LEFT_LO"),
548 SND_SOC_DAPM_OUTPUT("RIGHT_LO"),
549
550 SND_SOC_DAPM_INPUT("LINEL"),
551 SND_SOC_DAPM_INPUT("LINER"),
552
553 SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0),
554 SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0),
555
556
557 SND_SOC_DAPM_SWITCH("Analog Left Bypass", SND_SOC_NOPM, 0, 0,
558 &dac33_dapm_abypassl_control),
559 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0,
560 &dac33_dapm_abypassr_control),
561
562 SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0,
563 &dac33_dapm_left_lom_control),
564 SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0,
565 &dac33_dapm_right_lom_control),
566
567
568
569
570
571 SND_SOC_DAPM_PGA("Left Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
572 SND_SOC_DAPM_PGA("Right Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
573
574 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier",
575 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
576 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier",
577 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0),
578
579 SND_SOC_DAPM_SUPPLY("Left DAC Power",
580 DAC33_LDAC_PWR_CTRL, 2, 0, NULL, 0),
581 SND_SOC_DAPM_SUPPLY("Right DAC Power",
582 DAC33_RDAC_PWR_CTRL, 2, 0, NULL, 0),
583
584 SND_SOC_DAPM_SUPPLY("Codec Power",
585 DAC33_PWR_CTRL, 4, 0, NULL, 0),
586
587 SND_SOC_DAPM_PRE("Pre Playback", dac33_playback_event),
588 SND_SOC_DAPM_POST("Post Playback", dac33_playback_event),
589};
590
591static const struct snd_soc_dapm_route audio_map[] = {
592
593 {"Analog Left Bypass", "Switch", "LINEL"},
594 {"Analog Right Bypass", "Switch", "LINER"},
595
596 {"Output Left Amplifier", NULL, "DACL"},
597 {"Output Right Amplifier", NULL, "DACR"},
598
599 {"Left Bypass PGA", NULL, "Analog Left Bypass"},
600 {"Right Bypass PGA", NULL, "Analog Right Bypass"},
601
602 {"Left LOM Inverted From", "DAC", "Left Bypass PGA"},
603 {"Right LOM Inverted From", "DAC", "Right Bypass PGA"},
604 {"Left LOM Inverted From", "LOP", "Analog Left Bypass"},
605 {"Right LOM Inverted From", "LOP", "Analog Right Bypass"},
606
607 {"Output Left Amplifier", NULL, "Left LOM Inverted From"},
608 {"Output Right Amplifier", NULL, "Right LOM Inverted From"},
609
610 {"DACL", NULL, "Left DAC Power"},
611 {"DACR", NULL, "Right DAC Power"},
612
613 {"Left Bypass PGA", NULL, "Left DAC Power"},
614 {"Right Bypass PGA", NULL, "Right DAC Power"},
615
616
617 {"LEFT_LO", NULL, "Output Left Amplifier"},
618 {"RIGHT_LO", NULL, "Output Right Amplifier"},
619
620 {"LEFT_LO", NULL, "Codec Power"},
621 {"RIGHT_LO", NULL, "Codec Power"},
622};
623
624static int dac33_set_bias_level(struct snd_soc_codec *codec,
625 enum snd_soc_bias_level level)
626{
627 int ret;
628
629 switch (level) {
630 case SND_SOC_BIAS_ON:
631 break;
632 case SND_SOC_BIAS_PREPARE:
633 break;
634 case SND_SOC_BIAS_STANDBY:
635 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
636
637 ret = dac33_hard_power(codec, 1);
638 if (ret != 0)
639 return ret;
640
641 dac33_init_chip(codec);
642 }
643 break;
644 case SND_SOC_BIAS_OFF:
645
646 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
647 return 0;
648 ret = dac33_hard_power(codec, 0);
649 if (ret != 0)
650 return ret;
651 break;
652 }
653 codec->dapm.bias_level = level;
654
655 return 0;
656}
657
658static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
659{
660 struct snd_soc_codec *codec = dac33->codec;
661 unsigned int delay;
662 unsigned long flags;
663
664 switch (dac33->fifo_mode) {
665 case DAC33_FIFO_MODE1:
666 dac33_write16(codec, DAC33_NSAMPLE_MSB,
667 DAC33_THRREG(dac33->nsample));
668
669
670 spin_lock_irqsave(&dac33->lock, flags);
671 dac33->t_stamp2 = ktime_to_us(ktime_get());
672 dac33->t_stamp1 = dac33->t_stamp2;
673 spin_unlock_irqrestore(&dac33->lock, flags);
674
675 dac33_write16(codec, DAC33_PREFILL_MSB,
676 DAC33_THRREG(dac33->alarm_threshold));
677
678 delay = SAMPLES_TO_US(dac33->burst_rate,
679 dac33->alarm_threshold) + 1000;
680 usleep_range(delay, delay + 500);
681 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
682 break;
683 case DAC33_FIFO_MODE7:
684
685 spin_lock_irqsave(&dac33->lock, flags);
686 dac33->t_stamp1 = ktime_to_us(ktime_get());
687
688 dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
689 spin_unlock_irqrestore(&dac33->lock, flags);
690
691 dac33_write16(codec, DAC33_PREFILL_MSB,
692 DAC33_THRREG(DAC33_MODE7_MARGIN));
693
694
695 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
696 break;
697 default:
698 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
699 dac33->fifo_mode);
700 break;
701 }
702}
703
704static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
705{
706 struct snd_soc_codec *codec = dac33->codec;
707 unsigned long flags;
708
709 switch (dac33->fifo_mode) {
710 case DAC33_FIFO_MODE1:
711
712 spin_lock_irqsave(&dac33->lock, flags);
713 dac33->t_stamp2 = ktime_to_us(ktime_get());
714 spin_unlock_irqrestore(&dac33->lock, flags);
715
716 dac33_write16(codec, DAC33_NSAMPLE_MSB,
717 DAC33_THRREG(dac33->nsample));
718 break;
719 case DAC33_FIFO_MODE7:
720
721 break;
722 default:
723 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
724 dac33->fifo_mode);
725 break;
726 }
727}
728
729static void dac33_work(struct work_struct *work)
730{
731 struct snd_soc_codec *codec;
732 struct tlv320dac33_priv *dac33;
733 u8 reg;
734
735 dac33 = container_of(work, struct tlv320dac33_priv, work);
736 codec = dac33->codec;
737
738 mutex_lock(&dac33->mutex);
739 switch (dac33->state) {
740 case DAC33_PREFILL:
741 dac33->state = DAC33_PLAYBACK;
742 dac33_prefill_handler(dac33);
743 break;
744 case DAC33_PLAYBACK:
745 dac33_playback_handler(dac33);
746 break;
747 case DAC33_IDLE:
748 break;
749 case DAC33_FLUSH:
750 dac33->state = DAC33_IDLE;
751
752 dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
753
754
755 reg = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
756 reg |= DAC33_FIFOFLUSH;
757 dac33_write(codec, DAC33_FIFO_CTRL_A, reg);
758 break;
759 }
760 mutex_unlock(&dac33->mutex);
761}
762
763static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
764{
765 struct snd_soc_codec *codec = dev;
766 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
767 unsigned long flags;
768
769 spin_lock_irqsave(&dac33->lock, flags);
770 dac33->t_stamp1 = ktime_to_us(ktime_get());
771 spin_unlock_irqrestore(&dac33->lock, flags);
772
773
774 if (dac33->fifo_mode != DAC33_FIFO_MODE7)
775 queue_work(dac33->dac33_wq, &dac33->work);
776
777 return IRQ_HANDLED;
778}
779
780static void dac33_oscwait(struct snd_soc_codec *codec)
781{
782 int timeout = 60;
783 u8 reg;
784
785 do {
786 usleep_range(1000, 2000);
787 dac33_read(codec, DAC33_INT_OSC_STATUS, ®);
788 } while (((reg & 0x03) != DAC33_OSCSTATUS_NORMAL) && timeout--);
789 if ((reg & 0x03) != DAC33_OSCSTATUS_NORMAL)
790 dev_err(codec->dev,
791 "internal oscillator calibration failed\n");
792}
793
794static int dac33_startup(struct snd_pcm_substream *substream,
795 struct snd_soc_dai *dai)
796{
797 struct snd_soc_codec *codec = dai->codec;
798 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
799
800
801 dac33->substream = substream;
802
803 return 0;
804}
805
806static void dac33_shutdown(struct snd_pcm_substream *substream,
807 struct snd_soc_dai *dai)
808{
809 struct snd_soc_codec *codec = dai->codec;
810 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
811
812 dac33->substream = NULL;
813}
814
815#define CALC_BURST_RATE(bclkdiv, bclk_per_sample) \
816 (BURST_BASEFREQ_HZ / bclkdiv / bclk_per_sample)
817static int dac33_hw_params(struct snd_pcm_substream *substream,
818 struct snd_pcm_hw_params *params,
819 struct snd_soc_dai *dai)
820{
821 struct snd_soc_codec *codec = dai->codec;
822 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
823
824
825 switch (params_rate(params)) {
826 case 44100:
827 case 48000:
828 break;
829 default:
830 dev_err(codec->dev, "unsupported rate %d\n",
831 params_rate(params));
832 return -EINVAL;
833 }
834
835 switch (params_width(params)) {
836 case 16:
837 dac33->fifo_size = DAC33_FIFO_SIZE_16BIT;
838 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32);
839 break;
840 case 32:
841 dac33->fifo_size = DAC33_FIFO_SIZE_24BIT;
842 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
843 break;
844 default:
845 dev_err(codec->dev, "unsupported width %d\n",
846 params_width(params));
847 return -EINVAL;
848 }
849
850 return 0;
851}
852
853#define CALC_OSCSET(rate, refclk) ( \
854 ((((rate * 10000) / refclk) * 4096) + 7000) / 10000)
855#define CALC_RATIOSET(rate, refclk) ( \
856 ((((refclk * 100000) / rate) * 16384) + 50000) / 100000)
857
858
859
860
861
862
863static int dac33_prepare_chip(struct snd_pcm_substream *substream,
864 struct snd_soc_codec *codec)
865{
866 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
867 unsigned int oscset, ratioset, pwr_ctrl, reg_tmp;
868 u8 aictrl_a, aictrl_b, fifoctrl_a;
869
870 switch (substream->runtime->rate) {
871 case 44100:
872 case 48000:
873 oscset = CALC_OSCSET(substream->runtime->rate, dac33->refclk);
874 ratioset = CALC_RATIOSET(substream->runtime->rate,
875 dac33->refclk);
876 break;
877 default:
878 dev_err(codec->dev, "unsupported rate %d\n",
879 substream->runtime->rate);
880 return -EINVAL;
881 }
882
883
884 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
885 aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK);
886
887 fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
888 fifoctrl_a &= ~DAC33_FIFOFLUSH;
889
890 fifoctrl_a &= ~DAC33_WIDTH;
891 switch (substream->runtime->format) {
892 case SNDRV_PCM_FORMAT_S16_LE:
893 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16);
894 fifoctrl_a |= DAC33_WIDTH;
895 break;
896 case SNDRV_PCM_FORMAT_S32_LE:
897 aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24);
898 break;
899 default:
900 dev_err(codec->dev, "unsupported format %d\n",
901 substream->runtime->format);
902 return -EINVAL;
903 }
904
905 mutex_lock(&dac33->mutex);
906
907 if (!dac33->chip_power) {
908
909
910
911
912 mutex_unlock(&dac33->mutex);
913 return 0;
914 }
915
916 dac33_soft_power(codec, 0);
917 dac33_soft_power(codec, 1);
918
919 reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
920 dac33_write(codec, DAC33_INT_OSC_CTRL, reg_tmp);
921
922
923 dac33_write16(codec, DAC33_INT_OSC_FREQ_RAT_A, oscset);
924
925
926 dac33_write(codec, DAC33_CALIB_TIME, 96);
927
928
929 dac33_write(codec, DAC33_INT_OSC_CTRL_B, DAC33_ADJTHRSHLD(2) |
930 DAC33_ADJSTEP(1));
931
932
933 dac33_write(codec, DAC33_INT_OSC_CTRL_C, DAC33_REFDIV(4));
934
935 pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
936 pwr_ctrl |= DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB;
937 dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
938
939 dac33_oscwait(codec);
940
941 if (dac33->fifo_mode) {
942
943
944 dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
945 dac33_write(codec, DAC33_ASRC_CTRL_B, 1);
946
947
948 dac33_write16(codec, DAC33_SRC_REF_CLK_RATIO_A, ratioset);
949
950
951 dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH);
952 } else {
953
954
955 dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP);
956 dac33_write(codec, DAC33_ASRC_CTRL_B, 0);
957 }
958
959
960 switch (dac33->fifo_mode) {
961 case DAC33_FIFO_MODE1:
962 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
963 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
964 break;
965 case DAC33_FIFO_MODE7:
966 dac33_write(codec, DAC33_FIFO_IRQ_MODE_A,
967 DAC33_UTM(DAC33_FIFO_IRQ_MODE_LEVEL));
968 break;
969 default:
970
971 break;
972 }
973
974 aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
975
976 switch (dac33->fifo_mode) {
977 case DAC33_FIFO_MODE1:
978
979
980
981
982
983
984 fifoctrl_a &= ~DAC33_FBYPAS;
985 fifoctrl_a &= ~DAC33_FAUTO;
986 if (dac33->keep_bclk)
987 aictrl_b |= DAC33_BCLKON;
988 else
989 aictrl_b &= ~DAC33_BCLKON;
990 break;
991 case DAC33_FIFO_MODE7:
992
993
994
995
996
997
998 fifoctrl_a &= ~DAC33_FBYPAS;
999 fifoctrl_a |= DAC33_FAUTO;
1000 if (dac33->keep_bclk)
1001 aictrl_b |= DAC33_BCLKON;
1002 else
1003 aictrl_b &= ~DAC33_BCLKON;
1004 break;
1005 default:
1006
1007
1008
1009
1010
1011 fifoctrl_a |= DAC33_FBYPAS;
1012 aictrl_b |= DAC33_BCLKON;
1013 break;
1014 }
1015
1016 dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a);
1017 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
1018 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029 if (dac33->fifo_mode)
1030 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
1031 dac33->burst_bclkdiv);
1032 else
1033 if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
1034 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
1035 else
1036 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16);
1037
1038 switch (dac33->fifo_mode) {
1039 case DAC33_FIFO_MODE1:
1040 dac33_write16(codec, DAC33_ATHR_MSB,
1041 DAC33_THRREG(dac33->alarm_threshold));
1042 break;
1043 case DAC33_FIFO_MODE7:
1044
1045
1046
1047
1048 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
1049 dac33_write16(codec, DAC33_LTHR_MSB,
1050 DAC33_THRREG(DAC33_MODE7_MARGIN));
1051 break;
1052 default:
1053 break;
1054 }
1055
1056 mutex_unlock(&dac33->mutex);
1057
1058 return 0;
1059}
1060
1061static void dac33_calculate_times(struct snd_pcm_substream *substream,
1062 struct snd_soc_codec *codec)
1063{
1064 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1065 unsigned int period_size = substream->runtime->period_size;
1066 unsigned int rate = substream->runtime->rate;
1067 unsigned int nsample_limit;
1068
1069
1070 if (!dac33->fifo_mode)
1071 return;
1072
1073 switch (dac33->fifo_mode) {
1074 case DAC33_FIFO_MODE1:
1075
1076 dac33->alarm_threshold = US_TO_SAMPLES(rate,
1077 dac33->mode1_latency);
1078 nsample_limit = dac33->fifo_size - dac33->alarm_threshold;
1079
1080 if (period_size <= dac33->alarm_threshold)
1081
1082
1083
1084
1085 dac33->nsample = period_size *
1086 ((dac33->alarm_threshold / period_size) +
1087 (dac33->alarm_threshold % period_size ?
1088 1 : 0));
1089 else if (period_size > nsample_limit)
1090 dac33->nsample = nsample_limit;
1091 else
1092 dac33->nsample = period_size;
1093
1094 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
1095 dac33->nsample);
1096 dac33->t_stamp1 = 0;
1097 dac33->t_stamp2 = 0;
1098 break;
1099 case DAC33_FIFO_MODE7:
1100 dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate,
1101 dac33->burst_rate) + 9;
1102 if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN))
1103 dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN;
1104 if (dac33->uthr < (DAC33_MODE7_MARGIN + 10))
1105 dac33->uthr = (DAC33_MODE7_MARGIN + 10);
1106
1107 dac33->mode7_us_to_lthr =
1108 SAMPLES_TO_US(substream->runtime->rate,
1109 dac33->uthr - DAC33_MODE7_MARGIN + 1);
1110 dac33->t_stamp1 = 0;
1111 break;
1112 default:
1113 break;
1114 }
1115
1116}
1117
1118static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
1119 struct snd_soc_dai *dai)
1120{
1121 struct snd_soc_codec *codec = dai->codec;
1122 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1123 int ret = 0;
1124
1125 switch (cmd) {
1126 case SNDRV_PCM_TRIGGER_START:
1127 case SNDRV_PCM_TRIGGER_RESUME:
1128 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1129 if (dac33->fifo_mode) {
1130 dac33->state = DAC33_PREFILL;
1131 queue_work(dac33->dac33_wq, &dac33->work);
1132 }
1133 break;
1134 case SNDRV_PCM_TRIGGER_STOP:
1135 case SNDRV_PCM_TRIGGER_SUSPEND:
1136 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1137 if (dac33->fifo_mode) {
1138 dac33->state = DAC33_FLUSH;
1139 queue_work(dac33->dac33_wq, &dac33->work);
1140 }
1141 break;
1142 default:
1143 ret = -EINVAL;
1144 }
1145
1146 return ret;
1147}
1148
1149static snd_pcm_sframes_t dac33_dai_delay(
1150 struct snd_pcm_substream *substream,
1151 struct snd_soc_dai *dai)
1152{
1153 struct snd_soc_codec *codec = dai->codec;
1154 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1155 unsigned long long t0, t1, t_now;
1156 unsigned int time_delta, uthr;
1157 int samples_out, samples_in, samples;
1158 snd_pcm_sframes_t delay = 0;
1159 unsigned long flags;
1160
1161 switch (dac33->fifo_mode) {
1162 case DAC33_FIFO_BYPASS:
1163 break;
1164 case DAC33_FIFO_MODE1:
1165 spin_lock_irqsave(&dac33->lock, flags);
1166 t0 = dac33->t_stamp1;
1167 t1 = dac33->t_stamp2;
1168 spin_unlock_irqrestore(&dac33->lock, flags);
1169 t_now = ktime_to_us(ktime_get());
1170
1171
1172 if (!t1)
1173 goto out;
1174
1175 if (t0 > t1) {
1176
1177
1178
1179
1180 time_delta = t_now - t0;
1181 samples_out = time_delta ? US_TO_SAMPLES(
1182 substream->runtime->rate,
1183 time_delta) : 0;
1184
1185 if (likely(dac33->alarm_threshold > samples_out))
1186 delay = dac33->alarm_threshold - samples_out;
1187 else
1188 delay = 0;
1189 } else if ((t_now - t1) <= dac33->mode1_us_burst) {
1190
1191
1192
1193
1194 time_delta = t_now - t0;
1195 samples_out = time_delta ? US_TO_SAMPLES(
1196 substream->runtime->rate,
1197 time_delta) : 0;
1198
1199 time_delta = t_now - t1;
1200 samples_in = time_delta ? US_TO_SAMPLES(
1201 dac33->burst_rate,
1202 time_delta) : 0;
1203
1204 samples = dac33->alarm_threshold;
1205 samples += (samples_in - samples_out);
1206
1207 if (likely(samples > 0))
1208 delay = samples;
1209 else
1210 delay = 0;
1211 } else {
1212
1213
1214
1215
1216 time_delta = t_now - t0;
1217 samples_out = time_delta ? US_TO_SAMPLES(
1218 substream->runtime->rate,
1219 time_delta) : 0;
1220
1221 samples_in = dac33->nsample;
1222 samples = dac33->alarm_threshold;
1223 samples += (samples_in - samples_out);
1224
1225 if (likely(samples > 0))
1226 delay = samples > dac33->fifo_size ?
1227 dac33->fifo_size : samples;
1228 else
1229 delay = 0;
1230 }
1231 break;
1232 case DAC33_FIFO_MODE7:
1233 spin_lock_irqsave(&dac33->lock, flags);
1234 t0 = dac33->t_stamp1;
1235 uthr = dac33->uthr;
1236 spin_unlock_irqrestore(&dac33->lock, flags);
1237 t_now = ktime_to_us(ktime_get());
1238
1239
1240 if (!t0)
1241 goto out;
1242
1243 if (t_now <= t0) {
1244
1245
1246
1247
1248 delay = uthr;
1249 goto out;
1250 }
1251
1252 time_delta = t_now - t0;
1253 if (time_delta <= dac33->mode7_us_to_lthr) {
1254
1255
1256
1257
1258 samples_out = US_TO_SAMPLES(
1259 substream->runtime->rate,
1260 time_delta);
1261
1262 if (likely(uthr > samples_out))
1263 delay = uthr - samples_out;
1264 else
1265 delay = 0;
1266 } else {
1267
1268
1269
1270
1271 time_delta = time_delta - dac33->mode7_us_to_lthr;
1272
1273 samples_out = US_TO_SAMPLES(
1274 substream->runtime->rate,
1275 time_delta);
1276 samples_in = US_TO_SAMPLES(
1277 dac33->burst_rate,
1278 time_delta);
1279 delay = DAC33_MODE7_MARGIN + samples_in - samples_out;
1280
1281 if (unlikely(delay > uthr))
1282 delay = uthr;
1283 }
1284 break;
1285 default:
1286 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
1287 dac33->fifo_mode);
1288 break;
1289 }
1290out:
1291 return delay;
1292}
1293
1294static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1295 int clk_id, unsigned int freq, int dir)
1296{
1297 struct snd_soc_codec *codec = codec_dai->codec;
1298 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1299 u8 ioc_reg, asrcb_reg;
1300
1301 ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
1302 asrcb_reg = dac33_read_reg_cache(codec, DAC33_ASRC_CTRL_B);
1303 switch (clk_id) {
1304 case TLV320DAC33_MCLK:
1305 ioc_reg |= DAC33_REFSEL;
1306 asrcb_reg |= DAC33_SRCREFSEL;
1307 break;
1308 case TLV320DAC33_SLEEPCLK:
1309 ioc_reg &= ~DAC33_REFSEL;
1310 asrcb_reg &= ~DAC33_SRCREFSEL;
1311 break;
1312 default:
1313 dev_err(codec->dev, "Invalid clock ID (%d)\n", clk_id);
1314 break;
1315 }
1316 dac33->refclk = freq;
1317
1318 dac33_write_reg_cache(codec, DAC33_INT_OSC_CTRL, ioc_reg);
1319 dac33_write_reg_cache(codec, DAC33_ASRC_CTRL_B, asrcb_reg);
1320
1321 return 0;
1322}
1323
1324static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
1325 unsigned int fmt)
1326{
1327 struct snd_soc_codec *codec = codec_dai->codec;
1328 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1329 u8 aictrl_a, aictrl_b;
1330
1331 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
1332 aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
1333
1334 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1335 case SND_SOC_DAIFMT_CBM_CFM:
1336
1337 aictrl_a |= (DAC33_MSBCLK | DAC33_MSWCLK);
1338 break;
1339 case SND_SOC_DAIFMT_CBS_CFS:
1340
1341 if (dac33->fifo_mode) {
1342 dev_err(codec->dev, "FIFO mode requires master mode\n");
1343 return -EINVAL;
1344 } else
1345 aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
1346 break;
1347 default:
1348 return -EINVAL;
1349 }
1350
1351 aictrl_a &= ~DAC33_AFMT_MASK;
1352 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1353 case SND_SOC_DAIFMT_I2S:
1354 aictrl_a |= DAC33_AFMT_I2S;
1355 break;
1356 case SND_SOC_DAIFMT_DSP_A:
1357 aictrl_a |= DAC33_AFMT_DSP;
1358 aictrl_b &= ~DAC33_DATA_DELAY_MASK;
1359 aictrl_b |= DAC33_DATA_DELAY(0);
1360 break;
1361 case SND_SOC_DAIFMT_RIGHT_J:
1362 aictrl_a |= DAC33_AFMT_RIGHT_J;
1363 break;
1364 case SND_SOC_DAIFMT_LEFT_J:
1365 aictrl_a |= DAC33_AFMT_LEFT_J;
1366 break;
1367 default:
1368 dev_err(codec->dev, "Unsupported format (%u)\n",
1369 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1370 return -EINVAL;
1371 }
1372
1373 dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
1374 dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
1375
1376 return 0;
1377}
1378
1379static int dac33_soc_probe(struct snd_soc_codec *codec)
1380{
1381 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1382 int ret = 0;
1383
1384 codec->control_data = dac33->control_data;
1385 codec->hw_write = (hw_write_t) i2c_master_send;
1386 dac33->codec = codec;
1387
1388
1389 ret = dac33_hard_power(codec, 1);
1390 if (ret != 0) {
1391 dev_err(codec->dev, "Failed to power up codec: %d\n", ret);
1392 goto err_power;
1393 }
1394 ret = dac33_read_id(codec);
1395 dac33_hard_power(codec, 0);
1396
1397 if (ret < 0) {
1398 dev_err(codec->dev, "Failed to read chip ID: %d\n", ret);
1399 ret = -ENODEV;
1400 goto err_power;
1401 }
1402
1403
1404 if (dac33->irq >= 0) {
1405 ret = request_irq(dac33->irq, dac33_interrupt_handler,
1406 IRQF_TRIGGER_RISING,
1407 codec->component.name, codec);
1408 if (ret < 0) {
1409 dev_err(codec->dev, "Could not request IRQ%d (%d)\n",
1410 dac33->irq, ret);
1411 dac33->irq = -1;
1412 }
1413 if (dac33->irq != -1) {
1414
1415 dac33->dac33_wq =
1416 create_singlethread_workqueue("tlv320dac33");
1417 if (dac33->dac33_wq == NULL) {
1418 free_irq(dac33->irq, codec);
1419 return -ENOMEM;
1420 }
1421
1422 INIT_WORK(&dac33->work, dac33_work);
1423 }
1424 }
1425
1426
1427 if (dac33->irq >= 0)
1428 snd_soc_add_codec_controls(codec, dac33_mode_snd_controls,
1429 ARRAY_SIZE(dac33_mode_snd_controls));
1430
1431err_power:
1432 return ret;
1433}
1434
1435static int dac33_soc_remove(struct snd_soc_codec *codec)
1436{
1437 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1438
1439 dac33_set_bias_level(codec, SND_SOC_BIAS_OFF);
1440
1441 if (dac33->irq >= 0) {
1442 free_irq(dac33->irq, dac33->codec);
1443 destroy_workqueue(dac33->dac33_wq);
1444 }
1445 return 0;
1446}
1447
1448static struct snd_soc_codec_driver soc_codec_dev_tlv320dac33 = {
1449 .read = dac33_read_reg_cache,
1450 .write = dac33_write_locked,
1451 .set_bias_level = dac33_set_bias_level,
1452 .idle_bias_off = true,
1453 .reg_cache_size = ARRAY_SIZE(dac33_reg),
1454 .reg_word_size = sizeof(u8),
1455 .reg_cache_default = dac33_reg,
1456 .probe = dac33_soc_probe,
1457 .remove = dac33_soc_remove,
1458
1459 .controls = dac33_snd_controls,
1460 .num_controls = ARRAY_SIZE(dac33_snd_controls),
1461 .dapm_widgets = dac33_dapm_widgets,
1462 .num_dapm_widgets = ARRAY_SIZE(dac33_dapm_widgets),
1463 .dapm_routes = audio_map,
1464 .num_dapm_routes = ARRAY_SIZE(audio_map),
1465};
1466
1467#define DAC33_RATES (SNDRV_PCM_RATE_44100 | \
1468 SNDRV_PCM_RATE_48000)
1469#define DAC33_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1470
1471static const struct snd_soc_dai_ops dac33_dai_ops = {
1472 .startup = dac33_startup,
1473 .shutdown = dac33_shutdown,
1474 .hw_params = dac33_hw_params,
1475 .trigger = dac33_pcm_trigger,
1476 .delay = dac33_dai_delay,
1477 .set_sysclk = dac33_set_dai_sysclk,
1478 .set_fmt = dac33_set_dai_fmt,
1479};
1480
1481static struct snd_soc_dai_driver dac33_dai = {
1482 .name = "tlv320dac33-hifi",
1483 .playback = {
1484 .stream_name = "Playback",
1485 .channels_min = 2,
1486 .channels_max = 2,
1487 .rates = DAC33_RATES,
1488 .formats = DAC33_FORMATS,
1489 .sig_bits = 24,
1490 },
1491 .ops = &dac33_dai_ops,
1492};
1493
1494static int dac33_i2c_probe(struct i2c_client *client,
1495 const struct i2c_device_id *id)
1496{
1497 struct tlv320dac33_platform_data *pdata;
1498 struct tlv320dac33_priv *dac33;
1499 int ret, i;
1500
1501 if (client->dev.platform_data == NULL) {
1502 dev_err(&client->dev, "Platform data not set\n");
1503 return -ENODEV;
1504 }
1505 pdata = client->dev.platform_data;
1506
1507 dac33 = devm_kzalloc(&client->dev, sizeof(struct tlv320dac33_priv),
1508 GFP_KERNEL);
1509 if (dac33 == NULL)
1510 return -ENOMEM;
1511
1512 dac33->control_data = client;
1513 mutex_init(&dac33->mutex);
1514 spin_lock_init(&dac33->lock);
1515
1516 i2c_set_clientdata(client, dac33);
1517
1518 dac33->power_gpio = pdata->power_gpio;
1519 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1520 dac33->keep_bclk = pdata->keep_bclk;
1521 dac33->mode1_latency = pdata->mode1_latency;
1522 if (!dac33->mode1_latency)
1523 dac33->mode1_latency = 10000;
1524 dac33->irq = client->irq;
1525
1526 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1527
1528
1529 if (dac33->power_gpio >= 0) {
1530 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset");
1531 if (ret < 0) {
1532 dev_err(&client->dev,
1533 "Failed to request reset GPIO (%d)\n",
1534 dac33->power_gpio);
1535 goto err_gpio;
1536 }
1537 gpio_direction_output(dac33->power_gpio, 0);
1538 }
1539
1540 for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++)
1541 dac33->supplies[i].supply = dac33_supply_names[i];
1542
1543 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(dac33->supplies),
1544 dac33->supplies);
1545
1546 if (ret != 0) {
1547 dev_err(&client->dev, "Failed to request supplies: %d\n", ret);
1548 goto err_get;
1549 }
1550
1551 ret = snd_soc_register_codec(&client->dev,
1552 &soc_codec_dev_tlv320dac33, &dac33_dai, 1);
1553 if (ret < 0)
1554 goto err_get;
1555
1556 return ret;
1557err_get:
1558 if (dac33->power_gpio >= 0)
1559 gpio_free(dac33->power_gpio);
1560err_gpio:
1561 return ret;
1562}
1563
1564static int dac33_i2c_remove(struct i2c_client *client)
1565{
1566 struct tlv320dac33_priv *dac33 = i2c_get_clientdata(client);
1567
1568 if (unlikely(dac33->chip_power))
1569 dac33_hard_power(dac33->codec, 0);
1570
1571 if (dac33->power_gpio >= 0)
1572 gpio_free(dac33->power_gpio);
1573
1574 snd_soc_unregister_codec(&client->dev);
1575 return 0;
1576}
1577
1578static const struct i2c_device_id tlv320dac33_i2c_id[] = {
1579 {
1580 .name = "tlv320dac33",
1581 .driver_data = 0,
1582 },
1583 { },
1584};
1585MODULE_DEVICE_TABLE(i2c, tlv320dac33_i2c_id);
1586
1587static struct i2c_driver tlv320dac33_i2c_driver = {
1588 .driver = {
1589 .name = "tlv320dac33-codec",
1590 .owner = THIS_MODULE,
1591 },
1592 .probe = dac33_i2c_probe,
1593 .remove = dac33_i2c_remove,
1594 .id_table = tlv320dac33_i2c_id,
1595};
1596
1597module_i2c_driver(tlv320dac33_i2c_driver);
1598
1599MODULE_DESCRIPTION("ASoC TLV320DAC33 codec driver");
1600MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
1601MODULE_LICENSE("GPL");
1602
