1
2
3
4
5
6
7
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/stddef.h>
13#include <linux/ioport.h>
14#include <linux/genalloc.h>
15#include <linux/string.h>
16#include <asm/cputype.h>
17#include <asm/mach/map.h>
18#include <asm/memory.h>
19#include <asm/system_info.h>
20
21static struct gen_pool *tcm_pool;
22static bool dtcm_present;
23static bool itcm_present;
24
25
26extern char __itcm_start, __sitcm_text, __eitcm_text;
27extern char __dtcm_start, __sdtcm_data, __edtcm_data;
28
29
30u32 dtcm_end = DTCM_OFFSET;
31u32 itcm_end = ITCM_OFFSET;
32
33
34
35
36static struct resource dtcm_res = {
37 .name = "DTCM RAM",
38 .start = DTCM_OFFSET,
39 .end = DTCM_OFFSET,
40 .flags = IORESOURCE_MEM
41};
42
43static struct resource itcm_res = {
44 .name = "ITCM RAM",
45 .start = ITCM_OFFSET,
46 .end = ITCM_OFFSET,
47 .flags = IORESOURCE_MEM
48};
49
50static struct map_desc dtcm_iomap[] __initdata = {
51 {
52 .virtual = DTCM_OFFSET,
53 .pfn = __phys_to_pfn(DTCM_OFFSET),
54 .length = 0,
55 .type = MT_MEMORY_RW_DTCM
56 }
57};
58
59static struct map_desc itcm_iomap[] __initdata = {
60 {
61 .virtual = ITCM_OFFSET,
62 .pfn = __phys_to_pfn(ITCM_OFFSET),
63 .length = 0,
64 .type = MT_MEMORY_RWX_ITCM,
65 }
66};
67
68
69
70
71void *tcm_alloc(size_t len)
72{
73 unsigned long vaddr;
74
75 if (!tcm_pool)
76 return NULL;
77
78 vaddr = gen_pool_alloc(tcm_pool, len);
79 if (!vaddr)
80 return NULL;
81
82 return (void *) vaddr;
83}
84EXPORT_SYMBOL(tcm_alloc);
85
86
87
88
89void tcm_free(void *addr, size_t len)
90{
91 gen_pool_free(tcm_pool, (unsigned long) addr, len);
92}
93EXPORT_SYMBOL(tcm_free);
94
95bool tcm_dtcm_present(void)
96{
97 return dtcm_present;
98}
99EXPORT_SYMBOL(tcm_dtcm_present);
100
101bool tcm_itcm_present(void)
102{
103 return itcm_present;
104}
105EXPORT_SYMBOL(tcm_itcm_present);
106
107static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
108 u32 *offset)
109{
110 const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128,
111 256, 512, 1024, -1, -1, -1, -1 };
112 u32 tcm_region;
113 int tcm_size;
114
115
116
117
118
119
120 if (banks > 1)
121 asm("mcr p15, 0, %0, c9, c2, 0"
122 :
123 : "r" (bank));
124
125
126 if (!type)
127 asm("mrc p15, 0, %0, c9, c1, 0"
128 : "=r" (tcm_region));
129 else
130 asm("mrc p15, 0, %0, c9, c1, 1"
131 : "=r" (tcm_region));
132
133 tcm_size = tcm_sizes[(tcm_region >> 2) & 0x0f];
134 if (tcm_size < 0) {
135 pr_err("CPU: %sTCM%d of unknown size\n",
136 type ? "I" : "D", bank);
137 return -EINVAL;
138 } else if (tcm_size > 32) {
139 pr_err("CPU: %sTCM%d larger than 32k found\n",
140 type ? "I" : "D", bank);
141 return -EINVAL;
142 } else {
143 pr_info("CPU: found %sTCM%d %dk @ %08x, %senabled\n",
144 type ? "I" : "D",
145 bank,
146 tcm_size,
147 (tcm_region & 0xfffff000U),
148 (tcm_region & 1) ? "" : "not ");
149 }
150
151
152 if (tcm_size == 0)
153 return 0;
154
155
156 tcm_region = *offset | (tcm_region & 0x00000ffeU) | 1;
157
158 if (!type)
159 asm("mcr p15, 0, %0, c9, c1, 0"
160 :
161 : "r" (tcm_region));
162 else
163 asm("mcr p15, 0, %0, c9, c1, 1"
164 :
165 : "r" (tcm_region));
166
167
168 *offset += (tcm_size << 10);
169
170 pr_info("CPU: moved %sTCM%d %dk to %08x, enabled\n",
171 type ? "I" : "D",
172 bank,
173 tcm_size,
174 (tcm_region & 0xfffff000U));
175 return 0;
176}
177
178
179
180
181void __init tcm_init(void)
182{
183 u32 tcm_status;
184 u8 dtcm_banks;
185 u8 itcm_banks;
186 size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
187 size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
188 char *start;
189 char *end;
190 char *ram;
191 int ret;
192 int i;
193
194
195
196
197
198 if (cpu_architecture() < CPU_ARCH_ARMv5) {
199 if (dtcm_code_sz || itcm_code_sz)
200 pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
201 "ITCM code compiled in, but no TCM present "
202 "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
203 return;
204 }
205
206 tcm_status = read_cpuid_tcmstatus();
207 dtcm_banks = (tcm_status >> 16) & 0x03;
208 itcm_banks = (tcm_status & 0x03);
209
210
211 if (dtcm_banks > 2)
212 dtcm_banks = 0;
213 if (itcm_banks > 2)
214 itcm_banks = 0;
215
216
217 if (dtcm_banks > 0) {
218 for (i = 0; i < dtcm_banks; i++) {
219 ret = setup_tcm_bank(0, i, dtcm_banks, &dtcm_end);
220 if (ret)
221 return;
222 }
223
224 if (dtcm_code_sz > (dtcm_end - DTCM_OFFSET)) {
225 pr_info("CPU DTCM: %u bytes of code compiled to "
226 "DTCM but only %lu bytes of DTCM present\n",
227 dtcm_code_sz, (dtcm_end - DTCM_OFFSET));
228 goto no_dtcm;
229 }
230 dtcm_res.end = dtcm_end - 1;
231 request_resource(&iomem_resource, &dtcm_res);
232 dtcm_iomap[0].length = dtcm_end - DTCM_OFFSET;
233 iotable_init(dtcm_iomap, 1);
234
235 start = &__sdtcm_data;
236 end = &__edtcm_data;
237 ram = &__dtcm_start;
238 memcpy(start, ram, dtcm_code_sz);
239 pr_debug("CPU DTCM: copied data from %p - %p\n",
240 start, end);
241 dtcm_present = true;
242 } else if (dtcm_code_sz) {
243 pr_info("CPU DTCM: %u bytes of code compiled to DTCM but no "
244 "DTCM banks present in CPU\n", dtcm_code_sz);
245 }
246
247no_dtcm:
248
249 if (itcm_banks > 0) {
250 for (i = 0; i < itcm_banks; i++) {
251 ret = setup_tcm_bank(1, i, itcm_banks, &itcm_end);
252 if (ret)
253 return;
254 }
255
256 if (itcm_code_sz > (itcm_end - ITCM_OFFSET)) {
257 pr_info("CPU ITCM: %u bytes of code compiled to "
258 "ITCM but only %lu bytes of ITCM present\n",
259 itcm_code_sz, (itcm_end - ITCM_OFFSET));
260 return;
261 }
262 itcm_res.end = itcm_end - 1;
263 request_resource(&iomem_resource, &itcm_res);
264 itcm_iomap[0].length = itcm_end - ITCM_OFFSET;
265 iotable_init(itcm_iomap, 1);
266
267 start = &__sitcm_text;
268 end = &__eitcm_text;
269 ram = &__itcm_start;
270 memcpy(start, ram, itcm_code_sz);
271 pr_debug("CPU ITCM: copied code from %p - %p\n",
272 start, end);
273 itcm_present = true;
274 } else if (itcm_code_sz) {
275 pr_info("CPU ITCM: %u bytes of code compiled to ITCM but no "
276 "ITCM banks present in CPU\n", itcm_code_sz);
277 }
278}
279
280
281
282
283
284
285static int __init setup_tcm_pool(void)
286{
287 u32 dtcm_pool_start = (u32) &__edtcm_data;
288 u32 itcm_pool_start = (u32) &__eitcm_text;
289 int ret;
290
291
292
293
294
295
296 tcm_pool = gen_pool_create(2, -1);
297
298 pr_debug("Setting up TCM memory pool\n");
299
300
301 if (dtcm_present) {
302 if (dtcm_pool_start < dtcm_end) {
303 ret = gen_pool_add(tcm_pool, dtcm_pool_start,
304 dtcm_end - dtcm_pool_start, -1);
305 if (ret) {
306 pr_err("CPU DTCM: could not add DTCM " \
307 "remainder to pool!\n");
308 return ret;
309 }
310 pr_debug("CPU DTCM: Added %08x bytes @ %08x to " \
311 "the TCM memory pool\n",
312 dtcm_end - dtcm_pool_start,
313 dtcm_pool_start);
314 }
315 }
316
317
318 if (itcm_present) {
319 if (itcm_pool_start < itcm_end) {
320 ret = gen_pool_add(tcm_pool, itcm_pool_start,
321 itcm_end - itcm_pool_start, -1);
322 if (ret) {
323 pr_err("CPU ITCM: could not add ITCM " \
324 "remainder to pool!\n");
325 return ret;
326 }
327 pr_debug("CPU ITCM: Added %08x bytes @ %08x to " \
328 "the TCM memory pool\n",
329 itcm_end - itcm_pool_start,
330 itcm_pool_start);
331 }
332 }
333 return 0;
334}
335
336core_initcall(setup_tcm_pool);
337