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12#ifndef __ASM_ARCH_HARDWARE_H
13#define __ASM_ARCH_HARDWARE_H
14
15
16#define UNCACHEABLE_ADDR 0xfa050000
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29
30#define VIO_BASE 0xf8000000
31#define VIO_SHIFT 3
32#define PIO_START 0x80000000
33
34#define io_p2v( x ) \
35 IOMEM( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE )
36#define io_v2p( x ) \
37 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
38
39#define CPU_SA1110_A0 (0)
40#define CPU_SA1110_B0 (4)
41#define CPU_SA1110_B1 (5)
42#define CPU_SA1110_B2 (6)
43#define CPU_SA1110_B4 (8)
44
45#define CPU_SA1100_ID (0x4401a110)
46#define CPU_SA1100_MASK (0xfffffff0)
47#define CPU_SA1110_ID (0x6901b110)
48#define CPU_SA1110_MASK (0xfffffff0)
49
50#define __MREG(x) IOMEM(io_p2v(x))
51
52#ifndef __ASSEMBLY__
53
54#include <asm/cputype.h>
55
56#define CPU_REVISION (read_cpuid_id() & 15)
57
58#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID)
59#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID)
60
61# define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x)))
62# define __PREG(x) (io_v2p((unsigned long)&(x)))
63
64static inline unsigned long get_clock_tick_rate(void)
65{
66 return 3686400;
67}
68#else
69
70# define __REG(x) io_p2v(x)
71# define __PREG(x) io_v2p(x)
72
73#endif
74
75#include "SA-1100.h"
76
77#ifdef CONFIG_SA1101
78#include "SA-1101.h"
79#endif
80
81#endif
82