LXR linux/arch/ia64/include/uapi/asm/sigcontext.h

   1#ifndef _ASM_IA64_SIGCONTEXT_H
   2#define _ASM_IA64_SIGCONTEXT_H
   3
   4/*
   5 * Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co
   6 * Copyright (C) 1998, 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
   7 */
   8
   9#include <asm/fpu.h>
  10
  11#define IA64_SC_FLAG_ONSTACK_BIT                0       /* is handler running on signal stack? */
  12#define IA64_SC_FLAG_IN_SYSCALL_BIT             1       /* did signal interrupt a syscall? */
  13#define IA64_SC_FLAG_FPH_VALID_BIT              2       /* is state in f[32]-f[127] valid? */
  14
  15#define IA64_SC_FLAG_ONSTACK            (1 << IA64_SC_FLAG_ONSTACK_BIT)
  16#define IA64_SC_FLAG_IN_SYSCALL         (1 << IA64_SC_FLAG_IN_SYSCALL_BIT)
  17#define IA64_SC_FLAG_FPH_VALID          (1 << IA64_SC_FLAG_FPH_VALID_BIT)
  18
  19# ifndef __ASSEMBLY__
  20
  21/*
  22 * Note on handling of register backing store: sc_ar_bsp contains the address that would
  23 * be found in ar.bsp after executing a "cover" instruction the context in which the
  24 * signal was raised.  If signal delivery required switching to an alternate signal stack
  25 * (sc_rbs_base is not NULL), the "dirty" partition (as it would exist after executing the
  26 * imaginary "cover" instruction) is backed by the *alternate* signal stack, not the
  27 * original one.  In this case, sc_rbs_base contains the base address of the new register
  28 * backing store.  The number of registers in the dirty partition can be calculated as:
  29 *
  30 *   ndirty = ia64_rse_num_regs(sc_rbs_base, sc_rbs_base + (sc_loadrs >> 16))
  31 *
  32 */
  33
  34struct sigcontext {
  35        unsigned long           sc_flags;       /* see manifest constants above */
  36        unsigned long           sc_nat;         /* bit i == 1 iff scratch reg gr[i] is a NaT */
  37        stack_t                 sc_stack;       /* previously active stack */
  38
  39        unsigned long           sc_ip;          /* instruction pointer */
  40        unsigned long           sc_cfm;         /* current frame marker */
  41        unsigned long           sc_um;          /* user mask bits */
  42        unsigned long           sc_ar_rsc;      /* register stack configuration register */
  43        unsigned long           sc_ar_bsp;      /* backing store pointer */
  44        unsigned long           sc_ar_rnat;     /* RSE NaT collection register */
  45        unsigned long           sc_ar_ccv;      /* compare and exchange compare value register */
  46        unsigned long           sc_ar_unat;     /* ar.unat of interrupted context */
  47        unsigned long           sc_ar_fpsr;     /* floating-point status register */
  48        unsigned long           sc_ar_pfs;      /* previous function state */
  49        unsigned long           sc_ar_lc;       /* loop count register */
  50        unsigned long           sc_pr;          /* predicate registers */
  51        unsigned long           sc_br[8];       /* branch registers */
  52        /* Note: sc_gr[0] is used as the "uc_link" member of ucontext_t */
  53        unsigned long           sc_gr[32];      /* general registers (static partition) */
  54        struct ia64_fpreg       sc_fr[128];     /* floating-point registers */
  55
  56        unsigned long           sc_rbs_base;    /* NULL or new base of sighandler's rbs */
  57        unsigned long           sc_loadrs;      /* see description above */
  58
  59        unsigned long           sc_ar25;        /* cmp8xchg16 uses this */
  60        unsigned long           sc_ar26;        /* rsvd for scratch use */
  61        unsigned long           sc_rsvd[12];    /* reserved for future use */
  62        /*
  63         * The mask must come last so we can increase _NSIG_WORDS
  64         * without breaking binary compatibility.
  65         */
  66        sigset_t                sc_mask;        /* signal mask to restore after handler returns */
  67};
  68
  69# endif /* __ASSEMBLY__ */
  70#endif /* _ASM_IA64_SIGCONTEXT_H */
  71