1
2
3
4
5#include <linux/bcd.h>
6#include <linux/clockchips.h>
7#include <linux/init.h>
8#include <linux/kernel.h>
9#include <linux/sched.h>
10#include <linux/interrupt.h>
11#include <linux/kernel_stat.h>
12#include <linux/param.h>
13#include <linux/smp.h>
14#include <linux/time.h>
15#include <linux/timex.h>
16#include <linux/mm.h>
17#include <linux/platform_device.h>
18
19#include <asm/time.h>
20#include <asm/pgtable.h>
21#include <asm/sgialib.h>
22#include <asm/sn/ioc3.h>
23#include <asm/sn/klconfig.h>
24#include <asm/sn/arch.h>
25#include <asm/sn/addrs.h>
26#include <asm/sn/sn_private.h>
27#include <asm/sn/sn0/ip27.h>
28#include <asm/sn/sn0/hub.h>
29
30#define TICK_SIZE (tick_nsec / 1000)
31
32
33#include <asm/sn/types.h>
34#include <asm/sn/sn0/addrs.h>
35#include <asm/sn/sn0/hubni.h>
36#include <asm/sn/sn0/hubio.h>
37#include <asm/pci/bridge.h>
38
39static void enable_rt_irq(struct irq_data *d)
40{
41}
42
43static void disable_rt_irq(struct irq_data *d)
44{
45}
46
47static struct irq_chip rt_irq_type = {
48 .name = "SN HUB RT timer",
49 .irq_mask = disable_rt_irq,
50 .irq_unmask = enable_rt_irq,
51};
52
53static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
54{
55 unsigned int cpu = smp_processor_id();
56 int slice = cputoslice(cpu);
57 unsigned long cnt;
58
59 cnt = LOCAL_HUB_L(PI_RT_COUNT);
60 cnt += delta;
61 LOCAL_HUB_S(PI_RT_COMPARE_A + PI_COUNT_OFFSET * slice, cnt);
62
63 return LOCAL_HUB_L(PI_RT_COUNT) >= cnt ? -ETIME : 0;
64}
65
66static void rt_set_mode(enum clock_event_mode mode,
67 struct clock_event_device *evt)
68{
69
70}
71
72unsigned int rt_timer_irq;
73
74static DEFINE_PER_CPU(struct clock_event_device, hub_rt_clockevent);
75static DEFINE_PER_CPU(char [11], hub_rt_name);
76
77static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id)
78{
79 unsigned int cpu = smp_processor_id();
80 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
81 int slice = cputoslice(cpu);
82
83
84
85
86 LOCAL_HUB_S(PI_RT_PEND_A + PI_COUNT_OFFSET * slice, 0);
87 cd->event_handler(cd);
88
89 return IRQ_HANDLED;
90}
91
92struct irqaction hub_rt_irqaction = {
93 .handler = hub_rt_counter_handler,
94 .flags = IRQF_PERCPU | IRQF_TIMER,
95 .name = "hub-rt",
96};
97
98
99
100
101
102
103
104
105
106#define NSEC_PER_CYCLE 800
107#define CYCLES_PER_SEC (NSEC_PER_SEC / NSEC_PER_CYCLE)
108
109void hub_rt_clock_event_init(void)
110{
111 unsigned int cpu = smp_processor_id();
112 struct clock_event_device *cd = &per_cpu(hub_rt_clockevent, cpu);
113 unsigned char *name = per_cpu(hub_rt_name, cpu);
114 int irq = rt_timer_irq;
115
116 sprintf(name, "hub-rt %d", cpu);
117 cd->name = name;
118 cd->features = CLOCK_EVT_FEAT_ONESHOT;
119 clockevent_set_clock(cd, CYCLES_PER_SEC);
120 cd->max_delta_ns = clockevent_delta2ns(0xfffffffffffff, cd);
121 cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
122 cd->rating = 200;
123 cd->irq = irq;
124 cd->cpumask = cpumask_of(cpu);
125 cd->set_next_event = rt_next_event;
126 cd->set_mode = rt_set_mode;
127 clockevents_register_device(cd);
128}
129
130static void __init hub_rt_clock_event_global_init(void)
131{
132 int irq;
133
134 do {
135 smp_wmb();
136 irq = rt_timer_irq;
137 if (irq)
138 break;
139
140 irq = allocate_irqno();
141 if (irq < 0)
142 panic("Allocation of irq number for timer failed");
143 } while (xchg(&rt_timer_irq, irq));
144
145 irq_set_chip_and_handler(irq, &rt_irq_type, handle_percpu_irq);
146 setup_irq(irq, &hub_rt_irqaction);
147}
148
149static cycle_t hub_rt_read(struct clocksource *cs)
150{
151 return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
152}
153
154struct clocksource hub_rt_clocksource = {
155 .name = "HUB-RT",
156 .rating = 200,
157 .read = hub_rt_read,
158 .mask = CLOCKSOURCE_MASK(52),
159 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
160};
161
162static void __init hub_rt_clocksource_init(void)
163{
164 struct clocksource *cs = &hub_rt_clocksource;
165
166 clocksource_register_hz(cs, CYCLES_PER_SEC);
167}
168
169void __init plat_time_init(void)
170{
171 hub_rt_clocksource_init();
172 hub_rt_clock_event_global_init();
173 hub_rt_clock_event_init();
174}
175
176void cpu_time_init(void)
177{
178 lboard_t *board;
179 klcpu_t *cpu;
180 int cpuid;
181
182
183 board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
184 if (!board)
185 panic("Can't find board info for myself.");
186
187 cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
188 cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
189 if (!cpu)
190 panic("No information about myself?");
191
192 printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);
193
194 set_c0_status(SRB_TIMOCLK);
195}
196
197void hub_rtc_init(cnodeid_t cnode)
198{
199
200
201
202
203
204
205 if (get_compact_nodeid() == cnode) {
206 LOCAL_HUB_S(PI_RT_EN_A, 1);
207 LOCAL_HUB_S(PI_RT_EN_B, 1);
208 LOCAL_HUB_S(PI_PROF_EN_A, 0);
209 LOCAL_HUB_S(PI_PROF_EN_B, 0);
210 LOCAL_HUB_S(PI_RT_COUNT, 0);
211 LOCAL_HUB_S(PI_RT_PEND_A, 0);
212 LOCAL_HUB_S(PI_RT_PEND_B, 0);
213 }
214}
215
216static int __init sgi_ip27_rtc_devinit(void)
217{
218 struct resource res;
219
220 memset(&res, 0, sizeof(res));
221 res.start = XPHYSADDR(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base +
222 IOC3_BYTEBUS_DEV0);
223 res.end = res.start + 32767;
224 res.flags = IORESOURCE_MEM;
225
226 return IS_ERR(platform_device_register_simple("rtc-m48t35", -1,
227 &res, 1));
228}
229
230
231
232
233
234late_initcall(sgi_ip27_rtc_devinit);
235
