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7
8#include "scan.h"
9#include "bcma_private.h"
10
11#include <linux/bcma/bcma.h>
12#include <linux/bcma/bcma_regs.h>
13#include <linux/pci.h>
14#include <linux/io.h>
15#include <linux/dma-mapping.h>
16#include <linux/slab.h>
17
18struct bcma_device_id_name {
19 u16 id;
20 const char *name;
21};
22
23static const struct bcma_device_id_name bcma_arm_device_names[] = {
24 { BCMA_CORE_4706_MAC_GBIT_COMMON, "BCM4706 GBit MAC Common" },
25 { BCMA_CORE_ARM_1176, "ARM 1176" },
26 { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
27 { BCMA_CORE_ARM_CM3, "ARM CM3" },
28};
29
30static const struct bcma_device_id_name bcma_bcm_device_names[] = {
31 { BCMA_CORE_OOB_ROUTER, "OOB Router" },
32 { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
33 { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
34 { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
35 { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
36 { BCMA_CORE_NS_DMA, "DMA" },
37 { BCMA_CORE_NS_SDIO3, "SDIO3" },
38 { BCMA_CORE_NS_USB20, "USB 2.0" },
39 { BCMA_CORE_NS_USB30, "USB 3.0" },
40 { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
41 { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
42 { BCMA_CORE_NS_ROM, "ROM" },
43 { BCMA_CORE_NS_NAND, "NAND flash controller" },
44 { BCMA_CORE_NS_QSPI, "SPI flash controller" },
45 { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
46 { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
47 { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
48 { BCMA_CORE_ALTA, "ALTA (I2S)" },
49 { BCMA_CORE_INVALID, "Invalid" },
50 { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
51 { BCMA_CORE_ILINE20, "ILine 20" },
52 { BCMA_CORE_SRAM, "SRAM" },
53 { BCMA_CORE_SDRAM, "SDRAM" },
54 { BCMA_CORE_PCI, "PCI" },
55 { BCMA_CORE_ETHERNET, "Fast Ethernet" },
56 { BCMA_CORE_V90, "V90" },
57 { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
58 { BCMA_CORE_ADSL, "ADSL" },
59 { BCMA_CORE_ILINE100, "ILine 100" },
60 { BCMA_CORE_IPSEC, "IPSEC" },
61 { BCMA_CORE_UTOPIA, "UTOPIA" },
62 { BCMA_CORE_PCMCIA, "PCMCIA" },
63 { BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
64 { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
65 { BCMA_CORE_OFDM, "OFDM" },
66 { BCMA_CORE_EXTIF, "EXTIF" },
67 { BCMA_CORE_80211, "IEEE 802.11" },
68 { BCMA_CORE_PHY_A, "PHY A" },
69 { BCMA_CORE_PHY_B, "PHY B" },
70 { BCMA_CORE_PHY_G, "PHY G" },
71 { BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
72 { BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
73 { BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
74 { BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
75 { BCMA_CORE_SDIO_HOST, "SDIO Host" },
76 { BCMA_CORE_ROBOSWITCH, "Roboswitch" },
77 { BCMA_CORE_PARA_ATA, "PATA" },
78 { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
79 { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
80 { BCMA_CORE_PCIE, "PCIe" },
81 { BCMA_CORE_PHY_N, "PHY N" },
82 { BCMA_CORE_SRAM_CTL, "SRAM Controller" },
83 { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
84 { BCMA_CORE_PHY_LP, "PHY LP" },
85 { BCMA_CORE_PMU, "PMU" },
86 { BCMA_CORE_PHY_SSN, "PHY SSN" },
87 { BCMA_CORE_SDIO_DEV, "SDIO Device" },
88 { BCMA_CORE_PHY_HT, "PHY HT" },
89 { BCMA_CORE_MAC_GBIT, "GBit MAC" },
90 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
91 { BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
92 { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
93 { BCMA_CORE_SHARED_COMMON, "Common Shared" },
94 { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
95 { BCMA_CORE_SPI_HOST, "SPI Host" },
96 { BCMA_CORE_I2S, "I2S" },
97 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
98 { BCMA_CORE_SHIM, "SHIM" },
99 { BCMA_CORE_PCIE2, "PCIe Gen2" },
100 { BCMA_CORE_ARM_CR4, "ARM CR4" },
101 { BCMA_CORE_DEFAULT, "Default" },
102};
103
104static const struct bcma_device_id_name bcma_mips_device_names[] = {
105 { BCMA_CORE_MIPS, "MIPS" },
106 { BCMA_CORE_MIPS_3302, "MIPS 3302" },
107 { BCMA_CORE_MIPS_74K, "MIPS 74K" },
108};
109
110static const char *bcma_device_name(const struct bcma_device_id *id)
111{
112 const struct bcma_device_id_name *names;
113 int size, i;
114
115
116 switch (id->manuf) {
117 case BCMA_MANUF_ARM:
118 names = bcma_arm_device_names;
119 size = ARRAY_SIZE(bcma_arm_device_names);
120 break;
121 case BCMA_MANUF_BCM:
122 names = bcma_bcm_device_names;
123 size = ARRAY_SIZE(bcma_bcm_device_names);
124 break;
125 case BCMA_MANUF_MIPS:
126 names = bcma_mips_device_names;
127 size = ARRAY_SIZE(bcma_mips_device_names);
128 break;
129 default:
130 return "UNKNOWN";
131 }
132
133 for (i = 0; i < size; i++) {
134 if (names[i].id == id->id)
135 return names[i].name;
136 }
137
138 return "UNKNOWN";
139}
140
141static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
142 u16 offset)
143{
144 return readl(bus->mmio + offset);
145}
146
147static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
148{
149 if (bus->hosttype == BCMA_HOSTTYPE_PCI)
150 pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
151 addr);
152}
153
154static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 __iomem **eromptr)
155{
156 u32 ent = readl(*eromptr);
157 (*eromptr)++;
158 return ent;
159}
160
161static void bcma_erom_push_ent(u32 __iomem **eromptr)
162{
163 (*eromptr)--;
164}
165
166static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 __iomem **eromptr)
167{
168 u32 ent = bcma_erom_get_ent(bus, eromptr);
169 if (!(ent & SCAN_ER_VALID))
170 return -ENOENT;
171 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
172 return -ENOENT;
173 return ent;
174}
175
176static bool bcma_erom_is_end(struct bcma_bus *bus, u32 __iomem **eromptr)
177{
178 u32 ent = bcma_erom_get_ent(bus, eromptr);
179 bcma_erom_push_ent(eromptr);
180 return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
181}
182
183static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 __iomem **eromptr)
184{
185 u32 ent = bcma_erom_get_ent(bus, eromptr);
186 bcma_erom_push_ent(eromptr);
187 return (((ent & SCAN_ER_VALID)) &&
188 ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
189 ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
190}
191
192static void bcma_erom_skip_component(struct bcma_bus *bus, u32 __iomem **eromptr)
193{
194 u32 ent;
195 while (1) {
196 ent = bcma_erom_get_ent(bus, eromptr);
197 if ((ent & SCAN_ER_VALID) &&
198 ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
199 break;
200 if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
201 break;
202 }
203 bcma_erom_push_ent(eromptr);
204}
205
206static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr)
207{
208 u32 ent = bcma_erom_get_ent(bus, eromptr);
209 if (!(ent & SCAN_ER_VALID))
210 return -ENOENT;
211 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
212 return -ENOENT;
213 return ent;
214}
215
216static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
217 u32 type, u8 port)
218{
219 u32 addrl, addrh, sizel, sizeh = 0;
220 u32 size;
221
222 u32 ent = bcma_erom_get_ent(bus, eromptr);
223 if ((!(ent & SCAN_ER_VALID)) ||
224 ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
225 ((ent & SCAN_ADDR_TYPE) != type) ||
226 (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
227 bcma_erom_push_ent(eromptr);
228 return (u32)-EINVAL;
229 }
230
231 addrl = ent & SCAN_ADDR_ADDR;
232 if (ent & SCAN_ADDR_AG32)
233 addrh = bcma_erom_get_ent(bus, eromptr);
234 else
235 addrh = 0;
236
237 if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
238 size = bcma_erom_get_ent(bus, eromptr);
239 sizel = size & SCAN_SIZE_SZ;
240 if (size & SCAN_SIZE_SG32)
241 sizeh = bcma_erom_get_ent(bus, eromptr);
242 } else
243 sizel = SCAN_ADDR_SZ_BASE <<
244 ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
245
246 return addrl;
247}
248
249static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
250 u16 index)
251{
252 struct bcma_device *core;
253
254 list_for_each_entry(core, &bus->cores, list) {
255 if (core->core_index == index)
256 return core;
257 }
258 return NULL;
259}
260
261static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
262{
263 struct bcma_device *core;
264
265 list_for_each_entry_reverse(core, &bus->cores, list) {
266 if (core->id.id == coreid)
267 return core;
268 }
269 return NULL;
270}
271
272#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
273
274static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
275 struct bcma_device_id *match, int core_num,
276 struct bcma_device *core)
277{
278 u32 tmp;
279 u8 i, j, k;
280 s32 cia, cib;
281 u8 ports[2], wrappers[2];
282
283
284 cia = bcma_erom_get_ci(bus, eromptr);
285 if (cia < 0) {
286 bcma_erom_push_ent(eromptr);
287 if (bcma_erom_is_end(bus, eromptr))
288 return -ESPIPE;
289 return -EILSEQ;
290 }
291 cib = bcma_erom_get_ci(bus, eromptr);
292 if (cib < 0)
293 return -EILSEQ;
294
295
296 core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
297 core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
298 core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
299 ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
300 ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
301 wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
302 wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
303 core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
304
305 if (((core->id.manuf == BCMA_MANUF_ARM) &&
306 (core->id.id == 0xFFF)) ||
307 (ports[1] == 0)) {
308 bcma_erom_skip_component(bus, eromptr);
309 return -ENXIO;
310 }
311
312
313 if (wrappers[0] + wrappers[1] == 0) {
314
315 switch (core->id.id) {
316 case BCMA_CORE_4706_MAC_GBIT_COMMON:
317 case BCMA_CORE_NS_CHIPCOMMON_B:
318
319 break;
320 default:
321 bcma_erom_skip_component(bus, eromptr);
322 return -ENXIO;
323 }
324 }
325
326 if (bcma_erom_is_bridge(bus, eromptr)) {
327 bcma_erom_skip_component(bus, eromptr);
328 return -ENXIO;
329 }
330
331 if (bcma_find_core_by_index(bus, core_num)) {
332 bcma_erom_skip_component(bus, eromptr);
333 return -ENODEV;
334 }
335
336 if (match && ((match->manuf != BCMA_ANY_MANUF &&
337 match->manuf != core->id.manuf) ||
338 (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
339 (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
340 (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
341 )) {
342 bcma_erom_skip_component(bus, eromptr);
343 return -ENODEV;
344 }
345
346
347 for (i = 0; i < ports[0]; i++) {
348 s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
349 if (mst_port_d < 0)
350 return -EILSEQ;
351 }
352
353
354
355
356 tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
357 if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
358
359 tmp = bcma_erom_get_addr_desc(bus, eromptr,
360 SCAN_ADDR_TYPE_BRIDGE, 0);
361 if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
362 return -EILSEQ;
363 } else {
364 bcma_info(bus, "Bridge found\n");
365 return -ENXIO;
366 }
367 }
368 core->addr = tmp;
369
370
371 k = 0;
372 for (i = 0; i < ports[1]; i++) {
373 for (j = 0; ; j++) {
374 tmp = bcma_erom_get_addr_desc(bus, eromptr,
375 SCAN_ADDR_TYPE_SLAVE, i);
376 if (IS_ERR_VALUE_U32(tmp)) {
377
378
379
380 break;
381 } else if (k < ARRAY_SIZE(core->addr_s)) {
382 core->addr_s[k] = tmp;
383 k++;
384 }
385 }
386 }
387
388
389 for (i = 0; i < wrappers[0]; i++) {
390 for (j = 0; ; j++) {
391 tmp = bcma_erom_get_addr_desc(bus, eromptr,
392 SCAN_ADDR_TYPE_MWRAP, i);
393 if (IS_ERR_VALUE_U32(tmp)) {
394
395
396
397 break;
398 } else {
399 if (i == 0 && j == 0)
400 core->wrap = tmp;
401 }
402 }
403 }
404
405
406 for (i = 0; i < wrappers[1]; i++) {
407 u8 hack = (ports[1] == 1) ? 0 : 1;
408 for (j = 0; ; j++) {
409 tmp = bcma_erom_get_addr_desc(bus, eromptr,
410 SCAN_ADDR_TYPE_SWRAP, i + hack);
411 if (IS_ERR_VALUE_U32(tmp)) {
412
413
414
415 break;
416 } else {
417 if (wrappers[0] == 0 && !i && !j)
418 core->wrap = tmp;
419 }
420 }
421 }
422 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
423 core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
424 if (!core->io_addr)
425 return -ENOMEM;
426 if (core->wrap) {
427 core->io_wrap = ioremap_nocache(core->wrap,
428 BCMA_CORE_SIZE);
429 if (!core->io_wrap) {
430 iounmap(core->io_addr);
431 return -ENOMEM;
432 }
433 }
434 }
435 return 0;
436}
437
438void bcma_init_bus(struct bcma_bus *bus)
439{
440 s32 tmp;
441 struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
442 char chip_id[8];
443
444 INIT_LIST_HEAD(&bus->cores);
445 bus->nr_cores = 0;
446
447 bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
448
449 tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
450 chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
451 chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
452 chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
453
454 snprintf(chip_id, ARRAY_SIZE(chip_id),
455 (chipinfo->id > 0x9999) ? "%d" : "0x%04X", chipinfo->id);
456 bcma_info(bus, "Found chip with id %s, rev 0x%02X and package 0x%02X\n",
457 chip_id, chipinfo->rev, chipinfo->pkg);
458}
459
460int bcma_bus_scan(struct bcma_bus *bus)
461{
462 u32 erombase;
463 u32 __iomem *eromptr, *eromend;
464
465 int err, core_num = 0;
466
467 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
468 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
469 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
470 if (!eromptr)
471 return -ENOMEM;
472 } else {
473 eromptr = bus->mmio;
474 }
475
476 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
477
478 bcma_scan_switch_core(bus, erombase);
479
480 while (eromptr < eromend) {
481 struct bcma_device *other_core;
482 struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
483 if (!core) {
484 err = -ENOMEM;
485 goto out;
486 }
487 INIT_LIST_HEAD(&core->list);
488 core->bus = bus;
489
490 err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
491 if (err < 0) {
492 kfree(core);
493 if (err == -ENODEV) {
494 core_num++;
495 continue;
496 } else if (err == -ENXIO) {
497 continue;
498 } else if (err == -ESPIPE) {
499 break;
500 }
501 goto out;
502 }
503
504 core->core_index = core_num++;
505 bus->nr_cores++;
506 other_core = bcma_find_core_reverse(bus, core->id.id);
507 core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
508 bcma_prepare_core(bus, core);
509
510 bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
511 core->core_index, bcma_device_name(&core->id),
512 core->id.manuf, core->id.id, core->id.rev,
513 core->id.class);
514
515 list_add_tail(&core->list, &bus->cores);
516 }
517
518 err = 0;
519out:
520 if (bus->hosttype == BCMA_HOSTTYPE_SOC)
521 iounmap(eromptr);
522
523 return err;
524}
525
526int __init bcma_bus_scan_early(struct bcma_bus *bus,
527 struct bcma_device_id *match,
528 struct bcma_device *core)
529{
530 u32 erombase;
531 u32 __iomem *eromptr, *eromend;
532
533 int err = -ENODEV;
534 int core_num = 0;
535
536 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
537 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
538 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
539 if (!eromptr)
540 return -ENOMEM;
541 } else {
542 eromptr = bus->mmio;
543 }
544
545 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
546
547 bcma_scan_switch_core(bus, erombase);
548
549 while (eromptr < eromend) {
550 memset(core, 0, sizeof(*core));
551 INIT_LIST_HEAD(&core->list);
552 core->bus = bus;
553
554 err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
555 if (err == -ENODEV) {
556 core_num++;
557 continue;
558 } else if (err == -ENXIO)
559 continue;
560 else if (err == -ESPIPE)
561 break;
562 else if (err < 0)
563 goto out;
564
565 core->core_index = core_num++;
566 bus->nr_cores++;
567 bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
568 core->core_index, bcma_device_name(&core->id),
569 core->id.manuf, core->id.id, core->id.rev,
570 core->id.class);
571
572 list_add_tail(&core->list, &bus->cores);
573 err = 0;
574 break;
575 }
576
577out:
578 if (bus->hosttype == BCMA_HOSTTYPE_SOC)
579 iounmap(eromptr);
580
581 return err;
582}
583
