linux/drivers/gpu/drm/tegra/drm.h
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   1/*
   2 * Copyright (C) 2012 Avionic Design GmbH
   3 * Copyright (C) 2012-2013 NVIDIA CORPORATION.  All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundation.
   8 */
   9
  10#ifndef HOST1X_DRM_H
  11#define HOST1X_DRM_H 1
  12
  13#include <uapi/drm/tegra_drm.h>
  14#include <linux/host1x.h>
  15
  16#include <drm/drmP.h>
  17#include <drm/drm_crtc_helper.h>
  18#include <drm/drm_edid.h>
  19#include <drm/drm_fb_helper.h>
  20#include <drm/drm_fixed.h>
  21
  22#include "gem.h"
  23
  24struct reset_control;
  25
  26struct tegra_fb {
  27        struct drm_framebuffer base;
  28        struct tegra_bo **planes;
  29        unsigned int num_planes;
  30};
  31
  32#ifdef CONFIG_DRM_TEGRA_FBDEV
  33struct tegra_fbdev {
  34        struct drm_fb_helper base;
  35        struct tegra_fb *fb;
  36};
  37#endif
  38
  39struct tegra_drm {
  40        struct drm_device *drm;
  41
  42        struct iommu_domain *domain;
  43        struct drm_mm mm;
  44
  45        struct mutex clients_lock;
  46        struct list_head clients;
  47
  48#ifdef CONFIG_DRM_TEGRA_FBDEV
  49        struct tegra_fbdev *fbdev;
  50#endif
  51
  52        unsigned int pitch_align;
  53};
  54
  55struct tegra_drm_client;
  56
  57struct tegra_drm_context {
  58        struct tegra_drm_client *client;
  59        struct host1x_channel *channel;
  60        struct list_head list;
  61};
  62
  63struct tegra_drm_client_ops {
  64        int (*open_channel)(struct tegra_drm_client *client,
  65                            struct tegra_drm_context *context);
  66        void (*close_channel)(struct tegra_drm_context *context);
  67        int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
  68        int (*submit)(struct tegra_drm_context *context,
  69                      struct drm_tegra_submit *args, struct drm_device *drm,
  70                      struct drm_file *file);
  71};
  72
  73int tegra_drm_submit(struct tegra_drm_context *context,
  74                     struct drm_tegra_submit *args, struct drm_device *drm,
  75                     struct drm_file *file);
  76
  77struct tegra_drm_client {
  78        struct host1x_client base;
  79        struct list_head list;
  80
  81        const struct tegra_drm_client_ops *ops;
  82};
  83
  84static inline struct tegra_drm_client *
  85host1x_to_drm_client(struct host1x_client *client)
  86{
  87        return container_of(client, struct tegra_drm_client, base);
  88}
  89
  90int tegra_drm_register_client(struct tegra_drm *tegra,
  91                              struct tegra_drm_client *client);
  92int tegra_drm_unregister_client(struct tegra_drm *tegra,
  93                                struct tegra_drm_client *client);
  94
  95int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
  96int tegra_drm_exit(struct tegra_drm *tegra);
  97
  98struct tegra_dc_soc_info;
  99struct tegra_output;
 100
 101struct tegra_dc {
 102        struct host1x_client client;
 103        struct device *dev;
 104        spinlock_t lock;
 105
 106        struct drm_crtc base;
 107        int powergate;
 108        int pipe;
 109
 110        struct clk *clk;
 111        struct reset_control *rst;
 112        void __iomem *regs;
 113        int irq;
 114
 115        struct tegra_output *rgb;
 116
 117        struct list_head list;
 118
 119        struct drm_info_list *debugfs_files;
 120        struct drm_minor *minor;
 121        struct dentry *debugfs;
 122
 123        /* page-flip handling */
 124        struct drm_pending_vblank_event *event;
 125
 126        const struct tegra_dc_soc_info *soc;
 127
 128        struct iommu_domain *domain;
 129};
 130
 131static inline struct tegra_dc *
 132host1x_client_to_dc(struct host1x_client *client)
 133{
 134        return container_of(client, struct tegra_dc, client);
 135}
 136
 137static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
 138{
 139        return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
 140}
 141
 142static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
 143                                   unsigned long offset)
 144{
 145        writel(value, dc->regs + (offset << 2));
 146}
 147
 148static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
 149{
 150        return readl(dc->regs + (offset << 2));
 151}
 152
 153struct tegra_dc_window {
 154        struct {
 155                unsigned int x;
 156                unsigned int y;
 157                unsigned int w;
 158                unsigned int h;
 159        } src;
 160        struct {
 161                unsigned int x;
 162                unsigned int y;
 163                unsigned int w;
 164                unsigned int h;
 165        } dst;
 166        unsigned int bits_per_pixel;
 167        unsigned int format;
 168        unsigned int swap;
 169        unsigned int stride[2];
 170        unsigned long base[3];
 171        bool bottom_up;
 172
 173        struct tegra_bo_tiling tiling;
 174};
 175
 176/* from dc.c */
 177void tegra_dc_enable_vblank(struct tegra_dc *dc);
 178void tegra_dc_disable_vblank(struct tegra_dc *dc);
 179void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
 180
 181struct tegra_output_ops {
 182        int (*enable)(struct tegra_output *output);
 183        int (*disable)(struct tegra_output *output);
 184        int (*setup_clock)(struct tegra_output *output, struct clk *clk,
 185                           unsigned long pclk, unsigned int *div);
 186        int (*check_mode)(struct tegra_output *output,
 187                          struct drm_display_mode *mode,
 188                          enum drm_mode_status *status);
 189        enum drm_connector_status (*detect)(struct tegra_output *output);
 190};
 191
 192enum tegra_output_type {
 193        TEGRA_OUTPUT_RGB,
 194        TEGRA_OUTPUT_HDMI,
 195        TEGRA_OUTPUT_DSI,
 196        TEGRA_OUTPUT_EDP,
 197};
 198
 199struct tegra_output {
 200        struct device_node *of_node;
 201        struct device *dev;
 202
 203        const struct tegra_output_ops *ops;
 204        enum tegra_output_type type;
 205
 206        struct drm_panel *panel;
 207        struct i2c_adapter *ddc;
 208        const struct edid *edid;
 209        unsigned int hpd_irq;
 210        int hpd_gpio;
 211
 212        struct drm_encoder encoder;
 213        struct drm_connector connector;
 214};
 215
 216static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
 217{
 218        return container_of(e, struct tegra_output, encoder);
 219}
 220
 221static inline struct tegra_output *connector_to_output(struct drm_connector *c)
 222{
 223        return container_of(c, struct tegra_output, connector);
 224}
 225
 226static inline int tegra_output_enable(struct tegra_output *output)
 227{
 228        if (output && output->ops && output->ops->enable)
 229                return output->ops->enable(output);
 230
 231        return output ? -ENOSYS : -EINVAL;
 232}
 233
 234static inline int tegra_output_disable(struct tegra_output *output)
 235{
 236        if (output && output->ops && output->ops->disable)
 237                return output->ops->disable(output);
 238
 239        return output ? -ENOSYS : -EINVAL;
 240}
 241
 242static inline int tegra_output_setup_clock(struct tegra_output *output,
 243                                           struct clk *clk, unsigned long pclk,
 244                                           unsigned int *div)
 245{
 246        if (output && output->ops && output->ops->setup_clock)
 247                return output->ops->setup_clock(output, clk, pclk, div);
 248
 249        return output ? -ENOSYS : -EINVAL;
 250}
 251
 252static inline int tegra_output_check_mode(struct tegra_output *output,
 253                                          struct drm_display_mode *mode,
 254                                          enum drm_mode_status *status)
 255{
 256        if (output && output->ops && output->ops->check_mode)
 257                return output->ops->check_mode(output, mode, status);
 258
 259        return output ? -ENOSYS : -EINVAL;
 260}
 261
 262/* from rgb.c */
 263int tegra_dc_rgb_probe(struct tegra_dc *dc);
 264int tegra_dc_rgb_remove(struct tegra_dc *dc);
 265int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
 266int tegra_dc_rgb_exit(struct tegra_dc *dc);
 267
 268/* from output.c */
 269int tegra_output_probe(struct tegra_output *output);
 270int tegra_output_remove(struct tegra_output *output);
 271int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
 272int tegra_output_exit(struct tegra_output *output);
 273
 274/* from dpaux.c */
 275struct tegra_dpaux;
 276struct drm_dp_link;
 277
 278struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
 279enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
 280int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
 281int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
 282int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
 283int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
 284int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
 285int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
 286                      u8 pattern);
 287
 288/* from fb.c */
 289struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
 290                                    unsigned int index);
 291bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
 292int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
 293                        struct tegra_bo_tiling *tiling);
 294int tegra_drm_fb_prepare(struct drm_device *drm);
 295void tegra_drm_fb_free(struct drm_device *drm);
 296int tegra_drm_fb_init(struct drm_device *drm);
 297void tegra_drm_fb_exit(struct drm_device *drm);
 298#ifdef CONFIG_DRM_TEGRA_FBDEV
 299void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
 300#endif
 301
 302extern struct platform_driver tegra_dc_driver;
 303extern struct platform_driver tegra_dsi_driver;
 304extern struct platform_driver tegra_sor_driver;
 305extern struct platform_driver tegra_hdmi_driver;
 306extern struct platform_driver tegra_dpaux_driver;
 307extern struct platform_driver tegra_gr2d_driver;
 308extern struct platform_driver tegra_gr3d_driver;
 309
 310#endif /* HOST1X_DRM_H */
 311