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22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/of_address.h>
25#include <linux/of_pci.h>
26#include <linux/platform_device.h>
27
28struct gen_pci_cfg_bus_ops {
29 u32 bus_shift;
30 void __iomem *(*map_bus)(struct pci_bus *, unsigned int, int);
31};
32
33struct gen_pci_cfg_windows {
34 struct resource res;
35 struct resource *bus_range;
36 void __iomem **win;
37
38 const struct gen_pci_cfg_bus_ops *ops;
39};
40
41struct gen_pci {
42 struct pci_host_bridge host;
43 struct gen_pci_cfg_windows cfg;
44 struct list_head resources;
45};
46
47static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
48 unsigned int devfn,
49 int where)
50{
51 struct pci_sys_data *sys = bus->sysdata;
52 struct gen_pci *pci = sys->private_data;
53 resource_size_t idx = bus->number - pci->cfg.bus_range->start;
54
55 return pci->cfg.win[idx] + ((devfn << 8) | where);
56}
57
58static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
59 .bus_shift = 16,
60 .map_bus = gen_pci_map_cfg_bus_cam,
61};
62
63static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
64 unsigned int devfn,
65 int where)
66{
67 struct pci_sys_data *sys = bus->sysdata;
68 struct gen_pci *pci = sys->private_data;
69 resource_size_t idx = bus->number - pci->cfg.bus_range->start;
70
71 return pci->cfg.win[idx] + ((devfn << 12) | where);
72}
73
74static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
75 .bus_shift = 20,
76 .map_bus = gen_pci_map_cfg_bus_ecam,
77};
78
79static int gen_pci_config_read(struct pci_bus *bus, unsigned int devfn,
80 int where, int size, u32 *val)
81{
82 void __iomem *addr;
83 struct pci_sys_data *sys = bus->sysdata;
84 struct gen_pci *pci = sys->private_data;
85
86 addr = pci->cfg.ops->map_bus(bus, devfn, where);
87
88 switch (size) {
89 case 1:
90 *val = readb(addr);
91 break;
92 case 2:
93 *val = readw(addr);
94 break;
95 default:
96 *val = readl(addr);
97 }
98
99 return PCIBIOS_SUCCESSFUL;
100}
101
102static int gen_pci_config_write(struct pci_bus *bus, unsigned int devfn,
103 int where, int size, u32 val)
104{
105 void __iomem *addr;
106 struct pci_sys_data *sys = bus->sysdata;
107 struct gen_pci *pci = sys->private_data;
108
109 addr = pci->cfg.ops->map_bus(bus, devfn, where);
110
111 switch (size) {
112 case 1:
113 writeb(val, addr);
114 break;
115 case 2:
116 writew(val, addr);
117 break;
118 default:
119 writel(val, addr);
120 }
121
122 return PCIBIOS_SUCCESSFUL;
123}
124
125static struct pci_ops gen_pci_ops = {
126 .read = gen_pci_config_read,
127 .write = gen_pci_config_write,
128};
129
130static const struct of_device_id gen_pci_of_match[] = {
131 { .compatible = "pci-host-cam-generic",
132 .data = &gen_pci_cfg_cam_bus_ops },
133
134 { .compatible = "pci-host-ecam-generic",
135 .data = &gen_pci_cfg_ecam_bus_ops },
136
137 { },
138};
139MODULE_DEVICE_TABLE(of, gen_pci_of_match);
140
141static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
142{
143 pci_free_resource_list(&pci->resources);
144}
145
146static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
147{
148 int err, res_valid = 0;
149 struct device *dev = pci->host.dev.parent;
150 struct device_node *np = dev->of_node;
151 resource_size_t iobase;
152 struct pci_host_bridge_window *win;
153
154 err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources,
155 &iobase);
156 if (err)
157 return err;
158
159 list_for_each_entry(win, &pci->resources, list) {
160 struct resource *parent, *res = win->res;
161
162 switch (resource_type(res)) {
163 case IORESOURCE_IO:
164 parent = &ioport_resource;
165 err = pci_remap_iospace(res, iobase);
166 if (err) {
167 dev_warn(dev, "error %d: failed to map resource %pR\n",
168 err, res);
169 continue;
170 }
171 break;
172 case IORESOURCE_MEM:
173 parent = &iomem_resource;
174 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
175 break;
176 case IORESOURCE_BUS:
177 pci->cfg.bus_range = res;
178 default:
179 continue;
180 }
181
182 err = devm_request_resource(dev, parent, res);
183 if (err)
184 goto out_release_res;
185 }
186
187 if (!res_valid) {
188 dev_err(dev, "non-prefetchable memory resource required\n");
189 err = -EINVAL;
190 goto out_release_res;
191 }
192
193 return 0;
194
195out_release_res:
196 gen_pci_release_of_pci_ranges(pci);
197 return err;
198}
199
200static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
201{
202 int err;
203 u8 bus_max;
204 resource_size_t busn;
205 struct resource *bus_range;
206 struct device *dev = pci->host.dev.parent;
207 struct device_node *np = dev->of_node;
208
209 err = of_address_to_resource(np, 0, &pci->cfg.res);
210 if (err) {
211 dev_err(dev, "missing \"reg\" property\n");
212 return err;
213 }
214
215
216 bus_max = pci->cfg.bus_range->start +
217 (resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
218 pci->cfg.bus_range->end = min_t(resource_size_t,
219 pci->cfg.bus_range->end, bus_max);
220
221 pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range),
222 sizeof(*pci->cfg.win), GFP_KERNEL);
223 if (!pci->cfg.win)
224 return -ENOMEM;
225
226
227 if (!devm_request_mem_region(dev, pci->cfg.res.start,
228 resource_size(&pci->cfg.res),
229 "Configuration Space"))
230 return -ENOMEM;
231
232 bus_range = pci->cfg.bus_range;
233 for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
234 u32 idx = busn - bus_range->start;
235 u32 sz = 1 << pci->cfg.ops->bus_shift;
236
237 pci->cfg.win[idx] = devm_ioremap(dev,
238 pci->cfg.res.start + busn * sz,
239 sz);
240 if (!pci->cfg.win[idx])
241 return -ENOMEM;
242 }
243
244 return 0;
245}
246
247static int gen_pci_setup(int nr, struct pci_sys_data *sys)
248{
249 struct gen_pci *pci = sys->private_data;
250 list_splice_init(&pci->resources, &sys->resources);
251 return 1;
252}
253
254static int gen_pci_probe(struct platform_device *pdev)
255{
256 int err;
257 const char *type;
258 const struct of_device_id *of_id;
259 const int *prop;
260 struct device *dev = &pdev->dev;
261 struct device_node *np = dev->of_node;
262 struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
263 struct hw_pci hw = {
264 .nr_controllers = 1,
265 .private_data = (void **)&pci,
266 .setup = gen_pci_setup,
267 .map_irq = of_irq_parse_and_map_pci,
268 .ops = &gen_pci_ops,
269 };
270
271 if (!pci)
272 return -ENOMEM;
273
274 type = of_get_property(np, "device_type", NULL);
275 if (!type || strcmp(type, "pci")) {
276 dev_err(dev, "invalid \"device_type\" %s\n", type);
277 return -EINVAL;
278 }
279
280 prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
281 if (prop) {
282 if (*prop)
283 pci_add_flags(PCI_PROBE_ONLY);
284 else
285 pci_clear_flags(PCI_PROBE_ONLY);
286 }
287
288 of_id = of_match_node(gen_pci_of_match, np);
289 pci->cfg.ops = of_id->data;
290 pci->host.dev.parent = dev;
291 INIT_LIST_HEAD(&pci->host.windows);
292 INIT_LIST_HEAD(&pci->resources);
293
294
295 err = gen_pci_parse_request_of_pci_ranges(pci);
296 if (err)
297 return err;
298
299
300 err = gen_pci_parse_map_cfg_windows(pci);
301 if (err) {
302 gen_pci_release_of_pci_ranges(pci);
303 return err;
304 }
305
306 pci_common_init_dev(dev, &hw);
307 return 0;
308}
309
310static struct platform_driver gen_pci_driver = {
311 .driver = {
312 .name = "pci-host-generic",
313 .of_match_table = gen_pci_of_match,
314 },
315 .probe = gen_pci_probe,
316};
317module_platform_driver(gen_pci_driver);
318
319MODULE_DESCRIPTION("Generic PCI host driver");
320MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
321MODULE_LICENSE("GPL v2");
322
