linux/drivers/usb/host/ehci-fsl.c
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   1/*
   2 * Copyright 2005-2009 MontaVista Software, Inc.
   3 * Copyright 2008,2012      Freescale Semiconductor, Inc.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License as published by the
   7 * Free Software Foundation; either version 2 of the License, or (at your
   8 * option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13 * for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software Foundation,
  17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 *
  19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
  20 * by Hunter Wu.
  21 * Power Management support by Dave Liu <daveliu@freescale.com>,
  22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
  23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
  24 */
  25
  26#include <linux/kernel.h>
  27#include <linux/types.h>
  28#include <linux/delay.h>
  29#include <linux/pm.h>
  30#include <linux/err.h>
  31#include <linux/platform_device.h>
  32#include <linux/fsl_devices.h>
  33
  34#include "ehci-fsl.h"
  35
  36/* configure so an HC device and id are always provided */
  37/* always called with process context; sleeping is OK */
  38
  39/**
  40 * usb_hcd_fsl_probe - initialize FSL-based HCDs
  41 * @drvier: Driver to be used for this HCD
  42 * @pdev: USB Host Controller being probed
  43 * Context: !in_interrupt()
  44 *
  45 * Allocates basic resources for this USB host controller.
  46 *
  47 */
  48static int usb_hcd_fsl_probe(const struct hc_driver *driver,
  49                             struct platform_device *pdev)
  50{
  51        struct fsl_usb2_platform_data *pdata;
  52        struct usb_hcd *hcd;
  53        struct resource *res;
  54        int irq;
  55        int retval;
  56
  57        pr_debug("initializing FSL-SOC USB Controller\n");
  58
  59        /* Need platform data for setup */
  60        pdata = dev_get_platdata(&pdev->dev);
  61        if (!pdata) {
  62                dev_err(&pdev->dev,
  63                        "No platform data for %s.\n", dev_name(&pdev->dev));
  64                return -ENODEV;
  65        }
  66
  67        /*
  68         * This is a host mode driver, verify that we're supposed to be
  69         * in host mode.
  70         */
  71        if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
  72              (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
  73              (pdata->operating_mode == FSL_USB2_DR_OTG))) {
  74                dev_err(&pdev->dev,
  75                        "Non Host Mode configured for %s. Wrong driver linked.\n",
  76                        dev_name(&pdev->dev));
  77                return -ENODEV;
  78        }
  79
  80        res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  81        if (!res) {
  82                dev_err(&pdev->dev,
  83                        "Found HC with no IRQ. Check %s setup!\n",
  84                        dev_name(&pdev->dev));
  85                return -ENODEV;
  86        }
  87        irq = res->start;
  88
  89        hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
  90        if (!hcd) {
  91                retval = -ENOMEM;
  92                goto err1;
  93        }
  94
  95        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  96        hcd->regs = devm_ioremap_resource(&pdev->dev, res);
  97        if (IS_ERR(hcd->regs)) {
  98                retval = PTR_ERR(hcd->regs);
  99                goto err2;
 100        }
 101
 102        hcd->rsrc_start = res->start;
 103        hcd->rsrc_len = resource_size(res);
 104
 105        pdata->regs = hcd->regs;
 106
 107        if (pdata->power_budget)
 108                hcd->power_budget = pdata->power_budget;
 109
 110        /*
 111         * do platform specific init: check the clock, grab/config pins, etc.
 112         */
 113        if (pdata->init && pdata->init(pdev)) {
 114                retval = -ENODEV;
 115                goto err2;
 116        }
 117
 118        /* Enable USB controller, 83xx or 8536 */
 119        if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
 120                setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
 121
 122        /* Don't need to set host mode here. It will be done by tdi_reset() */
 123
 124        retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
 125        if (retval != 0)
 126                goto err2;
 127        device_wakeup_enable(hcd->self.controller);
 128
 129#ifdef CONFIG_USB_OTG
 130        if (pdata->operating_mode == FSL_USB2_DR_OTG) {
 131                struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 132
 133                hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2);
 134                dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, phy=0x%p\n",
 135                        hcd, ehci, hcd->usb_phy);
 136
 137                if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
 138                        retval = otg_set_host(hcd->usb_phy->otg,
 139                                              &ehci_to_hcd(ehci)->self);
 140                        if (retval) {
 141                                usb_put_phy(hcd->usb_phy);
 142                                goto err2;
 143                        }
 144                } else {
 145                        dev_err(&pdev->dev, "can't find phy\n");
 146                        retval = -ENODEV;
 147                        goto err2;
 148                }
 149        }
 150#endif
 151        return retval;
 152
 153      err2:
 154        usb_put_hcd(hcd);
 155      err1:
 156        dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
 157        if (pdata->exit)
 158                pdata->exit(pdev);
 159        return retval;
 160}
 161
 162/* may be called without controller electrically present */
 163/* may be called with controller, bus, and devices active */
 164
 165/**
 166 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
 167 * @dev: USB Host Controller being removed
 168 * Context: !in_interrupt()
 169 *
 170 * Reverses the effect of usb_hcd_fsl_probe().
 171 *
 172 */
 173static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
 174                               struct platform_device *pdev)
 175{
 176        struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
 177
 178        if (!IS_ERR_OR_NULL(hcd->usb_phy)) {
 179                otg_set_host(hcd->usb_phy->otg, NULL);
 180                usb_put_phy(hcd->usb_phy);
 181        }
 182
 183        usb_remove_hcd(hcd);
 184
 185        /*
 186         * do platform specific un-initialization:
 187         * release iomux pins, disable clock, etc.
 188         */
 189        if (pdata->exit)
 190                pdata->exit(pdev);
 191        usb_put_hcd(hcd);
 192}
 193
 194static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 195                               enum fsl_usb2_phy_modes phy_mode,
 196                               unsigned int port_offset)
 197{
 198        u32 portsc;
 199        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 200        void __iomem *non_ehci = hcd->regs;
 201        struct device *dev = hcd->self.controller;
 202        struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 203
 204        if (pdata->controller_ver < 0) {
 205                dev_warn(hcd->self.controller, "Could not get controller version\n");
 206                return -ENODEV;
 207        }
 208
 209        portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
 210        portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
 211
 212        switch (phy_mode) {
 213        case FSL_USB2_PHY_ULPI:
 214                if (pdata->have_sysif_regs && pdata->controller_ver) {
 215                        /* controller version 1.6 or above */
 216                        clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 217                        setbits32(non_ehci + FSL_SOC_USB_CTRL,
 218                                ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
 219                }
 220                portsc |= PORT_PTS_ULPI;
 221                break;
 222        case FSL_USB2_PHY_SERIAL:
 223                portsc |= PORT_PTS_SERIAL;
 224                break;
 225        case FSL_USB2_PHY_UTMI_WIDE:
 226                portsc |= PORT_PTS_PTW;
 227                /* fall through */
 228        case FSL_USB2_PHY_UTMI:
 229                if (pdata->have_sysif_regs && pdata->controller_ver) {
 230                        /* controller version 1.6 or above */
 231                        setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 232                        mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
 233                                                become stable - 10ms*/
 234                }
 235                /* enable UTMI PHY */
 236                if (pdata->have_sysif_regs)
 237                        setbits32(non_ehci + FSL_SOC_USB_CTRL,
 238                                  CTRL_UTMI_PHY_EN);
 239                portsc |= PORT_PTS_UTMI;
 240                break;
 241        case FSL_USB2_PHY_NONE:
 242                break;
 243        }
 244
 245        if (pdata->have_sysif_regs &&
 246            pdata->controller_ver > FSL_USB_VER_1_6 &&
 247            (phy_mode == FSL_USB2_PHY_ULPI)) {
 248                /* check PHY_CLK_VALID to get phy clk valid */
 249                if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
 250                                PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
 251                                in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
 252                        dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
 253                        return -EINVAL;
 254                }
 255        }
 256
 257        ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
 258
 259        if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
 260                setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
 261
 262        return 0;
 263}
 264
 265static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 266{
 267        struct usb_hcd *hcd = ehci_to_hcd(ehci);
 268        struct fsl_usb2_platform_data *pdata;
 269        void __iomem *non_ehci = hcd->regs;
 270
 271        pdata = dev_get_platdata(hcd->self.controller);
 272
 273        if (pdata->have_sysif_regs) {
 274                /*
 275                * Turn on cache snooping hardware, since some PowerPC platforms
 276                * wholly rely on hardware to deal with cache coherent
 277                */
 278
 279                /* Setup Snooping for all the 4GB space */
 280                /* SNOOP1 starts from 0x0, size 2G */
 281                out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
 282                /* SNOOP2 starts from 0x80000000, size 2G */
 283                out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
 284        }
 285
 286        if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
 287                        (pdata->operating_mode == FSL_USB2_DR_OTG))
 288                if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 289                        return -EINVAL;
 290
 291        if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
 292                unsigned int chip, rev, svr;
 293
 294                svr = mfspr(SPRN_SVR);
 295                chip = svr >> 16;
 296                rev = (svr >> 4) & 0xf;
 297
 298                /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
 299                if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
 300                        ehci->has_fsl_port_bug = 1;
 301
 302                if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
 303                        if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
 304                                return -EINVAL;
 305
 306                if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
 307                        if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
 308                                return -EINVAL;
 309        }
 310
 311        if (pdata->have_sysif_regs) {
 312#ifdef CONFIG_FSL_SOC_BOOKE
 313                out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
 314                out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
 315#else
 316                out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
 317                out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
 318#endif
 319                out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
 320        }
 321
 322        return 0;
 323}
 324
 325/* called after powerup, by probe or system-pm "wakeup" */
 326static int ehci_fsl_reinit(struct ehci_hcd *ehci)
 327{
 328        if (ehci_fsl_usb_setup(ehci))
 329                return -EINVAL;
 330
 331        return 0;
 332}
 333
 334/* called during probe() after chip reset completes */
 335static int ehci_fsl_setup(struct usb_hcd *hcd)
 336{
 337        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 338        int retval;
 339        struct fsl_usb2_platform_data *pdata;
 340        struct device *dev;
 341
 342        dev = hcd->self.controller;
 343        pdata = dev_get_platdata(hcd->self.controller);
 344        ehci->big_endian_desc = pdata->big_endian_desc;
 345        ehci->big_endian_mmio = pdata->big_endian_mmio;
 346
 347        /* EHCI registers start at offset 0x100 */
 348        ehci->caps = hcd->regs + 0x100;
 349
 350#ifdef CONFIG_PPC_83xx
 351        /*
 352         * Deal with MPC834X that need port power to be cycled after the power
 353         * fault condition is removed. Otherwise the state machine does not
 354         * reflect PORTSC[CSC] correctly.
 355         */
 356        ehci->need_oc_pp_cycle = 1;
 357#endif
 358
 359        hcd->has_tt = 1;
 360
 361        retval = ehci_setup(hcd);
 362        if (retval)
 363                return retval;
 364
 365        if (of_device_is_compatible(dev->parent->of_node,
 366                                    "fsl,mpc5121-usb2-dr")) {
 367                /*
 368                 * set SBUSCFG:AHBBRST so that control msgs don't
 369                 * fail when doing heavy PATA writes.
 370                 */
 371                ehci_writel(ehci, SBUSCFG_INCR8,
 372                            hcd->regs + FSL_SOC_USB_SBUSCFG);
 373        }
 374
 375        retval = ehci_fsl_reinit(ehci);
 376        return retval;
 377}
 378
 379struct ehci_fsl {
 380        struct ehci_hcd ehci;
 381
 382#ifdef CONFIG_PM
 383        /* Saved USB PHY settings, need to restore after deep sleep. */
 384        u32 usb_ctrl;
 385#endif
 386};
 387
 388#ifdef CONFIG_PM
 389
 390#ifdef CONFIG_PPC_MPC512x
 391static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 392{
 393        struct usb_hcd *hcd = dev_get_drvdata(dev);
 394        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 395        struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 396        u32 tmp;
 397
 398#ifdef CONFIG_DYNAMIC_DEBUG
 399        u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
 400        mode &= USBMODE_CM_MASK;
 401        tmp = ehci_readl(ehci, hcd->regs + 0x140);      /* usbcmd */
 402
 403        dev_dbg(dev, "suspend=%d already_suspended=%d "
 404                "mode=%d  usbcmd %08x\n", pdata->suspended,
 405                pdata->already_suspended, mode, tmp);
 406#endif
 407
 408        /*
 409         * If the controller is already suspended, then this must be a
 410         * PM suspend.  Remember this fact, so that we will leave the
 411         * controller suspended at PM resume time.
 412         */
 413        if (pdata->suspended) {
 414                dev_dbg(dev, "already suspended, leaving early\n");
 415                pdata->already_suspended = 1;
 416                return 0;
 417        }
 418
 419        dev_dbg(dev, "suspending...\n");
 420
 421        ehci->rh_state = EHCI_RH_SUSPENDED;
 422        dev->power.power_state = PMSG_SUSPEND;
 423
 424        /* ignore non-host interrupts */
 425        clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 426
 427        /* stop the controller */
 428        tmp = ehci_readl(ehci, &ehci->regs->command);
 429        tmp &= ~CMD_RUN;
 430        ehci_writel(ehci, tmp, &ehci->regs->command);
 431
 432        /* save EHCI registers */
 433        pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
 434        pdata->pm_command &= ~CMD_RUN;
 435        pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
 436        pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
 437        pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
 438        pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
 439        pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
 440        pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
 441        pdata->pm_configured_flag  =
 442                ehci_readl(ehci, &ehci->regs->configured_flag);
 443        pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
 444        pdata->pm_usbgenctrl = ehci_readl(ehci,
 445                                          hcd->regs + FSL_SOC_USB_USBGENCTRL);
 446
 447        /* clear the W1C bits */
 448        pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
 449
 450        pdata->suspended = 1;
 451
 452        /* clear PP to cut power to the port */
 453        tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
 454        tmp &= ~PORT_POWER;
 455        ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
 456
 457        return 0;
 458}
 459
 460static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 461{
 462        struct usb_hcd *hcd = dev_get_drvdata(dev);
 463        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 464        struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
 465        u32 tmp;
 466
 467        dev_dbg(dev, "suspend=%d already_suspended=%d\n",
 468                pdata->suspended, pdata->already_suspended);
 469
 470        /*
 471         * If the controller was already suspended at suspend time,
 472         * then don't resume it now.
 473         */
 474        if (pdata->already_suspended) {
 475                dev_dbg(dev, "already suspended, leaving early\n");
 476                pdata->already_suspended = 0;
 477                return 0;
 478        }
 479
 480        if (!pdata->suspended) {
 481                dev_dbg(dev, "not suspended, leaving early\n");
 482                return 0;
 483        }
 484
 485        pdata->suspended = 0;
 486
 487        dev_dbg(dev, "resuming...\n");
 488
 489        /* set host mode */
 490        tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
 491        ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
 492
 493        ehci_writel(ehci, pdata->pm_usbgenctrl,
 494                    hcd->regs + FSL_SOC_USB_USBGENCTRL);
 495        ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
 496                    hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
 497
 498        ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
 499
 500        /* restore EHCI registers */
 501        ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
 502        ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
 503        ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
 504        ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
 505        ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
 506        ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
 507        ehci_writel(ehci, pdata->pm_configured_flag,
 508                    &ehci->regs->configured_flag);
 509        ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
 510
 511        set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 512        ehci->rh_state = EHCI_RH_RUNNING;
 513        dev->power.power_state = PMSG_ON;
 514
 515        tmp = ehci_readl(ehci, &ehci->regs->command);
 516        tmp |= CMD_RUN;
 517        ehci_writel(ehci, tmp, &ehci->regs->command);
 518
 519        usb_hcd_resume_root_hub(hcd);
 520
 521        return 0;
 522}
 523#else
 524static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
 525{
 526        return 0;
 527}
 528
 529static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
 530{
 531        return 0;
 532}
 533#endif /* CONFIG_PPC_MPC512x */
 534
 535static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
 536{
 537        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 538
 539        return container_of(ehci, struct ehci_fsl, ehci);
 540}
 541
 542static int ehci_fsl_drv_suspend(struct device *dev)
 543{
 544        struct usb_hcd *hcd = dev_get_drvdata(dev);
 545        struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 546        void __iomem *non_ehci = hcd->regs;
 547
 548        if (of_device_is_compatible(dev->parent->of_node,
 549                                    "fsl,mpc5121-usb2-dr")) {
 550                return ehci_fsl_mpc512x_drv_suspend(dev);
 551        }
 552
 553        ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
 554                        device_may_wakeup(dev));
 555        if (!fsl_deep_sleep())
 556                return 0;
 557
 558        ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
 559        return 0;
 560}
 561
 562static int ehci_fsl_drv_resume(struct device *dev)
 563{
 564        struct usb_hcd *hcd = dev_get_drvdata(dev);
 565        struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
 566        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 567        void __iomem *non_ehci = hcd->regs;
 568
 569        if (of_device_is_compatible(dev->parent->of_node,
 570                                    "fsl,mpc5121-usb2-dr")) {
 571                return ehci_fsl_mpc512x_drv_resume(dev);
 572        }
 573
 574        ehci_prepare_ports_for_controller_resume(ehci);
 575        if (!fsl_deep_sleep())
 576                return 0;
 577
 578        usb_root_hub_lost_power(hcd->self.root_hub);
 579
 580        /* Restore USB PHY settings and enable the controller. */
 581        out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
 582
 583        ehci_reset(ehci);
 584        ehci_fsl_reinit(ehci);
 585
 586        return 0;
 587}
 588
 589static int ehci_fsl_drv_restore(struct device *dev)
 590{
 591        struct usb_hcd *hcd = dev_get_drvdata(dev);
 592
 593        usb_root_hub_lost_power(hcd->self.root_hub);
 594        return 0;
 595}
 596
 597static struct dev_pm_ops ehci_fsl_pm_ops = {
 598        .suspend = ehci_fsl_drv_suspend,
 599        .resume = ehci_fsl_drv_resume,
 600        .restore = ehci_fsl_drv_restore,
 601};
 602
 603#define EHCI_FSL_PM_OPS         (&ehci_fsl_pm_ops)
 604#else
 605#define EHCI_FSL_PM_OPS         NULL
 606#endif /* CONFIG_PM */
 607
 608#ifdef CONFIG_USB_OTG
 609static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
 610{
 611        struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 612        u32 status;
 613
 614        if (!port)
 615                return -EINVAL;
 616
 617        port--;
 618
 619        /* start port reset before HNP protocol time out */
 620        status = readl(&ehci->regs->port_status[port]);
 621        if (!(status & PORT_CONNECT))
 622                return -ENODEV;
 623
 624        /* hub_wq will finish the reset later */
 625        if (ehci_is_TDI(ehci)) {
 626                writel(PORT_RESET |
 627                       (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
 628                       &ehci->regs->port_status[port]);
 629        } else {
 630                writel(PORT_RESET, &ehci->regs->port_status[port]);
 631        }
 632
 633        return 0;
 634}
 635#else
 636#define ehci_start_port_reset   NULL
 637#endif /* CONFIG_USB_OTG */
 638
 639
 640static const struct hc_driver ehci_fsl_hc_driver = {
 641        .description = hcd_name,
 642        .product_desc = "Freescale On-Chip EHCI Host Controller",
 643        .hcd_priv_size = sizeof(struct ehci_fsl),
 644
 645        /*
 646         * generic hardware linkage
 647         */
 648        .irq = ehci_irq,
 649        .flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
 650
 651        /*
 652         * basic lifecycle operations
 653         */
 654        .reset = ehci_fsl_setup,
 655        .start = ehci_run,
 656        .stop = ehci_stop,
 657        .shutdown = ehci_shutdown,
 658
 659        /*
 660         * managing i/o requests and associated device resources
 661         */
 662        .urb_enqueue = ehci_urb_enqueue,
 663        .urb_dequeue = ehci_urb_dequeue,
 664        .endpoint_disable = ehci_endpoint_disable,
 665        .endpoint_reset = ehci_endpoint_reset,
 666
 667        /*
 668         * scheduling support
 669         */
 670        .get_frame_number = ehci_get_frame,
 671
 672        /*
 673         * root hub support
 674         */
 675        .hub_status_data = ehci_hub_status_data,
 676        .hub_control = ehci_hub_control,
 677        .bus_suspend = ehci_bus_suspend,
 678        .bus_resume = ehci_bus_resume,
 679        .start_port_reset = ehci_start_port_reset,
 680        .relinquish_port = ehci_relinquish_port,
 681        .port_handed_over = ehci_port_handed_over,
 682
 683        .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
 684};
 685
 686static int ehci_fsl_drv_probe(struct platform_device *pdev)
 687{
 688        if (usb_disabled())
 689                return -ENODEV;
 690
 691        /* FIXME we only want one one probe() not two */
 692        return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
 693}
 694
 695static int ehci_fsl_drv_remove(struct platform_device *pdev)
 696{
 697        struct usb_hcd *hcd = platform_get_drvdata(pdev);
 698
 699        /* FIXME we only want one one remove() not two */
 700        usb_hcd_fsl_remove(hcd, pdev);
 701        return 0;
 702}
 703
 704MODULE_ALIAS("platform:fsl-ehci");
 705
 706static struct platform_driver ehci_fsl_driver = {
 707        .probe = ehci_fsl_drv_probe,
 708        .remove = ehci_fsl_drv_remove,
 709        .shutdown = usb_hcd_platform_shutdown,
 710        .driver = {
 711                .name = "fsl-ehci",
 712                .owner  = THIS_MODULE,
 713                .pm = EHCI_FSL_PM_OPS,
 714        },
 715};
 716