1
2
3
4
5
6
7
8
9
10
11
12
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/dma-mapping.h>
16#include <asm/cacheflush.h>
17#include <asm/glue-df.h>
18#include <asm/glue-pf.h>
19#include <asm/mach/arch.h>
20#include <asm/thread_info.h>
21#include <asm/memory.h>
22#include <asm/procinfo.h>
23#include <asm/hardware/cache-l2x0.h>
24#include <linux/kbuild.h>
25
26
27
28
29#if defined(__APCS_26__)
30#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
31#endif
32
33
34
35
36
37
38
39#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
40#error Your compiler is too buggy; it is known to miscompile kernels.
41#error Known good compilers: 3.3
42#endif
43
44int main(void)
45{
46 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
47#ifdef CONFIG_CC_STACKPROTECTOR
48 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
49#endif
50 BLANK();
51 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
52 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
53 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
54 DEFINE(TI_TASK, offsetof(struct thread_info, task));
55 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
56 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
57 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
58 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
59 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
60 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
61 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
62 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
63#ifdef CONFIG_SMP
64 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
65#endif
66#ifdef CONFIG_ARM_THUMBEE
67 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
68#endif
69#ifdef CONFIG_IWMMXT
70 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
71#endif
72#ifdef CONFIG_CRUNCH
73 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
74#endif
75 BLANK();
76 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
77 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
78 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
79 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
80 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
81 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
82 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
83 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
84 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
85 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
86 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
87 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
88 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
89 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
90 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
91 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
92 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
93 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
94 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
95 BLANK();
96#ifdef CONFIG_CACHE_L2X0
97 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
98 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
99 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
100 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
101 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
102 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
103 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
104 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
105 BLANK();
106#endif
107#ifdef CONFIG_CPU_HAS_ASID
108 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
109 BLANK();
110#endif
111 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
112 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
113 BLANK();
114 DEFINE(VM_EXEC, VM_EXEC);
115 BLANK();
116 DEFINE(PAGE_SZ, PAGE_SIZE);
117 BLANK();
118 DEFINE(SYS_ERROR0, 0x9f0000);
119 BLANK();
120 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
121 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
122 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
123 BLANK();
124 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
125 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
126 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
127 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
128 BLANK();
129#ifdef MULTI_DABORT
130 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
131#endif
132#ifdef MULTI_PABORT
133 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
134#endif
135#ifdef MULTI_CPU
136 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
137 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
138 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
139#endif
140#ifdef MULTI_CACHE
141 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
142#endif
143 BLANK();
144 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
145 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
146 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
147 return 0;
148}
149