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10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/spinlock.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/memblock.h>
18#include <linux/sched.h>
19#include <linux/smp.h>
20#include <linux/termios.h>
21#include <linux/amba/bus.h>
22#include <linux/amba/serial.h>
23#include <linux/io.h>
24#include <linux/clkdev.h>
25
26#include <mach/hardware.h>
27#include <mach/platform.h>
28#include <asm/irq.h>
29#include <mach/cm.h>
30#include <asm/system.h>
31#include <asm/leds.h>
32#include <asm/mach/time.h>
33#include <asm/pgtable.h>
34
35static struct amba_pl010_data integrator_uart_data;
36
37static struct amba_device rtc_device = {
38 .dev = {
39 .init_name = "mb:15",
40 },
41 .res = {
42 .start = INTEGRATOR_RTC_BASE,
43 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
44 .flags = IORESOURCE_MEM,
45 },
46 .irq = { IRQ_RTCINT, NO_IRQ },
47 .periphid = 0x00041030,
48};
49
50static struct amba_device uart0_device = {
51 .dev = {
52 .init_name = "mb:16",
53 .platform_data = &integrator_uart_data,
54 },
55 .res = {
56 .start = INTEGRATOR_UART0_BASE,
57 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
58 .flags = IORESOURCE_MEM,
59 },
60 .irq = { IRQ_UARTINT0, NO_IRQ },
61 .periphid = 0x0041010,
62};
63
64static struct amba_device uart1_device = {
65 .dev = {
66 .init_name = "mb:17",
67 .platform_data = &integrator_uart_data,
68 },
69 .res = {
70 .start = INTEGRATOR_UART1_BASE,
71 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
72 .flags = IORESOURCE_MEM,
73 },
74 .irq = { IRQ_UARTINT1, NO_IRQ },
75 .periphid = 0x0041010,
76};
77
78static struct amba_device kmi0_device = {
79 .dev = {
80 .init_name = "mb:18",
81 },
82 .res = {
83 .start = KMI0_BASE,
84 .end = KMI0_BASE + SZ_4K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 .irq = { IRQ_KMIINT0, NO_IRQ },
88 .periphid = 0x00041050,
89};
90
91static struct amba_device kmi1_device = {
92 .dev = {
93 .init_name = "mb:19",
94 },
95 .res = {
96 .start = KMI1_BASE,
97 .end = KMI1_BASE + SZ_4K - 1,
98 .flags = IORESOURCE_MEM,
99 },
100 .irq = { IRQ_KMIINT1, NO_IRQ },
101 .periphid = 0x00041050,
102};
103
104static struct amba_device *amba_devs[] __initdata = {
105 &rtc_device,
106 &uart0_device,
107 &uart1_device,
108 &kmi0_device,
109 &kmi1_device,
110};
111
112
113
114
115static struct clk clk24mhz = {
116 .rate = 24000000,
117};
118
119static struct clk uartclk = {
120 .rate = 14745600,
121};
122
123static struct clk dummy_apb_pclk;
124
125static struct clk_lookup lookups[] = {
126 {
127 .con_id = "apb_pclk",
128 .clk = &dummy_apb_pclk,
129 }, {
130
131 .dev_id = "ap_timer",
132 .clk = &clk24mhz,
133 }, {
134 .dev_id = "mb:16",
135 .clk = &uartclk,
136 }, {
137 .dev_id = "mb:17",
138 .clk = &uartclk,
139 }, {
140 .dev_id = "mb:18",
141 .clk = &clk24mhz,
142 }, {
143 .dev_id = "mb:19",
144 .clk = &clk24mhz,
145 }, {
146 .dev_id = "mb:1c",
147 .clk = &uartclk,
148 }
149};
150
151void __init integrator_init_early(void)
152{
153 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
154}
155
156static int __init integrator_init(void)
157{
158 int i;
159
160 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
161 struct amba_device *d = amba_devs[i];
162 amba_device_register(d, &iomem_resource);
163 }
164
165 return 0;
166}
167
168arch_initcall(integrator_init);
169
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176
177#define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
178#define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
179
180static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
181{
182 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
183
184 if (dev == &uart0_device) {
185 rts_mask = 1 << 4;
186 dtr_mask = 1 << 5;
187 } else {
188 rts_mask = 1 << 6;
189 dtr_mask = 1 << 7;
190 }
191
192 if (mctrl & TIOCM_RTS)
193 ctrlc |= rts_mask;
194 else
195 ctrls |= rts_mask;
196
197 if (mctrl & TIOCM_DTR)
198 ctrlc |= dtr_mask;
199 else
200 ctrls |= dtr_mask;
201
202 __raw_writel(ctrls, SC_CTRLS);
203 __raw_writel(ctrlc, SC_CTRLC);
204}
205
206static struct amba_pl010_data integrator_uart_data = {
207 .set_mctrl = integrator_uart_set_mctrl,
208};
209
210#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
211
212static DEFINE_RAW_SPINLOCK(cm_lock);
213
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217
218
219void cm_control(u32 mask, u32 set)
220{
221 unsigned long flags;
222 u32 val;
223
224 raw_spin_lock_irqsave(&cm_lock, flags);
225 val = readl(CM_CTRL) & ~mask;
226 writel(val | set, CM_CTRL);
227 raw_spin_unlock_irqrestore(&cm_lock, flags);
228}
229
230EXPORT_SYMBOL(cm_control);
231
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236
237void __init integrator_reserve(void)
238{
239 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
240}
241