linux/arch/arm/mach-orion5x/db88f5281-setup.c
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   1/*
   2 * arch/arm/mach-orion5x/db88f5281-setup.c
   3 *
   4 * Marvell Orion-2 Development Board Setup
   5 *
   6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7 *
   8 * This file is licensed under the terms of the GNU General Public
   9 * License version 2.  This program is licensed "as is" without any
  10 * warranty of any kind, whether express or implied.
  11 */
  12#include <linux/gpio.h>
  13#include <linux/kernel.h>
  14#include <linux/init.h>
  15#include <linux/platform_device.h>
  16#include <linux/pci.h>
  17#include <linux/irq.h>
  18#include <linux/mtd/physmap.h>
  19#include <linux/mtd/nand.h>
  20#include <linux/timer.h>
  21#include <linux/mv643xx_eth.h>
  22#include <linux/i2c.h>
  23#include <asm/mach-types.h>
  24#include <asm/mach/arch.h>
  25#include <asm/mach/pci.h>
  26#include <mach/orion5x.h>
  27#include <plat/orion_nand.h>
  28#include "common.h"
  29#include "mpp.h"
  30
  31/*****************************************************************************
  32 * DB-88F5281 on board devices
  33 ****************************************************************************/
  34
  35/*
  36 * 512K NOR flash Device bus boot chip select
  37 */
  38
  39#define DB88F5281_NOR_BOOT_BASE         0xf4000000
  40#define DB88F5281_NOR_BOOT_SIZE         SZ_512K
  41
  42/*
  43 * 7-Segment on Device bus chip select 0
  44 */
  45
  46#define DB88F5281_7SEG_BASE             0xfa000000
  47#define DB88F5281_7SEG_SIZE             SZ_1K
  48
  49/*
  50 * 32M NOR flash on Device bus chip select 1
  51 */
  52
  53#define DB88F5281_NOR_BASE              0xfc000000
  54#define DB88F5281_NOR_SIZE              SZ_32M
  55
  56/*
  57 * 32M NAND flash on Device bus chip select 2
  58 */
  59
  60#define DB88F5281_NAND_BASE             0xfa800000
  61#define DB88F5281_NAND_SIZE             SZ_1K
  62
  63/*
  64 * PCI
  65 */
  66
  67#define DB88F5281_PCI_SLOT0_OFFS                7
  68#define DB88F5281_PCI_SLOT0_IRQ_PIN             12
  69#define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN       13
  70
  71/*****************************************************************************
  72 * 512M NOR Flash on Device bus Boot CS
  73 ****************************************************************************/
  74
  75static struct physmap_flash_data db88f5281_boot_flash_data = {
  76        .width          = 1,    /* 8 bit bus width */
  77};
  78
  79static struct resource db88f5281_boot_flash_resource = {
  80        .flags          = IORESOURCE_MEM,
  81        .start          = DB88F5281_NOR_BOOT_BASE,
  82        .end            = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1,
  83};
  84
  85static struct platform_device db88f5281_boot_flash = {
  86        .name           = "physmap-flash",
  87        .id             = 0,
  88        .dev            = {
  89                .platform_data  = &db88f5281_boot_flash_data,
  90        },
  91        .num_resources  = 1,
  92        .resource       = &db88f5281_boot_flash_resource,
  93};
  94
  95/*****************************************************************************
  96 * 32M NOR Flash on Device bus CS1
  97 ****************************************************************************/
  98
  99static struct physmap_flash_data db88f5281_nor_flash_data = {
 100        .width          = 4,    /* 32 bit bus width */
 101};
 102
 103static struct resource db88f5281_nor_flash_resource = {
 104        .flags          = IORESOURCE_MEM,
 105        .start          = DB88F5281_NOR_BASE,
 106        .end            = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1,
 107};
 108
 109static struct platform_device db88f5281_nor_flash = {
 110        .name           = "physmap-flash",
 111        .id             = 1,
 112        .dev            = {
 113                .platform_data  = &db88f5281_nor_flash_data,
 114        },
 115        .num_resources  = 1,
 116        .resource       = &db88f5281_nor_flash_resource,
 117};
 118
 119/*****************************************************************************
 120 * 32M NAND Flash on Device bus CS2
 121 ****************************************************************************/
 122
 123static struct mtd_partition db88f5281_nand_parts[] = {
 124        {
 125                .name = "kernel",
 126                .offset = 0,
 127                .size = SZ_2M,
 128        }, {
 129                .name = "root",
 130                .offset = SZ_2M,
 131                .size = (SZ_16M - SZ_2M),
 132        }, {
 133                .name = "user",
 134                .offset = SZ_16M,
 135                .size = SZ_8M,
 136        }, {
 137                .name = "recovery",
 138                .offset = (SZ_16M + SZ_8M),
 139                .size = SZ_8M,
 140        },
 141};
 142
 143static struct resource db88f5281_nand_resource = {
 144        .flags          = IORESOURCE_MEM,
 145        .start          = DB88F5281_NAND_BASE,
 146        .end            = DB88F5281_NAND_BASE + DB88F5281_NAND_SIZE - 1,
 147};
 148
 149static struct orion_nand_data db88f5281_nand_data = {
 150        .parts          = db88f5281_nand_parts,
 151        .nr_parts       = ARRAY_SIZE(db88f5281_nand_parts),
 152        .cle            = 0,
 153        .ale            = 1,
 154        .width          = 8,
 155};
 156
 157static struct platform_device db88f5281_nand_flash = {
 158        .name           = "orion_nand",
 159        .id             = -1,
 160        .dev            = {
 161                .platform_data  = &db88f5281_nand_data,
 162        },
 163        .resource       = &db88f5281_nand_resource,
 164        .num_resources  = 1,
 165};
 166
 167/*****************************************************************************
 168 * 7-Segment on Device bus CS0
 169 * Dummy counter every 2 sec
 170 ****************************************************************************/
 171
 172static void __iomem *db88f5281_7seg;
 173static struct timer_list db88f5281_timer;
 174
 175static void db88f5281_7seg_event(unsigned long data)
 176{
 177        static int count = 0;
 178        writel(0, db88f5281_7seg + (count << 4));
 179        count = (count + 1) & 7;
 180        mod_timer(&db88f5281_timer, jiffies + 2 * HZ);
 181}
 182
 183static int __init db88f5281_7seg_init(void)
 184{
 185        if (machine_is_db88f5281()) {
 186                db88f5281_7seg = ioremap(DB88F5281_7SEG_BASE,
 187                                        DB88F5281_7SEG_SIZE);
 188                if (!db88f5281_7seg) {
 189                        printk(KERN_ERR "Failed to ioremap db88f5281_7seg\n");
 190                        return -EIO;
 191                }
 192                setup_timer(&db88f5281_timer, db88f5281_7seg_event, 0);
 193                mod_timer(&db88f5281_timer, jiffies + 2 * HZ);
 194        }
 195
 196        return 0;
 197}
 198
 199__initcall(db88f5281_7seg_init);
 200
 201/*****************************************************************************
 202 * PCI
 203 ****************************************************************************/
 204
 205void __init db88f5281_pci_preinit(void)
 206{
 207        int pin;
 208
 209        /*
 210         * Configure PCI GPIO IRQ pins
 211         */
 212        pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
 213        if (gpio_request(pin, "PCI Int1") == 0) {
 214                if (gpio_direction_input(pin) == 0) {
 215                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
 216                } else {
 217                        printk(KERN_ERR "db88f5281_pci_preinit faield to "
 218                                        "set_irq_type pin %d\n", pin);
 219                        gpio_free(pin);
 220                }
 221        } else {
 222                printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin);
 223        }
 224
 225        pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
 226        if (gpio_request(pin, "PCI Int2") == 0) {
 227                if (gpio_direction_input(pin) == 0) {
 228                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
 229                } else {
 230                        printk(KERN_ERR "db88f5281_pci_preinit faield "
 231                                        "to set_irq_type pin %d\n", pin);
 232                        gpio_free(pin);
 233                }
 234        } else {
 235                printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin);
 236        }
 237}
 238
 239static int __init db88f5281_pci_map_irq(const struct pci_dev *dev, u8 slot,
 240        u8 pin)
 241{
 242        int irq;
 243
 244        /*
 245         * Check for devices with hard-wired IRQs.
 246         */
 247        irq = orion5x_pci_map_irq(dev, slot, pin);
 248        if (irq != -1)
 249                return irq;
 250
 251        /*
 252         * PCI IRQs are connected via GPIOs.
 253         */
 254        switch (slot - DB88F5281_PCI_SLOT0_OFFS) {
 255        case 0:
 256                return gpio_to_irq(DB88F5281_PCI_SLOT0_IRQ_PIN);
 257        case 1:
 258        case 2:
 259                return gpio_to_irq(DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN);
 260        default:
 261                return -1;
 262        }
 263}
 264
 265static struct hw_pci db88f5281_pci __initdata = {
 266        .nr_controllers = 2,
 267        .preinit        = db88f5281_pci_preinit,
 268        .swizzle        = pci_std_swizzle,
 269        .setup          = orion5x_pci_sys_setup,
 270        .scan           = orion5x_pci_sys_scan_bus,
 271        .map_irq        = db88f5281_pci_map_irq,
 272};
 273
 274static int __init db88f5281_pci_init(void)
 275{
 276        if (machine_is_db88f5281())
 277                pci_common_init(&db88f5281_pci);
 278
 279        return 0;
 280}
 281
 282subsys_initcall(db88f5281_pci_init);
 283
 284/*****************************************************************************
 285 * Ethernet
 286 ****************************************************************************/
 287static struct mv643xx_eth_platform_data db88f5281_eth_data = {
 288        .phy_addr       = MV643XX_ETH_PHY_ADDR(8),
 289};
 290
 291/*****************************************************************************
 292 * RTC DS1339 on I2C bus
 293 ****************************************************************************/
 294static struct i2c_board_info __initdata db88f5281_i2c_rtc = {
 295        I2C_BOARD_INFO("ds1339", 0x68),
 296};
 297
 298/*****************************************************************************
 299 * General Setup
 300 ****************************************************************************/
 301static unsigned int db88f5281_mpp_modes[] __initdata = {
 302        MPP0_GPIO,              /* USB Over Current */
 303        MPP1_GPIO,              /* USB Vbat input */
 304        MPP2_PCI_ARB,           /* PCI_REQn[2] */
 305        MPP3_PCI_ARB,           /* PCI_GNTn[2] */
 306        MPP4_PCI_ARB,           /* PCI_REQn[3] */
 307        MPP5_PCI_ARB,           /* PCI_GNTn[3] */
 308        MPP6_GPIO,              /* JP0, CON17.2 */
 309        MPP7_GPIO,              /* JP1, CON17.1 */
 310        MPP8_GPIO,              /* JP2, CON11.2 */
 311        MPP9_GPIO,              /* JP3, CON11.3 */
 312        MPP10_GPIO,             /* RTC int */
 313        MPP11_GPIO,             /* Baud Rate Generator */
 314        MPP12_GPIO,             /* PCI int 1 */
 315        MPP13_GPIO,             /* PCI int 2 */
 316        MPP14_NAND,             /* NAND_REn[2] */
 317        MPP15_NAND,             /* NAND_WEn[2] */
 318        MPP16_UART,             /* UART1_RX */
 319        MPP17_UART,             /* UART1_TX */
 320        MPP18_UART,             /* UART1_CTSn */
 321        MPP19_UART,             /* UART1_RTSn */
 322        0,
 323};
 324
 325static void __init db88f5281_init(void)
 326{
 327        /*
 328         * Basic Orion setup. Need to be called early.
 329         */
 330        orion5x_init();
 331
 332        orion5x_mpp_conf(db88f5281_mpp_modes);
 333        writel(0, MPP_DEV_CTRL);                /* DEV_D[31:16] */
 334
 335        /*
 336         * Configure peripherals.
 337         */
 338        orion5x_ehci0_init();
 339        orion5x_eth_init(&db88f5281_eth_data);
 340        orion5x_i2c_init();
 341        orion5x_uart0_init();
 342        orion5x_uart1_init();
 343
 344        orion5x_setup_dev_boot_win(DB88F5281_NOR_BOOT_BASE,
 345                                DB88F5281_NOR_BOOT_SIZE);
 346        platform_device_register(&db88f5281_boot_flash);
 347
 348        orion5x_setup_dev0_win(DB88F5281_7SEG_BASE, DB88F5281_7SEG_SIZE);
 349
 350        orion5x_setup_dev1_win(DB88F5281_NOR_BASE, DB88F5281_NOR_SIZE);
 351        platform_device_register(&db88f5281_nor_flash);
 352
 353        orion5x_setup_dev2_win(DB88F5281_NAND_BASE, DB88F5281_NAND_SIZE);
 354        platform_device_register(&db88f5281_nand_flash);
 355
 356        i2c_register_board_info(0, &db88f5281_i2c_rtc, 1);
 357}
 358
 359MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
 360        /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */
 361        .atag_offset    = 0x100,
 362        .init_machine   = db88f5281_init,
 363        .map_io         = orion5x_map_io,
 364        .init_early     = orion5x_init_early,
 365        .init_irq       = orion5x_init_irq,
 366        .timer          = &orion5x_timer,
 367MACHINE_END
 368