LXR linux/arch/powerpc/include/asm/elf.h

   1#ifndef _ASM_POWERPC_ELF_H
   2#define _ASM_POWERPC_ELF_H
   3
   4#ifdef __KERNEL__
   5#include <linux/sched.h>        /* for task_struct */
   6#include <asm/page.h>
   7#include <asm/string.h>
   8#endif
   9
  10#include <linux/types.h>
  11
  12#include <asm/ptrace.h>
  13#include <asm/cputable.h>
  14#include <asm/auxvec.h>
  15
  16/* PowerPC relocations defined by the ABIs */
  17#define R_PPC_NONE              0
  18#define R_PPC_ADDR32            1       /* 32bit absolute address */
  19#define R_PPC_ADDR24            2       /* 26bit address, 2 bits ignored.  */
  20#define R_PPC_ADDR16            3       /* 16bit absolute address */
  21#define R_PPC_ADDR16_LO         4       /* lower 16bit of absolute address */
  22#define R_PPC_ADDR16_HI         5       /* high 16bit of absolute address */
  23#define R_PPC_ADDR16_HA         6       /* adjusted high 16bit */
  24#define R_PPC_ADDR14            7       /* 16bit address, 2 bits ignored */
  25#define R_PPC_ADDR14_BRTAKEN    8
  26#define R_PPC_ADDR14_BRNTAKEN   9
  27#define R_PPC_REL24             10      /* PC relative 26 bit */
  28#define R_PPC_REL14             11      /* PC relative 16 bit */
  29#define R_PPC_REL14_BRTAKEN     12
  30#define R_PPC_REL14_BRNTAKEN    13
  31#define R_PPC_GOT16             14
  32#define R_PPC_GOT16_LO          15
  33#define R_PPC_GOT16_HI          16
  34#define R_PPC_GOT16_HA          17
  35#define R_PPC_PLTREL24          18
  36#define R_PPC_COPY              19
  37#define R_PPC_GLOB_DAT          20
  38#define R_PPC_JMP_SLOT          21
  39#define R_PPC_RELATIVE          22
  40#define R_PPC_LOCAL24PC         23
  41#define R_PPC_UADDR32           24
  42#define R_PPC_UADDR16           25
  43#define R_PPC_REL32             26
  44#define R_PPC_PLT32             27
  45#define R_PPC_PLTREL32          28
  46#define R_PPC_PLT16_LO          29
  47#define R_PPC_PLT16_HI          30
  48#define R_PPC_PLT16_HA          31
  49#define R_PPC_SDAREL16          32
  50#define R_PPC_SECTOFF           33
  51#define R_PPC_SECTOFF_LO        34
  52#define R_PPC_SECTOFF_HI        35
  53#define R_PPC_SECTOFF_HA        36
  54
  55/* PowerPC relocations defined for the TLS access ABI.  */
  56#define R_PPC_TLS               67 /* none      (sym+add)@tls */
  57#define R_PPC_DTPMOD32          68 /* word32    (sym+add)@dtpmod */
  58#define R_PPC_TPREL16           69 /* half16*   (sym+add)@tprel */
  59#define R_PPC_TPREL16_LO        70 /* half16    (sym+add)@tprel@l */
  60#define R_PPC_TPREL16_HI        71 /* half16    (sym+add)@tprel@h */
  61#define R_PPC_TPREL16_HA        72 /* half16    (sym+add)@tprel@ha */
  62#define R_PPC_TPREL32           73 /* word32    (sym+add)@tprel */
  63#define R_PPC_DTPREL16          74 /* half16*   (sym+add)@dtprel */
  64#define R_PPC_DTPREL16_LO       75 /* half16    (sym+add)@dtprel@l */
  65#define R_PPC_DTPREL16_HI       76 /* half16    (sym+add)@dtprel@h */
  66#define R_PPC_DTPREL16_HA       77 /* half16    (sym+add)@dtprel@ha */
  67#define R_PPC_DTPREL32          78 /* word32    (sym+add)@dtprel */
  68#define R_PPC_GOT_TLSGD16       79 /* half16*   (sym+add)@got@tlsgd */
  69#define R_PPC_GOT_TLSGD16_LO    80 /* half16    (sym+add)@got@tlsgd@l */
  70#define R_PPC_GOT_TLSGD16_HI    81 /* half16    (sym+add)@got@tlsgd@h */
  71#define R_PPC_GOT_TLSGD16_HA    82 /* half16    (sym+add)@got@tlsgd@ha */
  72#define R_PPC_GOT_TLSLD16       83 /* half16*   (sym+add)@got@tlsld */
  73#define R_PPC_GOT_TLSLD16_LO    84 /* half16    (sym+add)@got@tlsld@l */
  74#define R_PPC_GOT_TLSLD16_HI    85 /* half16    (sym+add)@got@tlsld@h */
  75#define R_PPC_GOT_TLSLD16_HA    86 /* half16    (sym+add)@got@tlsld@ha */
  76#define R_PPC_GOT_TPREL16       87 /* half16*   (sym+add)@got@tprel */
  77#define R_PPC_GOT_TPREL16_LO    88 /* half16    (sym+add)@got@tprel@l */
  78#define R_PPC_GOT_TPREL16_HI    89 /* half16    (sym+add)@got@tprel@h */
  79#define R_PPC_GOT_TPREL16_HA    90 /* half16    (sym+add)@got@tprel@ha */
  80#define R_PPC_GOT_DTPREL16      91 /* half16*   (sym+add)@got@dtprel */
  81#define R_PPC_GOT_DTPREL16_LO   92 /* half16*   (sym+add)@got@dtprel@l */
  82#define R_PPC_GOT_DTPREL16_HI   93 /* half16*   (sym+add)@got@dtprel@h */
  83#define R_PPC_GOT_DTPREL16_HA   94 /* half16*   (sym+add)@got@dtprel@ha */
  84
  85/* keep this the last entry. */
  86#define R_PPC_NUM               95
  87
  88/*
  89 * ELF register definitions..
  90 *
  91 * This program is free software; you can redistribute it and/or
  92 * modify it under the terms of the GNU General Public License
  93 * as published by the Free Software Foundation; either version
  94 * 2 of the License, or (at your option) any later version.
  95 */
  96
  97#define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
  98#define ELF_NFPREG      33      /* includes fpscr */
  99
 100typedef unsigned long elf_greg_t64;
 101typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
 102
 103typedef unsigned int elf_greg_t32;
 104typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
 105typedef elf_gregset_t32 compat_elf_gregset_t;
 106
 107/*
 108 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
 109 */
 110#ifdef __powerpc64__
 111# define ELF_NVRREG32   33      /* includes vscr & vrsave stuffed together */
 112# define ELF_NVRREG     34      /* includes vscr & vrsave in split vectors */
 113# define ELF_NVSRHALFREG 32     /* Half the vsx registers */
 114# define ELF_GREG_TYPE  elf_greg_t64
 115#else
 116# define ELF_NEVRREG    34      /* includes acc (as 2) */
 117# define ELF_NVRREG     33      /* includes vscr */
 118# define ELF_GREG_TYPE  elf_greg_t32
 119# define ELF_ARCH       EM_PPC
 120# define ELF_CLASS      ELFCLASS32
 121# define ELF_DATA       ELFDATA2MSB
 122#endif /* __powerpc64__ */
 123
 124#ifndef ELF_ARCH
 125# define ELF_ARCH       EM_PPC64
 126# define ELF_CLASS      ELFCLASS64
 127# define ELF_DATA       ELFDATA2MSB
 128  typedef elf_greg_t64 elf_greg_t;
 129  typedef elf_gregset_t64 elf_gregset_t;
 130#else
 131  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
 132  typedef elf_greg_t32 elf_greg_t;
 133  typedef elf_gregset_t32 elf_gregset_t;
 134#endif /* ELF_ARCH */
 135
 136/* Floating point registers */
 137typedef double elf_fpreg_t;
 138typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 139
 140/* Altivec registers */
 141/*
 142 * The entries with indexes 0-31 contain the corresponding vector registers. 
 143 * The entry with index 32 contains the vscr as the last word (offset 12) 
 144 * within the quadword.  This allows the vscr to be stored as either a 
 145 * quadword (since it must be copied via a vector register to/from storage) 
 146 * or as a word.  
 147 *
 148 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  
 149 * word (offset 0) within the quadword.
 150 *
 151 * This definition of the VMX state is compatible with the current PPC32 
 152 * ptrace interface.  This allows signal handling and ptrace to use the same 
 153 * structures.  This also simplifies the implementation of a bi-arch 
 154 * (combined (32- and 64-bit) gdb.
 155 *
 156 * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
 157 * vrsave along with vscr and so only uses 33 vectors for the register set
 158 */
 159typedef __vector128 elf_vrreg_t;
 160typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
 161#ifdef __powerpc64__
 162typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 163typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
 164#endif
 165
 166#ifdef __KERNEL__
 167/*
 168 * This is used to ensure we don't load something for the wrong architecture.
 169 */
 170#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
 171#define compat_elf_check_arch(x)        ((x)->e_machine == EM_PPC)
 172
 173#define CORE_DUMP_USE_REGSET
 174#define ELF_EXEC_PAGESIZE       PAGE_SIZE
 175
 176/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
 177   use of this is to invoke "./ld.so someprog" to test out a new version of
 178   the loader.  We need to make sure that it is out of the way of the program
 179   that it will "exec", and that there is sufficient room for the brk.  */
 180
 181extern unsigned long randomize_et_dyn(unsigned long base);
 182#define ELF_ET_DYN_BASE         (randomize_et_dyn(0x20000000))
 183
 184/*
 185 * Our registers are always unsigned longs, whether we're a 32 bit
 186 * process or 64 bit, on either a 64 bit or 32 bit kernel.
 187 *
 188 * This macro relies on elf_regs[i] having the right type to truncate to,
 189 * either u32 or u64.  It defines the body of the elf_core_copy_regs
 190 * function, either the native one with elf_gregset_t elf_regs or
 191 * the 32-bit one with elf_gregset_t32 elf_regs.
 192 */
 193#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
 194        int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
 195                           (size_t)ELF_NGREG);                    \
 196        for (i = 0; i < nregs; i++) \
 197                elf_regs[i] = ((unsigned long *) regs)[i]; \
 198        memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
 199
 200/* Common routine for both 32-bit and 64-bit native processes */
 201static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
 202                                          struct pt_regs *regs)
 203{
 204        PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
 205}
 206#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
 207
 208typedef elf_vrregset_t elf_fpxregset_t;
 209
 210/* ELF_HWCAP yields a mask that user programs can use to figure out what
 211   instruction set this cpu supports.  This could be done in userspace,
 212   but it's not easy, and we've already done it here.  */
 213# define ELF_HWCAP      (cur_cpu_spec->cpu_user_features)
 214
 215/* This yields a string that ld.so will use to load implementation
 216   specific libraries for optimization.  This is more specific in
 217   intent than poking at uname or /proc/cpuinfo.  */
 218
 219#define ELF_PLATFORM    (cur_cpu_spec->platform)
 220
 221/* While ELF_PLATFORM indicates the ISA supported by the platform, it
 222 * may not accurately reflect the underlying behavior of the hardware
 223 * (as in the case of running in Power5+ compatibility mode on a
 224 * Power6 machine).  ELF_BASE_PLATFORM allows ld.so to load libraries
 225 * that are tuned for the real hardware.
 226 */
 227#define ELF_BASE_PLATFORM (powerpc_base_platform)
 228
 229#ifdef __powerpc64__
 230# define ELF_PLAT_INIT(_r, load_addr)   do {    \
 231        _r->gpr[2] = load_addr;                 \
 232} while (0)
 233#endif /* __powerpc64__ */
 234
 235#ifdef __powerpc64__
 236# define SET_PERSONALITY(ex)                                    \
 237do {                                                            \
 238        if ((ex).e_ident[EI_CLASS] == ELFCLASS32)               \
 239                set_thread_flag(TIF_32BIT);                     \
 240        else                                                    \
 241                clear_thread_flag(TIF_32BIT);                   \
 242        if (personality(current->personality) != PER_LINUX32)   \
 243                set_personality(PER_LINUX |                     \
 244                        (current->personality & (~PER_MASK)));  \
 245} while (0)
 246/*
 247 * An executable for which elf_read_implies_exec() returns TRUE will
 248 * have the READ_IMPLIES_EXEC personality flag set automatically. This
 249 * is only required to work around bugs in old 32bit toolchains. Since
 250 * the 64bit ABI has never had these issues dont enable the workaround
 251 * even if we have an executable stack.
 252 */
 253# define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
 254                (exec_stk == EXSTACK_DEFAULT) : 0)
 255#else 
 256# define SET_PERSONALITY(ex) \
 257  set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
 258# define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
 259#endif /* __powerpc64__ */
 260
 261extern int dcache_bsize;
 262extern int icache_bsize;
 263extern int ucache_bsize;
 264
 265/* vDSO has arch_setup_additional_pages */
 266#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 267struct linux_binprm;
 268extern int arch_setup_additional_pages(struct linux_binprm *bprm,
 269                                       int uses_interp);
 270#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)
 271
 272/* 1GB for 64bit, 8MB for 32bit */
 273#define STACK_RND_MASK (is_32bit_task() ? \
 274        (0x7ff >> (PAGE_SHIFT - 12)) : \
 275        (0x3ffff >> (PAGE_SHIFT - 12)))
 276
 277extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 278#define arch_randomize_brk arch_randomize_brk
 279
 280#endif /* __KERNEL__ */
 281
 282/*
 283 * The requirements here are:
 284 * - keep the final alignment of sp (sp & 0xf)
 285 * - make sure the 32-bit value at the first 16 byte aligned position of
 286 *   AUXV is greater than 16 for glibc compatibility.
 287 *   AT_IGNOREPPC is used for that.
 288 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
 289 *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
 290 * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
 291 */
 292#define ARCH_DLINFO                                                     \
 293do {                                                                    \
 294        /* Handle glibc compatibility. */                               \
 295        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
 296        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
 297        /* Cache size items */                                          \
 298        NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
 299        NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
 300        NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
 301        VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
 302} while (0)
 303
 304/* PowerPC64 relocations defined by the ABIs */
 305#define R_PPC64_NONE    R_PPC_NONE
 306#define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
 307#define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */
 308#define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */
 309#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */
 310#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
 311#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */
 312#define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */
 313#define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN
 314#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
 315#define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */
 316#define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */
 317#define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN
 318#define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN
 319#define R_PPC64_GOT16     R_PPC_GOT16
 320#define R_PPC64_GOT16_LO  R_PPC_GOT16_LO
 321#define R_PPC64_GOT16_HI  R_PPC_GOT16_HI
 322#define R_PPC64_GOT16_HA  R_PPC_GOT16_HA
 323
 324#define R_PPC64_COPY      R_PPC_COPY
 325#define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT
 326#define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT
 327#define R_PPC64_RELATIVE  R_PPC_RELATIVE
 328
 329#define R_PPC64_UADDR32   R_PPC_UADDR32
 330#define R_PPC64_UADDR16   R_PPC_UADDR16
 331#define R_PPC64_REL32     R_PPC_REL32
 332#define R_PPC64_PLT32     R_PPC_PLT32
 333#define R_PPC64_PLTREL32  R_PPC_PLTREL32
 334#define R_PPC64_PLT16_LO  R_PPC_PLT16_LO
 335#define R_PPC64_PLT16_HI  R_PPC_PLT16_HI
 336#define R_PPC64_PLT16_HA  R_PPC_PLT16_HA
 337
 338#define R_PPC64_SECTOFF     R_PPC_SECTOFF
 339#define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO
 340#define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI
 341#define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA
 342#define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */
 343#define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */
 344#define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */
 345#define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */
 346#define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */
 347#define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */
 348#define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */
 349#define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */
 350#define R_PPC64_PLT64       45  /* doubleword64 L + A.  */
 351#define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */
 352#define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */
 353#define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */
 354#define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */
 355#define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */
 356#define R_PPC64_TOC         51  /* doubleword64 .TOC. */
 357#define R_PPC64_PLTGOT16    52  /* half16* M + A.  */
 358#define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */
 359#define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */
 360#define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */
 361
 362#define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */
 363#define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */
 364#define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */
 365#define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */
 366#define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */
 367#define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */
 368#define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */
 369#define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */
 370#define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */
 371#define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */
 372#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */
 373
 374/* PowerPC64 relocations defined for the TLS access ABI.  */
 375#define R_PPC64_TLS             67 /* none      (sym+add)@tls */
 376#define R_PPC64_DTPMOD64        68 /* doubleword64 (sym+add)@dtpmod */
 377#define R_PPC64_TPREL16         69 /* half16*   (sym+add)@tprel */
 378#define R_PPC64_TPREL16_LO      70 /* half16    (sym+add)@tprel@l */
 379#define R_PPC64_TPREL16_HI      71 /* half16    (sym+add)@tprel@h */
 380#define R_PPC64_TPREL16_HA      72 /* half16    (sym+add)@tprel@ha */
 381#define R_PPC64_TPREL64         73 /* doubleword64 (sym+add)@tprel */
 382#define R_PPC64_DTPREL16        74 /* half16*   (sym+add)@dtprel */
 383#define R_PPC64_DTPREL16_LO     75 /* half16    (sym+add)@dtprel@l */
 384#define R_PPC64_DTPREL16_HI     76 /* half16    (sym+add)@dtprel@h */
 385#define R_PPC64_DTPREL16_HA     77 /* half16    (sym+add)@dtprel@ha */
 386#define R_PPC64_DTPREL64        78 /* doubleword64 (sym+add)@dtprel */
 387#define R_PPC64_GOT_TLSGD16     79 /* half16*   (sym+add)@got@tlsgd */
 388#define R_PPC64_GOT_TLSGD16_LO  80 /* half16    (sym+add)@got@tlsgd@l */
 389#define R_PPC64_GOT_TLSGD16_HI  81 /* half16    (sym+add)@got@tlsgd@h */
 390#define R_PPC64_GOT_TLSGD16_HA  82 /* half16    (sym+add)@got@tlsgd@ha */
 391#define R_PPC64_GOT_TLSLD16     83 /* half16*   (sym+add)@got@tlsld */
 392#define R_PPC64_GOT_TLSLD16_LO  84 /* half16    (sym+add)@got@tlsld@l */
 393#define R_PPC64_GOT_TLSLD16_HI  85 /* half16    (sym+add)@got@tlsld@h */
 394#define R_PPC64_GOT_TLSLD16_HA  86 /* half16    (sym+add)@got@tlsld@ha */
 395#define R_PPC64_GOT_TPREL16_DS  87 /* half16ds* (sym+add)@got@tprel */
 396#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
 397#define R_PPC64_GOT_TPREL16_HI  89 /* half16    (sym+add)@got@tprel@h */
 398#define R_PPC64_GOT_TPREL16_HA  90 /* half16    (sym+add)@got@tprel@ha */
 399#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
 400#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
 401#define R_PPC64_GOT_DTPREL16_HI 93 /* half16    (sym+add)@got@dtprel@h */
 402#define R_PPC64_GOT_DTPREL16_HA 94 /* half16    (sym+add)@got@dtprel@ha */
 403#define R_PPC64_TPREL16_DS      95 /* half16ds* (sym+add)@tprel */
 404#define R_PPC64_TPREL16_LO_DS   96 /* half16ds  (sym+add)@tprel@l */
 405#define R_PPC64_TPREL16_HIGHER  97 /* half16    (sym+add)@tprel@higher */
 406#define R_PPC64_TPREL16_HIGHERA 98 /* half16    (sym+add)@tprel@highera */
 407#define R_PPC64_TPREL16_HIGHEST 99 /* half16    (sym+add)@tprel@highest */
 408#define R_PPC64_TPREL16_HIGHESTA 100 /* half16  (sym+add)@tprel@highesta */
 409#define R_PPC64_DTPREL16_DS     101 /* half16ds* (sym+add)@dtprel */
 410#define R_PPC64_DTPREL16_LO_DS  102 /* half16ds (sym+add)@dtprel@l */
 411#define R_PPC64_DTPREL16_HIGHER 103 /* half16   (sym+add)@dtprel@higher */
 412#define R_PPC64_DTPREL16_HIGHERA 104 /* half16  (sym+add)@dtprel@highera */
 413#define R_PPC64_DTPREL16_HIGHEST 105 /* half16  (sym+add)@dtprel@highest */
 414#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
 415
 416/* Keep this the last entry.  */
 417#define R_PPC64_NUM             107
 418
 419/* There's actually a third entry here, but it's unused */
 420struct ppc64_opd_entry
 421{
 422        unsigned long funcaddr;
 423        unsigned long r2;
 424};
 425
 426#ifdef  __KERNEL__
 427
 428#ifdef CONFIG_SPU_BASE
 429/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
 430#define NT_SPU          1
 431
 432#define ARCH_HAVE_EXTRA_ELF_NOTES
 433
 434#endif /* CONFIG_SPU_BASE */
 435
 436#endif /* __KERNEL */
 437
 438#endif /* _ASM_POWERPC_ELF_H */
 439