1#include <linux/clocksource.h>
2#include <linux/clockchips.h>
3#include <linux/interrupt.h>
4#include <linux/export.h>
5#include <linux/sysdev.h>
6#include <linux/delay.h>
7#include <linux/errno.h>
8#include <linux/i8253.h>
9#include <linux/slab.h>
10#include <linux/hpet.h>
11#include <linux/init.h>
12#include <linux/cpu.h>
13#include <linux/pm.h>
14#include <linux/io.h>
15
16#include <asm/fixmap.h>
17#include <asm/hpet.h>
18#include <asm/time.h>
19
20#define HPET_MASK CLOCKSOURCE_MASK(32)
21
22
23
24#define FSEC_PER_NSEC 1000000L
25
26#define HPET_DEV_USED_BIT 2
27#define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
28#define HPET_DEV_VALID 0x8
29#define HPET_DEV_FSB_CAP 0x1000
30#define HPET_DEV_PERI_CAP 0x2000
31
32#define HPET_MIN_CYCLES 128
33#define HPET_MIN_PROG_DELTA (HPET_MIN_CYCLES + (HPET_MIN_CYCLES >> 1))
34
35#define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
36
37
38
39
40unsigned long hpet_address;
41u8 hpet_blockid;
42u8 hpet_msi_disable;
43
44#ifdef CONFIG_PCI_MSI
45static unsigned long hpet_num_timers;
46#endif
47static void __iomem *hpet_virt_address;
48
49struct hpet_dev {
50 struct clock_event_device evt;
51 unsigned int num;
52 int cpu;
53 unsigned int irq;
54 unsigned int flags;
55 char name[10];
56};
57
58inline unsigned int hpet_readl(unsigned int a)
59{
60 return readl(hpet_virt_address + a);
61}
62
63static inline void hpet_writel(unsigned int d, unsigned int a)
64{
65 writel(d, hpet_virt_address + a);
66}
67
68#ifdef CONFIG_X86_64
69#include <asm/pgtable.h>
70#endif
71
72static inline void hpet_set_mapping(void)
73{
74 hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
75#ifdef CONFIG_X86_64
76 __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VVAR_NOCACHE);
77#endif
78}
79
80static inline void hpet_clear_mapping(void)
81{
82 iounmap(hpet_virt_address);
83 hpet_virt_address = NULL;
84}
85
86
87
88
89static int boot_hpet_disable;
90int hpet_force_user;
91static int hpet_verbose;
92
93static int __init hpet_setup(char *str)
94{
95 if (str) {
96 if (!strncmp("disable", str, 7))
97 boot_hpet_disable = 1;
98 if (!strncmp("force", str, 5))
99 hpet_force_user = 1;
100 if (!strncmp("verbose", str, 7))
101 hpet_verbose = 1;
102 }
103 return 1;
104}
105__setup("hpet=", hpet_setup);
106
107static int __init disable_hpet(char *str)
108{
109 boot_hpet_disable = 1;
110 return 1;
111}
112__setup("nohpet", disable_hpet);
113
114static inline int is_hpet_capable(void)
115{
116 return !boot_hpet_disable && hpet_address;
117}
118
119
120
121
122static int hpet_legacy_int_enabled;
123
124
125
126
127int is_hpet_enabled(void)
128{
129 return is_hpet_capable() && hpet_legacy_int_enabled;
130}
131EXPORT_SYMBOL_GPL(is_hpet_enabled);
132
133static void _hpet_print_config(const char *function, int line)
134{
135 u32 i, timers, l, h;
136 printk(KERN_INFO "hpet: %s(%d):\n", function, line);
137 l = hpet_readl(HPET_ID);
138 h = hpet_readl(HPET_PERIOD);
139 timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
140 printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
141 l = hpet_readl(HPET_CFG);
142 h = hpet_readl(HPET_STATUS);
143 printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
144 l = hpet_readl(HPET_COUNTER);
145 h = hpet_readl(HPET_COUNTER+4);
146 printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
147
148 for (i = 0; i < timers; i++) {
149 l = hpet_readl(HPET_Tn_CFG(i));
150 h = hpet_readl(HPET_Tn_CFG(i)+4);
151 printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
152 i, l, h);
153 l = hpet_readl(HPET_Tn_CMP(i));
154 h = hpet_readl(HPET_Tn_CMP(i)+4);
155 printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
156 i, l, h);
157 l = hpet_readl(HPET_Tn_ROUTE(i));
158 h = hpet_readl(HPET_Tn_ROUTE(i)+4);
159 printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
160 i, l, h);
161 }
162}
163
164#define hpet_print_config() \
165do { \
166 if (hpet_verbose) \
167 _hpet_print_config(__FUNCTION__, __LINE__); \
168} while (0)
169
170
171
172
173
174#ifdef CONFIG_HPET
175
176static void hpet_reserve_msi_timers(struct hpet_data *hd);
177
178static void hpet_reserve_platform_timers(unsigned int id)
179{
180 struct hpet __iomem *hpet = hpet_virt_address;
181 struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
182 unsigned int nrtimers, i;
183 struct hpet_data hd;
184
185 nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
186
187 memset(&hd, 0, sizeof(hd));
188 hd.hd_phys_address = hpet_address;
189 hd.hd_address = hpet;
190 hd.hd_nirqs = nrtimers;
191 hpet_reserve_timer(&hd, 0);
192
193#ifdef CONFIG_HPET_EMULATE_RTC
194 hpet_reserve_timer(&hd, 1);
195#endif
196
197
198
199
200
201
202 hd.hd_irq[0] = HPET_LEGACY_8254;
203 hd.hd_irq[1] = HPET_LEGACY_RTC;
204
205 for (i = 2; i < nrtimers; timer++, i++) {
206 hd.hd_irq[i] = (readl(&timer->hpet_config) &
207 Tn_INT_ROUTE_CNF_MASK) >> Tn_INT_ROUTE_CNF_SHIFT;
208 }
209
210 hpet_reserve_msi_timers(&hd);
211
212 hpet_alloc(&hd);
213
214}
215#else
216static void hpet_reserve_platform_timers(unsigned int id) { }
217#endif
218
219
220
221
222static unsigned long hpet_freq;
223
224static void hpet_legacy_set_mode(enum clock_event_mode mode,
225 struct clock_event_device *evt);
226static int hpet_legacy_next_event(unsigned long delta,
227 struct clock_event_device *evt);
228
229
230
231
232static struct clock_event_device hpet_clockevent = {
233 .name = "hpet",
234 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
235 .set_mode = hpet_legacy_set_mode,
236 .set_next_event = hpet_legacy_next_event,
237 .irq = 0,
238 .rating = 50,
239};
240
241static void hpet_stop_counter(void)
242{
243 unsigned long cfg = hpet_readl(HPET_CFG);
244 cfg &= ~HPET_CFG_ENABLE;
245 hpet_writel(cfg, HPET_CFG);
246}
247
248static void hpet_reset_counter(void)
249{
250 hpet_writel(0, HPET_COUNTER);
251 hpet_writel(0, HPET_COUNTER + 4);
252}
253
254static void hpet_start_counter(void)
255{
256 unsigned int cfg = hpet_readl(HPET_CFG);
257 cfg |= HPET_CFG_ENABLE;
258 hpet_writel(cfg, HPET_CFG);
259}
260
261static void hpet_restart_counter(void)
262{
263 hpet_stop_counter();
264 hpet_reset_counter();
265 hpet_start_counter();
266}
267
268static void hpet_resume_device(void)
269{
270 force_hpet_resume();
271}
272
273static void hpet_resume_counter(struct clocksource *cs)
274{
275 hpet_resume_device();
276 hpet_restart_counter();
277}
278
279static void hpet_enable_legacy_int(void)
280{
281 unsigned int cfg = hpet_readl(HPET_CFG);
282
283 cfg |= HPET_CFG_LEGACY;
284 hpet_writel(cfg, HPET_CFG);
285 hpet_legacy_int_enabled = 1;
286}
287
288static void hpet_legacy_clockevent_register(void)
289{
290
291 hpet_enable_legacy_int();
292
293
294
295
296
297 hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
298 clockevents_config_and_register(&hpet_clockevent, hpet_freq,
299 HPET_MIN_PROG_DELTA, 0x7FFFFFFF);
300 global_clock_event = &hpet_clockevent;
301 printk(KERN_DEBUG "hpet clockevent registered\n");
302}
303
304static int hpet_setup_msi_irq(unsigned int irq);
305
306static void hpet_set_mode(enum clock_event_mode mode,
307 struct clock_event_device *evt, int timer)
308{
309 unsigned int cfg, cmp, now;
310 uint64_t delta;
311
312 switch (mode) {
313 case CLOCK_EVT_MODE_PERIODIC:
314 hpet_stop_counter();
315 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
316 delta >>= evt->shift;
317 now = hpet_readl(HPET_COUNTER);
318 cmp = now + (unsigned int) delta;
319 cfg = hpet_readl(HPET_Tn_CFG(timer));
320
321 cfg &= ~HPET_TN_LEVEL;
322 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
323 HPET_TN_SETVAL | HPET_TN_32BIT;
324 hpet_writel(cfg, HPET_Tn_CFG(timer));
325 hpet_writel(cmp, HPET_Tn_CMP(timer));
326 udelay(1);
327
328
329
330
331
332
333
334 hpet_writel((unsigned int) delta, HPET_Tn_CMP(timer));
335 hpet_start_counter();
336 hpet_print_config();
337 break;
338
339 case CLOCK_EVT_MODE_ONESHOT:
340 cfg = hpet_readl(HPET_Tn_CFG(timer));
341 cfg &= ~HPET_TN_PERIODIC;
342 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
343 hpet_writel(cfg, HPET_Tn_CFG(timer));
344 break;
345
346 case CLOCK_EVT_MODE_UNUSED:
347 case CLOCK_EVT_MODE_SHUTDOWN:
348 cfg = hpet_readl(HPET_Tn_CFG(timer));
349 cfg &= ~HPET_TN_ENABLE;
350 hpet_writel(cfg, HPET_Tn_CFG(timer));
351 break;
352
353 case CLOCK_EVT_MODE_RESUME:
354 if (timer == 0) {
355 hpet_enable_legacy_int();
356 } else {
357 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
358 hpet_setup_msi_irq(hdev->irq);
359 disable_irq(hdev->irq);
360 irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
361 enable_irq(hdev->irq);
362 }
363 hpet_print_config();
364 break;
365 }
366}
367
368static int hpet_next_event(unsigned long delta,
369 struct clock_event_device *evt, int timer)
370{
371 u32 cnt;
372 s32 res;
373
374 cnt = hpet_readl(HPET_COUNTER);
375 cnt += (u32) delta;
376 hpet_writel(cnt, HPET_Tn_CMP(timer));
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400 res = (s32)(cnt - hpet_readl(HPET_COUNTER));
401
402 return res < HPET_MIN_CYCLES ? -ETIME : 0;
403}
404
405static void hpet_legacy_set_mode(enum clock_event_mode mode,
406 struct clock_event_device *evt)
407{
408 hpet_set_mode(mode, evt, 0);
409}
410
411static int hpet_legacy_next_event(unsigned long delta,
412 struct clock_event_device *evt)
413{
414 return hpet_next_event(delta, evt, 0);
415}
416
417
418
419
420#ifdef CONFIG_PCI_MSI
421
422static DEFINE_PER_CPU(struct hpet_dev *, cpu_hpet_dev);
423static struct hpet_dev *hpet_devs;
424
425void hpet_msi_unmask(struct irq_data *data)
426{
427 struct hpet_dev *hdev = data->handler_data;
428 unsigned int cfg;
429
430
431 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
432 cfg |= HPET_TN_FSB;
433 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
434}
435
436void hpet_msi_mask(struct irq_data *data)
437{
438 struct hpet_dev *hdev = data->handler_data;
439 unsigned int cfg;
440
441
442 cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
443 cfg &= ~HPET_TN_FSB;
444 hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
445}
446
447void hpet_msi_write(struct hpet_dev *hdev, struct msi_msg *msg)
448{
449 hpet_writel(msg->data, HPET_Tn_ROUTE(hdev->num));
450 hpet_writel(msg->address_lo, HPET_Tn_ROUTE(hdev->num) + 4);
451}
452
453void hpet_msi_read(struct hpet_dev *hdev, struct msi_msg *msg)
454{
455 msg->data = hpet_readl(HPET_Tn_ROUTE(hdev->num));
456 msg->address_lo = hpet_readl(HPET_Tn_ROUTE(hdev->num) + 4);
457 msg->address_hi = 0;
458}
459
460static void hpet_msi_set_mode(enum clock_event_mode mode,
461 struct clock_event_device *evt)
462{
463 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
464 hpet_set_mode(mode, evt, hdev->num);
465}
466
467static int hpet_msi_next_event(unsigned long delta,
468 struct clock_event_device *evt)
469{
470 struct hpet_dev *hdev = EVT_TO_HPET_DEV(evt);
471 return hpet_next_event(delta, evt, hdev->num);
472}
473
474static int hpet_setup_msi_irq(unsigned int irq)
475{
476 if (arch_setup_hpet_msi(irq, hpet_blockid)) {
477 destroy_irq(irq);
478 return -EINVAL;
479 }
480 return 0;
481}
482
483static int hpet_assign_irq(struct hpet_dev *dev)
484{
485 unsigned int irq;
486
487 irq = create_irq_nr(0, -1);
488 if (!irq)
489 return -EINVAL;
490
491 irq_set_handler_data(irq, dev);
492
493 if (hpet_setup_msi_irq(irq))
494 return -EINVAL;
495
496 dev->irq = irq;
497 return 0;
498}
499
500static irqreturn_t hpet_interrupt_handler(int irq, void *data)
501{
502 struct hpet_dev *dev = (struct hpet_dev *)data;
503 struct clock_event_device *hevt = &dev->evt;
504
505 if (!hevt->event_handler) {
506 printk(KERN_INFO "Spurious HPET timer interrupt on HPET timer %d\n",
507 dev->num);
508 return IRQ_HANDLED;
509 }
510
511 hevt->event_handler(hevt);
512 return IRQ_HANDLED;
513}
514
515static int hpet_setup_irq(struct hpet_dev *dev)
516{
517
518 if (request_irq(dev->irq, hpet_interrupt_handler,
519 IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING,
520 dev->name, dev))
521 return -1;
522
523 disable_irq(dev->irq);
524 irq_set_affinity(dev->irq, cpumask_of(dev->cpu));
525 enable_irq(dev->irq);
526
527 printk(KERN_DEBUG "hpet: %s irq %d for MSI\n",
528 dev->name, dev->irq);
529
530 return 0;
531}
532
533
534static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
535{
536 struct clock_event_device *evt = &hdev->evt;
537
538 WARN_ON(cpu != smp_processor_id());
539 if (!(hdev->flags & HPET_DEV_VALID))
540 return;
541
542 if (hpet_setup_msi_irq(hdev->irq))
543 return;
544
545 hdev->cpu = cpu;
546 per_cpu(cpu_hpet_dev, cpu) = hdev;
547 evt->name = hdev->name;
548 hpet_setup_irq(hdev);
549 evt->irq = hdev->irq;
550
551 evt->rating = 110;
552 evt->features = CLOCK_EVT_FEAT_ONESHOT;
553 if (hdev->flags & HPET_DEV_PERI_CAP)
554 evt->features |= CLOCK_EVT_FEAT_PERIODIC;
555
556 evt->set_mode = hpet_msi_set_mode;
557 evt->set_next_event = hpet_msi_next_event;
558 evt->cpumask = cpumask_of(hdev->cpu);
559
560 clockevents_config_and_register(evt, hpet_freq, HPET_MIN_PROG_DELTA,
561 0x7FFFFFFF);
562}
563
564#ifdef CONFIG_HPET
565
566#define RESERVE_TIMERS 1
567#else
568#define RESERVE_TIMERS 0
569#endif
570
571static void hpet_msi_capability_lookup(unsigned int start_timer)
572{
573 unsigned int id;
574 unsigned int num_timers;
575 unsigned int num_timers_used = 0;
576 int i;
577
578 if (hpet_msi_disable)
579 return;
580
581 if (boot_cpu_has(X86_FEATURE_ARAT))
582 return;
583 id = hpet_readl(HPET_ID);
584
585 num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
586 num_timers++;
587 hpet_print_config();
588
589 hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
590 if (!hpet_devs)
591 return;
592
593 hpet_num_timers = num_timers;
594
595 for (i = start_timer; i < num_timers - RESERVE_TIMERS; i++) {
596 struct hpet_dev *hdev = &hpet_devs[num_timers_used];
597 unsigned int cfg = hpet_readl(HPET_Tn_CFG(i));
598
599
600 if (!(cfg & HPET_TN_FSB_CAP))
601 continue;
602
603 hdev->flags = 0;
604 if (cfg & HPET_TN_PERIODIC_CAP)
605 hdev->flags |= HPET_DEV_PERI_CAP;
606 hdev->num = i;
607
608 sprintf(hdev->name, "hpet%d", i);
609 if (hpet_assign_irq(hdev))
610 continue;
611
612 hdev->flags |= HPET_DEV_FSB_CAP;
613 hdev->flags |= HPET_DEV_VALID;
614 num_timers_used++;
615 if (num_timers_used == num_possible_cpus())
616 break;
617 }
618
619 printk(KERN_INFO "HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
620 num_timers, num_timers_used);
621}
622
623#ifdef CONFIG_HPET
624static void hpet_reserve_msi_timers(struct hpet_data *hd)
625{
626 int i;
627
628 if (!hpet_devs)
629 return;
630
631 for (i = 0; i < hpet_num_timers; i++) {
632 struct hpet_dev *hdev = &hpet_devs[i];
633
634 if (!(hdev->flags & HPET_DEV_VALID))
635 continue;
636
637 hd->hd_irq[hdev->num] = hdev->irq;
638 hpet_reserve_timer(hd, hdev->num);
639 }
640}
641#endif
642
643static struct hpet_dev *hpet_get_unused_timer(void)
644{
645 int i;
646
647 if (!hpet_devs)
648 return NULL;
649
650 for (i = 0; i < hpet_num_timers; i++) {
651 struct hpet_dev *hdev = &hpet_devs[i];
652
653 if (!(hdev->flags & HPET_DEV_VALID))
654 continue;
655 if (test_and_set_bit(HPET_DEV_USED_BIT,
656 (unsigned long *)&hdev->flags))
657 continue;
658 return hdev;
659 }
660 return NULL;
661}
662
663struct hpet_work_struct {
664 struct delayed_work work;
665 struct completion complete;
666};
667
668static void hpet_work(struct work_struct *w)
669{
670 struct hpet_dev *hdev;
671 int cpu = smp_processor_id();
672 struct hpet_work_struct *hpet_work;
673
674 hpet_work = container_of(w, struct hpet_work_struct, work.work);
675
676 hdev = hpet_get_unused_timer();
677 if (hdev)
678 init_one_hpet_msi_clockevent(hdev, cpu);
679
680 complete(&hpet_work->complete);
681}
682
683static int hpet_cpuhp_notify(struct notifier_block *n,
684 unsigned long action, void *hcpu)
685{
686 unsigned long cpu = (unsigned long)hcpu;
687 struct hpet_work_struct work;
688 struct hpet_dev *hdev = per_cpu(cpu_hpet_dev, cpu);
689
690 switch (action & 0xf) {
691 case CPU_ONLINE:
692 INIT_DELAYED_WORK_ONSTACK(&work.work, hpet_work);
693 init_completion(&work.complete);
694
695 schedule_delayed_work_on(cpu, &work.work, 0);
696 wait_for_completion(&work.complete);
697 destroy_timer_on_stack(&work.work.timer);
698 break;
699 case CPU_DEAD:
700 if (hdev) {
701 free_irq(hdev->irq, hdev);
702 hdev->flags &= ~HPET_DEV_USED;
703 per_cpu(cpu_hpet_dev, cpu) = NULL;
704 }
705 break;
706 }
707 return NOTIFY_OK;
708}
709#else
710
711static int hpet_setup_msi_irq(unsigned int irq)
712{
713 return 0;
714}
715static void hpet_msi_capability_lookup(unsigned int start_timer)
716{
717 return;
718}
719
720#ifdef CONFIG_HPET
721static void hpet_reserve_msi_timers(struct hpet_data *hd)
722{
723 return;
724}
725#endif
726
727static int hpet_cpuhp_notify(struct notifier_block *n,
728 unsigned long action, void *hcpu)
729{
730 return NOTIFY_OK;
731}
732
733#endif
734
735
736
737
738static cycle_t read_hpet(struct clocksource *cs)
739{
740 return (cycle_t)hpet_readl(HPET_COUNTER);
741}
742
743static struct clocksource clocksource_hpet = {
744 .name = "hpet",
745 .rating = 250,
746 .read = read_hpet,
747 .mask = HPET_MASK,
748 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
749 .resume = hpet_resume_counter,
750#ifdef CONFIG_X86_64
751 .archdata = { .vclock_mode = VCLOCK_HPET },
752#endif
753};
754
755static int hpet_clocksource_register(void)
756{
757 u64 start, now;
758 cycle_t t1;
759
760
761 hpet_restart_counter();
762
763
764 t1 = hpet_readl(HPET_COUNTER);
765 rdtscll(start);
766
767
768
769
770
771
772
773 do {
774 rep_nop();
775 rdtscll(now);
776 } while ((now - start) < 200000UL);
777
778 if (t1 == hpet_readl(HPET_COUNTER)) {
779 printk(KERN_WARNING
780 "HPET counter not counting. HPET disabled\n");
781 return -ENODEV;
782 }
783
784 clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq);
785 return 0;
786}
787
788
789
790
791int __init hpet_enable(void)
792{
793 unsigned long hpet_period;
794 unsigned int id;
795 u64 freq;
796 int i;
797
798 if (!is_hpet_capable())
799 return 0;
800
801 hpet_set_mapping();
802
803
804
805
806 hpet_period = hpet_readl(HPET_PERIOD);
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821 for (i = 0; hpet_readl(HPET_CFG) == 0xFFFFFFFF; i++) {
822 if (i == 1000) {
823 printk(KERN_WARNING
824 "HPET config register value = 0xFFFFFFFF. "
825 "Disabling HPET\n");
826 goto out_nohpet;
827 }
828 }
829
830 if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
831 goto out_nohpet;
832
833
834
835
836
837 freq = FSEC_PER_SEC;
838 do_div(freq, hpet_period);
839 hpet_freq = freq;
840
841
842
843
844
845 id = hpet_readl(HPET_ID);
846 hpet_print_config();
847
848#ifdef CONFIG_HPET_EMULATE_RTC
849
850
851
852
853 if (!(id & HPET_ID_NUMBER))
854 goto out_nohpet;
855#endif
856
857 if (hpet_clocksource_register())
858 goto out_nohpet;
859
860 if (id & HPET_ID_LEGSUP) {
861 hpet_legacy_clockevent_register();
862 return 1;
863 }
864 return 0;
865
866out_nohpet:
867 hpet_clear_mapping();
868 hpet_address = 0;
869 return 0;
870}
871
872
873
874
875
876
877
878static __init int hpet_late_init(void)
879{
880 int cpu;
881
882 if (boot_hpet_disable)
883 return -ENODEV;
884
885 if (!hpet_address) {
886 if (!force_hpet_address)
887 return -ENODEV;
888
889 hpet_address = force_hpet_address;
890 hpet_enable();
891 }
892
893 if (!hpet_virt_address)
894 return -ENODEV;
895
896 if (hpet_readl(HPET_ID) & HPET_ID_LEGSUP)
897 hpet_msi_capability_lookup(2);
898 else
899 hpet_msi_capability_lookup(0);
900
901 hpet_reserve_platform_timers(hpet_readl(HPET_ID));
902 hpet_print_config();
903
904 if (hpet_msi_disable)
905 return 0;
906
907 if (boot_cpu_has(X86_FEATURE_ARAT))
908 return 0;
909
910 for_each_online_cpu(cpu) {
911 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
912 }
913
914
915 hotcpu_notifier(hpet_cpuhp_notify, -20);
916
917 return 0;
918}
919fs_initcall(hpet_late_init);
920
921void hpet_disable(void)
922{
923 if (is_hpet_capable() && hpet_virt_address) {
924 unsigned int cfg = hpet_readl(HPET_CFG);
925
926 if (hpet_legacy_int_enabled) {
927 cfg &= ~HPET_CFG_LEGACY;
928 hpet_legacy_int_enabled = 0;
929 }
930 cfg &= ~HPET_CFG_ENABLE;
931 hpet_writel(cfg, HPET_CFG);
932 }
933}
934
935#ifdef CONFIG_HPET_EMULATE_RTC
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951#include <linux/mc146818rtc.h>
952#include <linux/rtc.h>
953#include <asm/rtc.h>
954
955#define DEFAULT_RTC_INT_FREQ 64
956#define DEFAULT_RTC_SHIFT 6
957#define RTC_NUM_INTS 1
958
959static unsigned long hpet_rtc_flags;
960static int hpet_prev_update_sec;
961static struct rtc_time hpet_alarm_time;
962static unsigned long hpet_pie_count;
963static u32 hpet_t1_cmp;
964static u32 hpet_default_delta;
965static u32 hpet_pie_delta;
966static unsigned long hpet_pie_limit;
967
968static rtc_irq_handler irq_handler;
969
970
971
972
973static inline int hpet_cnt_ahead(u32 c1, u32 c2)
974{
975 return (s32)(c2 - c1) < 0;
976}
977
978
979
980
981int hpet_register_irq_handler(rtc_irq_handler handler)
982{
983 if (!is_hpet_enabled())
984 return -ENODEV;
985 if (irq_handler)
986 return -EBUSY;
987
988 irq_handler = handler;
989
990 return 0;
991}
992EXPORT_SYMBOL_GPL(hpet_register_irq_handler);
993
994
995
996
997
998void hpet_unregister_irq_handler(rtc_irq_handler handler)
999{
1000 if (!is_hpet_enabled())
1001 return;
1002
1003 irq_handler = NULL;
1004 hpet_rtc_flags = 0;
1005}
1006EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler);
1007
1008
1009
1010
1011
1012
1013
1014int hpet_rtc_timer_init(void)
1015{
1016 unsigned int cfg, cnt, delta;
1017 unsigned long flags;
1018
1019 if (!is_hpet_enabled())
1020 return 0;
1021
1022 if (!hpet_default_delta) {
1023 uint64_t clc;
1024
1025 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1026 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
1027 hpet_default_delta = clc;
1028 }
1029
1030 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1031 delta = hpet_default_delta;
1032 else
1033 delta = hpet_pie_delta;
1034
1035 local_irq_save(flags);
1036
1037 cnt = delta + hpet_readl(HPET_COUNTER);
1038 hpet_writel(cnt, HPET_T1_CMP);
1039 hpet_t1_cmp = cnt;
1040
1041 cfg = hpet_readl(HPET_T1_CFG);
1042 cfg &= ~HPET_TN_PERIODIC;
1043 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1044 hpet_writel(cfg, HPET_T1_CFG);
1045
1046 local_irq_restore(flags);
1047
1048 return 1;
1049}
1050EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
1051
1052static void hpet_disable_rtc_channel(void)
1053{
1054 unsigned long cfg;
1055 cfg = hpet_readl(HPET_T1_CFG);
1056 cfg &= ~HPET_TN_ENABLE;
1057 hpet_writel(cfg, HPET_T1_CFG);
1058}
1059
1060
1061
1062
1063
1064
1065int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1066{
1067 if (!is_hpet_enabled())
1068 return 0;
1069
1070 hpet_rtc_flags &= ~bit_mask;
1071 if (unlikely(!hpet_rtc_flags))
1072 hpet_disable_rtc_channel();
1073
1074 return 1;
1075}
1076EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
1077
1078int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1079{
1080 unsigned long oldbits = hpet_rtc_flags;
1081
1082 if (!is_hpet_enabled())
1083 return 0;
1084
1085 hpet_rtc_flags |= bit_mask;
1086
1087 if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE))
1088 hpet_prev_update_sec = -1;
1089
1090 if (!oldbits)
1091 hpet_rtc_timer_init();
1092
1093 return 1;
1094}
1095EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit);
1096
1097int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
1098 unsigned char sec)
1099{
1100 if (!is_hpet_enabled())
1101 return 0;
1102
1103 hpet_alarm_time.tm_hour = hrs;
1104 hpet_alarm_time.tm_min = min;
1105 hpet_alarm_time.tm_sec = sec;
1106
1107 return 1;
1108}
1109EXPORT_SYMBOL_GPL(hpet_set_alarm_time);
1110
1111int hpet_set_periodic_freq(unsigned long freq)
1112{
1113 uint64_t clc;
1114
1115 if (!is_hpet_enabled())
1116 return 0;
1117
1118 if (freq <= DEFAULT_RTC_INT_FREQ)
1119 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
1120 else {
1121 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
1122 do_div(clc, freq);
1123 clc >>= hpet_clockevent.shift;
1124 hpet_pie_delta = clc;
1125 hpet_pie_limit = 0;
1126 }
1127 return 1;
1128}
1129EXPORT_SYMBOL_GPL(hpet_set_periodic_freq);
1130
1131int hpet_rtc_dropped_irq(void)
1132{
1133 return is_hpet_enabled();
1134}
1135EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
1136
1137static void hpet_rtc_timer_reinit(void)
1138{
1139 unsigned int delta;
1140 int lost_ints = -1;
1141
1142 if (unlikely(!hpet_rtc_flags))
1143 hpet_disable_rtc_channel();
1144
1145 if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
1146 delta = hpet_default_delta;
1147 else
1148 delta = hpet_pie_delta;
1149
1150
1151
1152
1153
1154 do {
1155 hpet_t1_cmp += delta;
1156 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
1157 lost_ints++;
1158 } while (!hpet_cnt_ahead(hpet_t1_cmp, hpet_readl(HPET_COUNTER)));
1159
1160 if (lost_ints) {
1161 if (hpet_rtc_flags & RTC_PIE)
1162 hpet_pie_count += lost_ints;
1163 if (printk_ratelimit())
1164 printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n",
1165 lost_ints);
1166 }
1167}
1168
1169irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
1170{
1171 struct rtc_time curr_time;
1172 unsigned long rtc_int_flag = 0;
1173
1174 hpet_rtc_timer_reinit();
1175 memset(&curr_time, 0, sizeof(struct rtc_time));
1176
1177 if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
1178 get_rtc_time(&curr_time);
1179
1180 if (hpet_rtc_flags & RTC_UIE &&
1181 curr_time.tm_sec != hpet_prev_update_sec) {
1182 if (hpet_prev_update_sec >= 0)
1183 rtc_int_flag = RTC_UF;
1184 hpet_prev_update_sec = curr_time.tm_sec;
1185 }
1186
1187 if (hpet_rtc_flags & RTC_PIE &&
1188 ++hpet_pie_count >= hpet_pie_limit) {
1189 rtc_int_flag |= RTC_PF;
1190 hpet_pie_count = 0;
1191 }
1192
1193 if (hpet_rtc_flags & RTC_AIE &&
1194 (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
1195 (curr_time.tm_min == hpet_alarm_time.tm_min) &&
1196 (curr_time.tm_hour == hpet_alarm_time.tm_hour))
1197 rtc_int_flag |= RTC_AF;
1198
1199 if (rtc_int_flag) {
1200 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1201 if (irq_handler)
1202 irq_handler(rtc_int_flag, dev_id);
1203 }
1204 return IRQ_HANDLED;
1205}
1206EXPORT_SYMBOL_GPL(hpet_rtc_interrupt);
1207#endif
1208