1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/completion.h>
24#include <linux/delay.h>
25#include <linux/input.h>
26#include <linux/device.h>
27#include <linux/interrupt.h>
28#include <linux/suspend.h>
29#include <linux/kthread.h>
30#include <linux/freezer.h>
31#include <linux/ucb1400.h>
32
33static int adcsync;
34static int ts_delay = 55;
35static int ts_delay_pressure;
36
37
38static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97)
39{
40 ucb1400_reg_write(ac97, UCB_TS_CR,
41 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
42 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
43 UCB_TS_CR_MODE_INT);
44}
45
46
47
48
49
50static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
51{
52 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
53 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
54 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
55 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
56 udelay(ts_delay_pressure);
57 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
58}
59
60
61
62
63
64
65
66static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
67{
68 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
69 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
70 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
71 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
72 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
73 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
74 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
75 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
76 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
77
78 udelay(ts_delay);
79
80 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
81}
82
83
84
85
86
87
88
89static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
90{
91 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
92 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
93 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
94 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
95 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
96 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
97 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
98 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
99 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
100
101 udelay(ts_delay);
102
103 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
104}
105
106
107
108
109
110static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
111{
112 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
113 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
114 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
115 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
116}
117
118
119
120
121
122static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
123{
124 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
125 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
126 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
127 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
128}
129
130static inline int ucb1400_ts_pen_up(struct snd_ac97 *ac97)
131{
132 unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR);
133
134 return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
135}
136
137static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97)
138{
139 ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
140 ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0);
141 ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX);
142}
143
144static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97)
145{
146 ucb1400_reg_write(ac97, UCB_IE_FAL, 0);
147}
148
149static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
150{
151 input_report_abs(idev, ABS_X, x);
152 input_report_abs(idev, ABS_Y, y);
153 input_report_abs(idev, ABS_PRESSURE, pressure);
154 input_report_key(idev, BTN_TOUCH, 1);
155 input_sync(idev);
156}
157
158static void ucb1400_ts_event_release(struct input_dev *idev)
159{
160 input_report_abs(idev, ABS_PRESSURE, 0);
161 input_report_key(idev, BTN_TOUCH, 0);
162 input_sync(idev);
163}
164
165static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb)
166{
167 unsigned int isr;
168
169 isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
170 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
171 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
172
173 if (isr & UCB_IE_TSPX)
174 ucb1400_ts_irq_disable(ucb->ac97);
175 else
176 dev_dbg(&ucb->ts_idev->dev, "ucb1400: unexpected IE_STATUS = %#x\n", isr);
177 enable_irq(ucb->irq);
178}
179
180static int ucb1400_ts_thread(void *_ucb)
181{
182 struct ucb1400_ts *ucb = _ucb;
183 struct task_struct *tsk = current;
184 int valid = 0;
185 struct sched_param param = { .sched_priority = 1 };
186
187 sched_setscheduler(tsk, SCHED_FIFO, ¶m);
188
189 set_freezable();
190 while (!kthread_should_stop()) {
191 unsigned int x, y, p;
192 long timeout;
193
194 ucb->ts_restart = 0;
195
196 if (ucb->irq_pending) {
197 ucb->irq_pending = 0;
198 ucb1400_handle_pending_irq(ucb);
199 }
200
201 ucb1400_adc_enable(ucb->ac97);
202 x = ucb1400_ts_read_xpos(ucb);
203 y = ucb1400_ts_read_ypos(ucb);
204 p = ucb1400_ts_read_pressure(ucb);
205 ucb1400_adc_disable(ucb->ac97);
206
207
208 ucb1400_ts_mode_int(ucb->ac97);
209
210 msleep(10);
211
212 if (ucb1400_ts_pen_up(ucb->ac97)) {
213 ucb1400_ts_irq_enable(ucb->ac97);
214
215
216
217
218
219 if (valid) {
220 ucb1400_ts_event_release(ucb->ts_idev);
221 valid = 0;
222 }
223
224 timeout = MAX_SCHEDULE_TIMEOUT;
225 } else {
226 valid = 1;
227 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
228 timeout = msecs_to_jiffies(10);
229 }
230
231 wait_event_freezable_timeout(ucb->ts_wait,
232 ucb->irq_pending || ucb->ts_restart ||
233 kthread_should_stop(), timeout);
234 }
235
236
237 if (valid)
238 ucb1400_ts_event_release(ucb->ts_idev);
239
240 ucb->ts_task = NULL;
241 return 0;
242}
243
244
245
246
247
248
249
250
251
252
253
254static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
255{
256 struct ucb1400_ts *ucb = devid;
257
258 if (irqnr == ucb->irq) {
259 disable_irq_nosync(ucb->irq);
260 ucb->irq_pending = 1;
261 wake_up(&ucb->ts_wait);
262 return IRQ_HANDLED;
263 }
264 return IRQ_NONE;
265}
266
267static int ucb1400_ts_open(struct input_dev *idev)
268{
269 struct ucb1400_ts *ucb = input_get_drvdata(idev);
270 int ret = 0;
271
272 BUG_ON(ucb->ts_task);
273
274 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
275 if (IS_ERR(ucb->ts_task)) {
276 ret = PTR_ERR(ucb->ts_task);
277 ucb->ts_task = NULL;
278 }
279
280 return ret;
281}
282
283static void ucb1400_ts_close(struct input_dev *idev)
284{
285 struct ucb1400_ts *ucb = input_get_drvdata(idev);
286
287 if (ucb->ts_task)
288 kthread_stop(ucb->ts_task);
289
290 ucb1400_ts_irq_disable(ucb->ac97);
291 ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
292}
293
294#ifndef NO_IRQ
295#define NO_IRQ 0
296#endif
297
298
299
300
301
302static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb)
303{
304 unsigned long mask, timeout;
305
306 mask = probe_irq_on();
307
308
309 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
310 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
311 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
312 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
313
314
315 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
316 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
317
318
319 timeout = jiffies + HZ/2;
320 while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
321 UCB_ADC_DAT_VALID)) {
322 cpu_relax();
323 if (time_after(jiffies, timeout)) {
324 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
325 probe_irq_off(mask);
326 return -ENODEV;
327 }
328 }
329 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
330
331
332 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
333 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
334 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
335 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
336
337
338 ucb->irq = probe_irq_off(mask);
339 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
340 return -ENODEV;
341
342 return 0;
343}
344
345static int ucb1400_ts_probe(struct platform_device *dev)
346{
347 int error, x_res, y_res;
348 u16 fcsr;
349 struct ucb1400_ts *ucb = dev->dev.platform_data;
350
351 ucb->ts_idev = input_allocate_device();
352 if (!ucb->ts_idev) {
353 error = -ENOMEM;
354 goto err;
355 }
356
357
358 if (ucb->irq < 0) {
359 error = ucb1400_ts_detect_irq(ucb);
360 if (error) {
361 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
362 goto err_free_devs;
363 }
364 }
365
366 init_waitqueue_head(&ucb->ts_wait);
367
368 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
369 "UCB1400", ucb);
370 if (error) {
371 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
372 ucb->irq, error);
373 goto err_free_devs;
374 }
375 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
376
377 input_set_drvdata(ucb->ts_idev, ucb);
378
379 ucb->ts_idev->dev.parent = &dev->dev;
380 ucb->ts_idev->name = "UCB1400 touchscreen interface";
381 ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
382 AC97_VENDOR_ID1);
383 ucb->ts_idev->id.product = ucb->id;
384 ucb->ts_idev->open = ucb1400_ts_open;
385 ucb->ts_idev->close = ucb1400_ts_close;
386 ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
387 ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
388
389
390
391
392
393
394 fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR);
395 ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE);
396
397 ucb1400_adc_enable(ucb->ac97);
398 x_res = ucb1400_ts_read_xres(ucb);
399 y_res = ucb1400_ts_read_yres(ucb);
400 ucb1400_adc_disable(ucb->ac97);
401 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
402
403 input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
404 input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
405 input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
406
407 error = input_register_device(ucb->ts_idev);
408 if (error)
409 goto err_free_irq;
410
411 return 0;
412
413err_free_irq:
414 free_irq(ucb->irq, ucb);
415err_free_devs:
416 input_free_device(ucb->ts_idev);
417err:
418 return error;
419
420}
421
422static int ucb1400_ts_remove(struct platform_device *dev)
423{
424 struct ucb1400_ts *ucb = dev->dev.platform_data;
425
426 free_irq(ucb->irq, ucb);
427 input_unregister_device(ucb->ts_idev);
428 return 0;
429}
430
431#ifdef CONFIG_PM
432static int ucb1400_ts_resume(struct platform_device *dev)
433{
434 struct ucb1400_ts *ucb = dev->dev.platform_data;
435
436 if (ucb->ts_task) {
437
438
439
440
441
442 ucb->ts_restart = 1;
443 wake_up(&ucb->ts_wait);
444 }
445 return 0;
446}
447#else
448#define ucb1400_ts_resume NULL
449#endif
450
451static struct platform_driver ucb1400_ts_driver = {
452 .probe = ucb1400_ts_probe,
453 .remove = ucb1400_ts_remove,
454 .resume = ucb1400_ts_resume,
455 .driver = {
456 .name = "ucb1400_ts",
457 },
458};
459
460static int __init ucb1400_ts_init(void)
461{
462 return platform_driver_register(&ucb1400_ts_driver);
463}
464
465static void __exit ucb1400_ts_exit(void)
466{
467 platform_driver_unregister(&ucb1400_ts_driver);
468}
469
470module_param(adcsync, bool, 0444);
471MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
472
473module_param(ts_delay, int, 0444);
474MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
475 " position read. Default = 55us.");
476
477module_param(ts_delay_pressure, int, 0444);
478MODULE_PARM_DESC(ts_delay_pressure,
479 "delay between panel setup and pressure read."
480 " Default = 0us.");
481
482module_init(ucb1400_ts_init);
483module_exit(ucb1400_ts_exit);
484
485MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
486MODULE_LICENSE("GPL");
487