linux/drivers/mtd/devices/mtd_dataflash.c
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   1/*
   2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
   3 *
   4 * Largely derived from at91_dataflash.c:
   5 *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License
   9 * as published by the Free Software Foundation; either version
  10 * 2 of the License, or (at your option) any later version.
  11*/
  12#include <linux/module.h>
  13#include <linux/init.h>
  14#include <linux/slab.h>
  15#include <linux/delay.h>
  16#include <linux/device.h>
  17#include <linux/mutex.h>
  18#include <linux/err.h>
  19#include <linux/math64.h>
  20#include <linux/of.h>
  21#include <linux/of_device.h>
  22
  23#include <linux/spi/spi.h>
  24#include <linux/spi/flash.h>
  25
  26#include <linux/mtd/mtd.h>
  27#include <linux/mtd/partitions.h>
  28
  29/*
  30 * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
  31 * each chip, which may be used for double buffered I/O; but this driver
  32 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
  33 *
  34 * Sometimes DataFlash is packaged in MMC-format cards, although the
  35 * MMC stack can't (yet?) distinguish between MMC and DataFlash
  36 * protocols during enumeration.
  37 */
  38
  39/* reads can bypass the buffers */
  40#define OP_READ_CONTINUOUS      0xE8
  41#define OP_READ_PAGE            0xD2
  42
  43/* group B requests can run even while status reports "busy" */
  44#define OP_READ_STATUS          0xD7    /* group B */
  45
  46/* move data between host and buffer */
  47#define OP_READ_BUFFER1         0xD4    /* group B */
  48#define OP_READ_BUFFER2         0xD6    /* group B */
  49#define OP_WRITE_BUFFER1        0x84    /* group B */
  50#define OP_WRITE_BUFFER2        0x87    /* group B */
  51
  52/* erasing flash */
  53#define OP_ERASE_PAGE           0x81
  54#define OP_ERASE_BLOCK          0x50
  55
  56/* move data between buffer and flash */
  57#define OP_TRANSFER_BUF1        0x53
  58#define OP_TRANSFER_BUF2        0x55
  59#define OP_MREAD_BUFFER1        0xD4
  60#define OP_MREAD_BUFFER2        0xD6
  61#define OP_MWERASE_BUFFER1      0x83
  62#define OP_MWERASE_BUFFER2      0x86
  63#define OP_MWRITE_BUFFER1       0x88    /* sector must be pre-erased */
  64#define OP_MWRITE_BUFFER2       0x89    /* sector must be pre-erased */
  65
  66/* write to buffer, then write-erase to flash */
  67#define OP_PROGRAM_VIA_BUF1     0x82
  68#define OP_PROGRAM_VIA_BUF2     0x85
  69
  70/* compare buffer to flash */
  71#define OP_COMPARE_BUF1         0x60
  72#define OP_COMPARE_BUF2         0x61
  73
  74/* read flash to buffer, then write-erase to flash */
  75#define OP_REWRITE_VIA_BUF1     0x58
  76#define OP_REWRITE_VIA_BUF2     0x59
  77
  78/* newer chips report JEDEC manufacturer and device IDs; chip
  79 * serial number and OTP bits; and per-sector writeprotect.
  80 */
  81#define OP_READ_ID              0x9F
  82#define OP_READ_SECURITY        0x77
  83#define OP_WRITE_SECURITY_REVC  0x9A
  84#define OP_WRITE_SECURITY       0x9B    /* revision D */
  85
  86
  87struct dataflash {
  88        uint8_t                 command[4];
  89        char                    name[24];
  90
  91        unsigned                partitioned:1;
  92
  93        unsigned short          page_offset;    /* offset in flash address */
  94        unsigned int            page_size;      /* of bytes per page */
  95
  96        struct mutex            lock;
  97        struct spi_device       *spi;
  98
  99        struct mtd_info         mtd;
 100};
 101
 102#ifdef CONFIG_OF
 103static const struct of_device_id dataflash_dt_ids[] = {
 104        { .compatible = "atmel,at45", },
 105        { .compatible = "atmel,dataflash", },
 106        { /* sentinel */ }
 107};
 108#else
 109#define dataflash_dt_ids NULL
 110#endif
 111
 112/* ......................................................................... */
 113
 114/*
 115 * Return the status of the DataFlash device.
 116 */
 117static inline int dataflash_status(struct spi_device *spi)
 118{
 119        /* NOTE:  at45db321c over 25 MHz wants to write
 120         * a dummy byte after the opcode...
 121         */
 122        return spi_w8r8(spi, OP_READ_STATUS);
 123}
 124
 125/*
 126 * Poll the DataFlash device until it is READY.
 127 * This usually takes 5-20 msec or so; more for sector erase.
 128 */
 129static int dataflash_waitready(struct spi_device *spi)
 130{
 131        int     status;
 132
 133        for (;;) {
 134                status = dataflash_status(spi);
 135                if (status < 0) {
 136                        pr_debug("%s: status %d?\n",
 137                                        dev_name(&spi->dev), status);
 138                        status = 0;
 139                }
 140
 141                if (status & (1 << 7))  /* RDY/nBSY */
 142                        return status;
 143
 144                msleep(3);
 145        }
 146}
 147
 148/* ......................................................................... */
 149
 150/*
 151 * Erase pages of flash.
 152 */
 153static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
 154{
 155        struct dataflash        *priv = mtd->priv;
 156        struct spi_device       *spi = priv->spi;
 157        struct spi_transfer     x = { .tx_dma = 0, };
 158        struct spi_message      msg;
 159        unsigned                blocksize = priv->page_size << 3;
 160        uint8_t                 *command;
 161        uint32_t                rem;
 162
 163        pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
 164              dev_name(&spi->dev), (long long)instr->addr,
 165              (long long)instr->len);
 166
 167        /* Sanity checks */
 168        if (instr->addr + instr->len > mtd->size)
 169                return -EINVAL;
 170        div_u64_rem(instr->len, priv->page_size, &rem);
 171        if (rem)
 172                return -EINVAL;
 173        div_u64_rem(instr->addr, priv->page_size, &rem);
 174        if (rem)
 175                return -EINVAL;
 176
 177        spi_message_init(&msg);
 178
 179        x.tx_buf = command = priv->command;
 180        x.len = 4;
 181        spi_message_add_tail(&x, &msg);
 182
 183        mutex_lock(&priv->lock);
 184        while (instr->len > 0) {
 185                unsigned int    pageaddr;
 186                int             status;
 187                int             do_block;
 188
 189                /* Calculate flash page address; use block erase (for speed) if
 190                 * we're at a block boundary and need to erase the whole block.
 191                 */
 192                pageaddr = div_u64(instr->addr, priv->page_size);
 193                do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
 194                pageaddr = pageaddr << priv->page_offset;
 195
 196                command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
 197                command[1] = (uint8_t)(pageaddr >> 16);
 198                command[2] = (uint8_t)(pageaddr >> 8);
 199                command[3] = 0;
 200
 201                pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
 202                        do_block ? "block" : "page",
 203                        command[0], command[1], command[2], command[3],
 204                        pageaddr);
 205
 206                status = spi_sync(spi, &msg);
 207                (void) dataflash_waitready(spi);
 208
 209                if (status < 0) {
 210                        printk(KERN_ERR "%s: erase %x, err %d\n",
 211                                dev_name(&spi->dev), pageaddr, status);
 212                        /* REVISIT:  can retry instr->retries times; or
 213                         * giveup and instr->fail_addr = instr->addr;
 214                         */
 215                        continue;
 216                }
 217
 218                if (do_block) {
 219                        instr->addr += blocksize;
 220                        instr->len -= blocksize;
 221                } else {
 222                        instr->addr += priv->page_size;
 223                        instr->len -= priv->page_size;
 224                }
 225        }
 226        mutex_unlock(&priv->lock);
 227
 228        /* Inform MTD subsystem that erase is complete */
 229        instr->state = MTD_ERASE_DONE;
 230        mtd_erase_callback(instr);
 231
 232        return 0;
 233}
 234
 235/*
 236 * Read from the DataFlash device.
 237 *   from   : Start offset in flash device
 238 *   len    : Amount to read
 239 *   retlen : About of data actually read
 240 *   buf    : Buffer containing the data
 241 */
 242static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
 243                               size_t *retlen, u_char *buf)
 244{
 245        struct dataflash        *priv = mtd->priv;
 246        struct spi_transfer     x[2] = { { .tx_dma = 0, }, };
 247        struct spi_message      msg;
 248        unsigned int            addr;
 249        uint8_t                 *command;
 250        int                     status;
 251
 252        pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
 253                        (unsigned)from, (unsigned)(from + len));
 254
 255        *retlen = 0;
 256
 257        /* Sanity checks */
 258        if (!len)
 259                return 0;
 260        if (from + len > mtd->size)
 261                return -EINVAL;
 262
 263        /* Calculate flash page/byte address */
 264        addr = (((unsigned)from / priv->page_size) << priv->page_offset)
 265                + ((unsigned)from % priv->page_size);
 266
 267        command = priv->command;
 268
 269        pr_debug("READ: (%x) %x %x %x\n",
 270                command[0], command[1], command[2], command[3]);
 271
 272        spi_message_init(&msg);
 273
 274        x[0].tx_buf = command;
 275        x[0].len = 8;
 276        spi_message_add_tail(&x[0], &msg);
 277
 278        x[1].rx_buf = buf;
 279        x[1].len = len;
 280        spi_message_add_tail(&x[1], &msg);
 281
 282        mutex_lock(&priv->lock);
 283
 284        /* Continuous read, max clock = f(car) which may be less than
 285         * the peak rate available.  Some chips support commands with
 286         * fewer "don't care" bytes.  Both buffers stay unchanged.
 287         */
 288        command[0] = OP_READ_CONTINUOUS;
 289        command[1] = (uint8_t)(addr >> 16);
 290        command[2] = (uint8_t)(addr >> 8);
 291        command[3] = (uint8_t)(addr >> 0);
 292        /* plus 4 "don't care" bytes */
 293
 294        status = spi_sync(priv->spi, &msg);
 295        mutex_unlock(&priv->lock);
 296
 297        if (status >= 0) {
 298                *retlen = msg.actual_length - 8;
 299                status = 0;
 300        } else
 301                pr_debug("%s: read %x..%x --> %d\n",
 302                        dev_name(&priv->spi->dev),
 303                        (unsigned)from, (unsigned)(from + len),
 304                        status);
 305        return status;
 306}
 307
 308/*
 309 * Write to the DataFlash device.
 310 *   to     : Start offset in flash device
 311 *   len    : Amount to write
 312 *   retlen : Amount of data actually written
 313 *   buf    : Buffer containing the data
 314 */
 315static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
 316                                size_t * retlen, const u_char * buf)
 317{
 318        struct dataflash        *priv = mtd->priv;
 319        struct spi_device       *spi = priv->spi;
 320        struct spi_transfer     x[2] = { { .tx_dma = 0, }, };
 321        struct spi_message      msg;
 322        unsigned int            pageaddr, addr, offset, writelen;
 323        size_t                  remaining = len;
 324        u_char                  *writebuf = (u_char *) buf;
 325        int                     status = -EINVAL;
 326        uint8_t                 *command;
 327
 328        pr_debug("%s: write 0x%x..0x%x\n",
 329                dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
 330
 331        *retlen = 0;
 332
 333        /* Sanity checks */
 334        if (!len)
 335                return 0;
 336        if ((to + len) > mtd->size)
 337                return -EINVAL;
 338
 339        spi_message_init(&msg);
 340
 341        x[0].tx_buf = command = priv->command;
 342        x[0].len = 4;
 343        spi_message_add_tail(&x[0], &msg);
 344
 345        pageaddr = ((unsigned)to / priv->page_size);
 346        offset = ((unsigned)to % priv->page_size);
 347        if (offset + len > priv->page_size)
 348                writelen = priv->page_size - offset;
 349        else
 350                writelen = len;
 351
 352        mutex_lock(&priv->lock);
 353        while (remaining > 0) {
 354                pr_debug("write @ %i:%i len=%i\n",
 355                        pageaddr, offset, writelen);
 356
 357                /* REVISIT:
 358                 * (a) each page in a sector must be rewritten at least
 359                 *     once every 10K sibling erase/program operations.
 360                 * (b) for pages that are already erased, we could
 361                 *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
 362                 * (c) WRITE to buffer could be done while waiting for
 363                 *     a previous MWRITE/MWERASE to complete ...
 364                 * (d) error handling here seems to be mostly missing.
 365                 *
 366                 * Two persistent bits per page, plus a per-sector counter,
 367                 * could support (a) and (b) ... we might consider using
 368                 * the second half of sector zero, which is just one block,
 369                 * to track that state.  (On AT91, that sector should also
 370                 * support boot-from-DataFlash.)
 371                 */
 372
 373                addr = pageaddr << priv->page_offset;
 374
 375                /* (1) Maybe transfer partial page to Buffer1 */
 376                if (writelen != priv->page_size) {
 377                        command[0] = OP_TRANSFER_BUF1;
 378                        command[1] = (addr & 0x00FF0000) >> 16;
 379                        command[2] = (addr & 0x0000FF00) >> 8;
 380                        command[3] = 0;
 381
 382                        pr_debug("TRANSFER: (%x) %x %x %x\n",
 383                                command[0], command[1], command[2], command[3]);
 384
 385                        status = spi_sync(spi, &msg);
 386                        if (status < 0)
 387                                pr_debug("%s: xfer %u -> %d\n",
 388                                        dev_name(&spi->dev), addr, status);
 389
 390                        (void) dataflash_waitready(priv->spi);
 391                }
 392
 393                /* (2) Program full page via Buffer1 */
 394                addr += offset;
 395                command[0] = OP_PROGRAM_VIA_BUF1;
 396                command[1] = (addr & 0x00FF0000) >> 16;
 397                command[2] = (addr & 0x0000FF00) >> 8;
 398                command[3] = (addr & 0x000000FF);
 399
 400                pr_debug("PROGRAM: (%x) %x %x %x\n",
 401                        command[0], command[1], command[2], command[3]);
 402
 403                x[1].tx_buf = writebuf;
 404                x[1].len = writelen;
 405                spi_message_add_tail(x + 1, &msg);
 406                status = spi_sync(spi, &msg);
 407                spi_transfer_del(x + 1);
 408                if (status < 0)
 409                        pr_debug("%s: pgm %u/%u -> %d\n",
 410                                dev_name(&spi->dev), addr, writelen, status);
 411
 412                (void) dataflash_waitready(priv->spi);
 413
 414
 415#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
 416
 417                /* (3) Compare to Buffer1 */
 418                addr = pageaddr << priv->page_offset;
 419                command[0] = OP_COMPARE_BUF1;
 420                command[1] = (addr & 0x00FF0000) >> 16;
 421                command[2] = (addr & 0x0000FF00) >> 8;
 422                command[3] = 0;
 423
 424                pr_debug("COMPARE: (%x) %x %x %x\n",
 425                        command[0], command[1], command[2], command[3]);
 426
 427                status = spi_sync(spi, &msg);
 428                if (status < 0)
 429                        pr_debug("%s: compare %u -> %d\n",
 430                                dev_name(&spi->dev), addr, status);
 431
 432                status = dataflash_waitready(priv->spi);
 433
 434                /* Check result of the compare operation */
 435                if (status & (1 << 6)) {
 436                        printk(KERN_ERR "%s: compare page %u, err %d\n",
 437                                dev_name(&spi->dev), pageaddr, status);
 438                        remaining = 0;
 439                        status = -EIO;
 440                        break;
 441                } else
 442                        status = 0;
 443
 444#endif  /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
 445
 446                remaining = remaining - writelen;
 447                pageaddr++;
 448                offset = 0;
 449                writebuf += writelen;
 450                *retlen += writelen;
 451
 452                if (remaining > priv->page_size)
 453                        writelen = priv->page_size;
 454                else
 455                        writelen = remaining;
 456        }
 457        mutex_unlock(&priv->lock);
 458
 459        return status;
 460}
 461
 462/* ......................................................................... */
 463
 464#ifdef CONFIG_MTD_DATAFLASH_OTP
 465
 466static int dataflash_get_otp_info(struct mtd_info *mtd,
 467                struct otp_info *info, size_t len)
 468{
 469        /* Report both blocks as identical:  bytes 0..64, locked.
 470         * Unless the user block changed from all-ones, we can't
 471         * tell whether it's still writable; so we assume it isn't.
 472         */
 473        info->start = 0;
 474        info->length = 64;
 475        info->locked = 1;
 476        return sizeof(*info);
 477}
 478
 479static ssize_t otp_read(struct spi_device *spi, unsigned base,
 480                uint8_t *buf, loff_t off, size_t len)
 481{
 482        struct spi_message      m;
 483        size_t                  l;
 484        uint8_t                 *scratch;
 485        struct spi_transfer     t;
 486        int                     status;
 487
 488        if (off > 64)
 489                return -EINVAL;
 490
 491        if ((off + len) > 64)
 492                len = 64 - off;
 493        if (len == 0)
 494                return len;
 495
 496        spi_message_init(&m);
 497
 498        l = 4 + base + off + len;
 499        scratch = kzalloc(l, GFP_KERNEL);
 500        if (!scratch)
 501                return -ENOMEM;
 502
 503        /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
 504         * IN:  ignore 4 bytes, data bytes 0..N (max 127)
 505         */
 506        scratch[0] = OP_READ_SECURITY;
 507
 508        memset(&t, 0, sizeof t);
 509        t.tx_buf = scratch;
 510        t.rx_buf = scratch;
 511        t.len = l;
 512        spi_message_add_tail(&t, &m);
 513
 514        dataflash_waitready(spi);
 515
 516        status = spi_sync(spi, &m);
 517        if (status >= 0) {
 518                memcpy(buf, scratch + 4 + base + off, len);
 519                status = len;
 520        }
 521
 522        kfree(scratch);
 523        return status;
 524}
 525
 526static int dataflash_read_fact_otp(struct mtd_info *mtd,
 527                loff_t from, size_t len, size_t *retlen, u_char *buf)
 528{
 529        struct dataflash        *priv = mtd->priv;
 530        int                     status;
 531
 532        /* 64 bytes, from 0..63 ... start at 64 on-chip */
 533        mutex_lock(&priv->lock);
 534        status = otp_read(priv->spi, 64, buf, from, len);
 535        mutex_unlock(&priv->lock);
 536
 537        if (status < 0)
 538                return status;
 539        *retlen = status;
 540        return 0;
 541}
 542
 543static int dataflash_read_user_otp(struct mtd_info *mtd,
 544                loff_t from, size_t len, size_t *retlen, u_char *buf)
 545{
 546        struct dataflash        *priv = mtd->priv;
 547        int                     status;
 548
 549        /* 64 bytes, from 0..63 ... start at 0 on-chip */
 550        mutex_lock(&priv->lock);
 551        status = otp_read(priv->spi, 0, buf, from, len);
 552        mutex_unlock(&priv->lock);
 553
 554        if (status < 0)
 555                return status;
 556        *retlen = status;
 557        return 0;
 558}
 559
 560static int dataflash_write_user_otp(struct mtd_info *mtd,
 561                loff_t from, size_t len, size_t *retlen, u_char *buf)
 562{
 563        struct spi_message      m;
 564        const size_t            l = 4 + 64;
 565        uint8_t                 *scratch;
 566        struct spi_transfer     t;
 567        struct dataflash        *priv = mtd->priv;
 568        int                     status;
 569
 570        if (len > 64)
 571                return -EINVAL;
 572
 573        /* Strictly speaking, we *could* truncate the write ... but
 574         * let's not do that for the only write that's ever possible.
 575         */
 576        if ((from + len) > 64)
 577                return -EINVAL;
 578
 579        /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
 580         * IN:  ignore all
 581         */
 582        scratch = kzalloc(l, GFP_KERNEL);
 583        if (!scratch)
 584                return -ENOMEM;
 585        scratch[0] = OP_WRITE_SECURITY;
 586        memcpy(scratch + 4 + from, buf, len);
 587
 588        spi_message_init(&m);
 589
 590        memset(&t, 0, sizeof t);
 591        t.tx_buf = scratch;
 592        t.len = l;
 593        spi_message_add_tail(&t, &m);
 594
 595        /* Write the OTP bits, if they've not yet been written.
 596         * This modifies SRAM buffer1.
 597         */
 598        mutex_lock(&priv->lock);
 599        dataflash_waitready(priv->spi);
 600        status = spi_sync(priv->spi, &m);
 601        mutex_unlock(&priv->lock);
 602
 603        kfree(scratch);
 604
 605        if (status >= 0) {
 606                status = 0;
 607                *retlen = len;
 608        }
 609        return status;
 610}
 611
 612static char *otp_setup(struct mtd_info *device, char revision)
 613{
 614        device->get_fact_prot_info = dataflash_get_otp_info;
 615        device->read_fact_prot_reg = dataflash_read_fact_otp;
 616        device->get_user_prot_info = dataflash_get_otp_info;
 617        device->read_user_prot_reg = dataflash_read_user_otp;
 618
 619        /* rev c parts (at45db321c and at45db1281 only!) use a
 620         * different write procedure; not (yet?) implemented.
 621         */
 622        if (revision > 'c')
 623                device->write_user_prot_reg = dataflash_write_user_otp;
 624
 625        return ", OTP";
 626}
 627
 628#else
 629
 630static char *otp_setup(struct mtd_info *device, char revision)
 631{
 632        return " (OTP)";
 633}
 634
 635#endif
 636
 637/* ......................................................................... */
 638
 639/*
 640 * Register DataFlash device with MTD subsystem.
 641 */
 642static int __devinit
 643add_dataflash_otp(struct spi_device *spi, char *name,
 644                int nr_pages, int pagesize, int pageoffset, char revision)
 645{
 646        struct dataflash                *priv;
 647        struct mtd_info                 *device;
 648        struct mtd_part_parser_data     ppdata;
 649        struct flash_platform_data      *pdata = spi->dev.platform_data;
 650        char                            *otp_tag = "";
 651        int                             err = 0;
 652
 653        priv = kzalloc(sizeof *priv, GFP_KERNEL);
 654        if (!priv)
 655                return -ENOMEM;
 656
 657        mutex_init(&priv->lock);
 658        priv->spi = spi;
 659        priv->page_size = pagesize;
 660        priv->page_offset = pageoffset;
 661
 662        /* name must be usable with cmdlinepart */
 663        sprintf(priv->name, "spi%d.%d-%s",
 664                        spi->master->bus_num, spi->chip_select,
 665                        name);
 666
 667        device = &priv->mtd;
 668        device->name = (pdata && pdata->name) ? pdata->name : priv->name;
 669        device->size = nr_pages * pagesize;
 670        device->erasesize = pagesize;
 671        device->writesize = pagesize;
 672        device->owner = THIS_MODULE;
 673        device->type = MTD_DATAFLASH;
 674        device->flags = MTD_WRITEABLE;
 675        device->erase = dataflash_erase;
 676        device->read = dataflash_read;
 677        device->write = dataflash_write;
 678        device->priv = priv;
 679
 680        device->dev.parent = &spi->dev;
 681
 682        if (revision >= 'c')
 683                otp_tag = otp_setup(device, revision);
 684
 685        dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
 686                        name, (long long)((device->size + 1023) >> 10),
 687                        pagesize, otp_tag);
 688        dev_set_drvdata(&spi->dev, priv);
 689
 690        ppdata.of_node = spi->dev.of_node;
 691        err = mtd_device_parse_register(device, NULL, &ppdata,
 692                        pdata ? pdata->parts : NULL,
 693                        pdata ? pdata->nr_parts : 0);
 694
 695        if (!err)
 696                return 0;
 697
 698        dev_set_drvdata(&spi->dev, NULL);
 699        kfree(priv);
 700        return err;
 701}
 702
 703static inline int __devinit
 704add_dataflash(struct spi_device *spi, char *name,
 705                int nr_pages, int pagesize, int pageoffset)
 706{
 707        return add_dataflash_otp(spi, name, nr_pages, pagesize,
 708                        pageoffset, 0);
 709}
 710
 711struct flash_info {
 712        char            *name;
 713
 714        /* JEDEC id has a high byte of zero plus three data bytes:
 715         * the manufacturer id, then a two byte device id.
 716         */
 717        uint32_t        jedec_id;
 718
 719        /* The size listed here is what works with OP_ERASE_PAGE. */
 720        unsigned        nr_pages;
 721        uint16_t        pagesize;
 722        uint16_t        pageoffset;
 723
 724        uint16_t        flags;
 725#define SUP_POW2PS      0x0002          /* supports 2^N byte pages */
 726#define IS_POW2PS       0x0001          /* uses 2^N byte pages */
 727};
 728
 729static struct flash_info __devinitdata dataflash_data [] = {
 730
 731        /*
 732         * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
 733         * one with IS_POW2PS and the other without.  The entry with the
 734         * non-2^N byte page size can't name exact chip revisions without
 735         * losing backwards compatibility for cmdlinepart.
 736         *
 737         * These newer chips also support 128-byte security registers (with
 738         * 64 bytes one-time-programmable) and software write-protection.
 739         */
 740        { "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
 741        { "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
 742
 743        { "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
 744        { "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
 745
 746        { "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
 747        { "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
 748
 749        { "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
 750        { "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
 751
 752        { "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
 753        { "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
 754
 755        { "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},           /* rev C */
 756
 757        { "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
 758        { "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
 759
 760        { "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
 761        { "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
 762};
 763
 764static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
 765{
 766        int                     tmp;
 767        uint8_t                 code = OP_READ_ID;
 768        uint8_t                 id[3];
 769        uint32_t                jedec;
 770        struct flash_info       *info;
 771        int status;
 772
 773        /* JEDEC also defines an optional "extended device information"
 774         * string for after vendor-specific data, after the three bytes
 775         * we use here.  Supporting some chips might require using it.
 776         *
 777         * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
 778         * That's not an error; only rev C and newer chips handle it, and
 779         * only Atmel sells these chips.
 780         */
 781        tmp = spi_write_then_read(spi, &code, 1, id, 3);
 782        if (tmp < 0) {
 783                pr_debug("%s: error %d reading JEDEC ID\n",
 784                        dev_name(&spi->dev), tmp);
 785                return ERR_PTR(tmp);
 786        }
 787        if (id[0] != 0x1f)
 788                return NULL;
 789
 790        jedec = id[0];
 791        jedec = jedec << 8;
 792        jedec |= id[1];
 793        jedec = jedec << 8;
 794        jedec |= id[2];
 795
 796        for (tmp = 0, info = dataflash_data;
 797                        tmp < ARRAY_SIZE(dataflash_data);
 798                        tmp++, info++) {
 799                if (info->jedec_id == jedec) {
 800                        pr_debug("%s: OTP, sector protect%s\n",
 801                                dev_name(&spi->dev),
 802                                (info->flags & SUP_POW2PS)
 803                                        ? ", binary pagesize" : ""
 804                                );
 805                        if (info->flags & SUP_POW2PS) {
 806                                status = dataflash_status(spi);
 807                                if (status < 0) {
 808                                        pr_debug("%s: status error %d\n",
 809                                                dev_name(&spi->dev), status);
 810                                        return ERR_PTR(status);
 811                                }
 812                                if (status & 0x1) {
 813                                        if (info->flags & IS_POW2PS)
 814                                                return info;
 815                                } else {
 816                                        if (!(info->flags & IS_POW2PS))
 817                                                return info;
 818                                }
 819                        } else
 820                                return info;
 821                }
 822        }
 823
 824        /*
 825         * Treat other chips as errors ... we won't know the right page
 826         * size (it might be binary) even when we can tell which density
 827         * class is involved (legacy chip id scheme).
 828         */
 829        dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
 830        return ERR_PTR(-ENODEV);
 831}
 832
 833/*
 834 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
 835 * or else the ID code embedded in the status bits:
 836 *
 837 *   Device      Density         ID code          #Pages PageSize  Offset
 838 *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
 839 *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
 840 *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
 841 *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
 842 *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
 843 *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
 844 *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
 845 *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
 846 */
 847static int __devinit dataflash_probe(struct spi_device *spi)
 848{
 849        int status;
 850        struct flash_info       *info;
 851
 852        /*
 853         * Try to detect dataflash by JEDEC ID.
 854         * If it succeeds we know we have either a C or D part.
 855         * D will support power of 2 pagesize option.
 856         * Both support the security register, though with different
 857         * write procedures.
 858         */
 859        info = jedec_probe(spi);
 860        if (IS_ERR(info))
 861                return PTR_ERR(info);
 862        if (info != NULL)
 863                return add_dataflash_otp(spi, info->name, info->nr_pages,
 864                                info->pagesize, info->pageoffset,
 865                                (info->flags & SUP_POW2PS) ? 'd' : 'c');
 866
 867        /*
 868         * Older chips support only legacy commands, identifing
 869         * capacity using bits in the status byte.
 870         */
 871        status = dataflash_status(spi);
 872        if (status <= 0 || status == 0xff) {
 873                pr_debug("%s: status error %d\n",
 874                                dev_name(&spi->dev), status);
 875                if (status == 0 || status == 0xff)
 876                        status = -ENODEV;
 877                return status;
 878        }
 879
 880        /* if there's a device there, assume it's dataflash.
 881         * board setup should have set spi->max_speed_max to
 882         * match f(car) for continuous reads, mode 0 or 3.
 883         */
 884        switch (status & 0x3c) {
 885        case 0x0c:      /* 0 0 1 1 x x */
 886                status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
 887                break;
 888        case 0x14:      /* 0 1 0 1 x x */
 889                status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
 890                break;
 891        case 0x1c:      /* 0 1 1 1 x x */
 892                status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
 893                break;
 894        case 0x24:      /* 1 0 0 1 x x */
 895                status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
 896                break;
 897        case 0x2c:      /* 1 0 1 1 x x */
 898                status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
 899                break;
 900        case 0x34:      /* 1 1 0 1 x x */
 901                status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
 902                break;
 903        case 0x38:      /* 1 1 1 x x x */
 904        case 0x3c:
 905                status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
 906                break;
 907        /* obsolete AT45DB1282 not (yet?) supported */
 908        default:
 909                pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev),
 910                                status & 0x3c);
 911                status = -ENODEV;
 912        }
 913
 914        if (status < 0)
 915                pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
 916                                status);
 917
 918        return status;
 919}
 920
 921static int __devexit dataflash_remove(struct spi_device *spi)
 922{
 923        struct dataflash        *flash = dev_get_drvdata(&spi->dev);
 924        int                     status;
 925
 926        pr_debug("%s: remove\n", dev_name(&spi->dev));
 927
 928        status = mtd_device_unregister(&flash->mtd);
 929        if (status == 0) {
 930                dev_set_drvdata(&spi->dev, NULL);
 931                kfree(flash);
 932        }
 933        return status;
 934}
 935
 936static struct spi_driver dataflash_driver = {
 937        .driver = {
 938                .name           = "mtd_dataflash",
 939                .bus            = &spi_bus_type,
 940                .owner          = THIS_MODULE,
 941                .of_match_table = dataflash_dt_ids,
 942        },
 943
 944        .probe          = dataflash_probe,
 945        .remove         = __devexit_p(dataflash_remove),
 946
 947        /* FIXME:  investigate suspend and resume... */
 948};
 949
 950static int __init dataflash_init(void)
 951{
 952        return spi_register_driver(&dataflash_driver);
 953}
 954module_init(dataflash_init);
 955
 956static void __exit dataflash_exit(void)
 957{
 958        spi_unregister_driver(&dataflash_driver);
 959}
 960module_exit(dataflash_exit);
 961
 962
 963MODULE_LICENSE("GPL");
 964MODULE_AUTHOR("Andrew Victor, David Brownell");
 965MODULE_DESCRIPTION("MTD DataFlash driver");
 966MODULE_ALIAS("spi:mtd_dataflash");
 967