linux/drivers/net/wireless/rtl818x/rtl8187/dev.c
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   1/*
   2 * Linux device driver for RTL8187
   3 *
   4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6 *
   7 * Based on the r8187 driver, which is:
   8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9 *
  10 * The driver was extended to the RTL8187B in 2008 by:
  11 *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12 *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13 *      Larry Finger <Larry.Finger@lwfinger.net>
  14 *
  15 * Magic delays and register offsets below are taken from the original
  16 * r8187 driver sources.  Thanks to Realtek for their support!
  17 *
  18 * This program is free software; you can redistribute it and/or modify
  19 * it under the terms of the GNU General Public License version 2 as
  20 * published by the Free Software Foundation.
  21 */
  22
  23#include <linux/init.h>
  24#include <linux/usb.h>
  25#include <linux/slab.h>
  26#include <linux/delay.h>
  27#include <linux/etherdevice.h>
  28#include <linux/eeprom_93cx6.h>
  29#include <linux/module.h>
  30#include <net/mac80211.h>
  31
  32#include "rtl8187.h"
  33#include "rtl8225.h"
  34#ifdef CONFIG_RTL8187_LEDS
  35#include "leds.h"
  36#endif
  37#include "rfkill.h"
  38
  39MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  40MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  41MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  42MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  43MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  44MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  45MODULE_LICENSE("GPL");
  46
  47static struct usb_device_id rtl8187_table[] __devinitdata = {
  48        /* Asus */
  49        {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  50        /* Belkin */
  51        {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  52        /* Realtek */
  53        {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  54        {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  55        {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  56        {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  57        /* Surecom */
  58        {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  59        /* Logitech */
  60        {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  61        /* Netgear */
  62        {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  63        {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  64        {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  65        /* HP */
  66        {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  67        /* Sitecom */
  68        {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  69        {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  70        {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  71        /* Sphairon Access Systems GmbH */
  72        {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  73        /* Dick Smith Electronics */
  74        {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  75        /* Abocom */
  76        {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  77        /* Qcom */
  78        {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  79        /* AirLive */
  80        {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  81        /* Linksys */
  82        {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  83        {}
  84};
  85
  86MODULE_DEVICE_TABLE(usb, rtl8187_table);
  87
  88static const struct ieee80211_rate rtl818x_rates[] = {
  89        { .bitrate = 10, .hw_value = 0, },
  90        { .bitrate = 20, .hw_value = 1, },
  91        { .bitrate = 55, .hw_value = 2, },
  92        { .bitrate = 110, .hw_value = 3, },
  93        { .bitrate = 60, .hw_value = 4, },
  94        { .bitrate = 90, .hw_value = 5, },
  95        { .bitrate = 120, .hw_value = 6, },
  96        { .bitrate = 180, .hw_value = 7, },
  97        { .bitrate = 240, .hw_value = 8, },
  98        { .bitrate = 360, .hw_value = 9, },
  99        { .bitrate = 480, .hw_value = 10, },
 100        { .bitrate = 540, .hw_value = 11, },
 101};
 102
 103static const struct ieee80211_channel rtl818x_channels[] = {
 104        { .center_freq = 2412 },
 105        { .center_freq = 2417 },
 106        { .center_freq = 2422 },
 107        { .center_freq = 2427 },
 108        { .center_freq = 2432 },
 109        { .center_freq = 2437 },
 110        { .center_freq = 2442 },
 111        { .center_freq = 2447 },
 112        { .center_freq = 2452 },
 113        { .center_freq = 2457 },
 114        { .center_freq = 2462 },
 115        { .center_freq = 2467 },
 116        { .center_freq = 2472 },
 117        { .center_freq = 2484 },
 118};
 119
 120static void rtl8187_iowrite_async_cb(struct urb *urb)
 121{
 122        kfree(urb->context);
 123}
 124
 125static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 126                                  void *data, u16 len)
 127{
 128        struct usb_ctrlrequest *dr;
 129        struct urb *urb;
 130        struct rtl8187_async_write_data {
 131                u8 data[4];
 132                struct usb_ctrlrequest dr;
 133        } *buf;
 134        int rc;
 135
 136        buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 137        if (!buf)
 138                return;
 139
 140        urb = usb_alloc_urb(0, GFP_ATOMIC);
 141        if (!urb) {
 142                kfree(buf);
 143                return;
 144        }
 145
 146        dr = &buf->dr;
 147
 148        dr->bRequestType = RTL8187_REQT_WRITE;
 149        dr->bRequest = RTL8187_REQ_SET_REG;
 150        dr->wValue = addr;
 151        dr->wIndex = 0;
 152        dr->wLength = cpu_to_le16(len);
 153
 154        memcpy(buf, data, len);
 155
 156        usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 157                             (unsigned char *)dr, buf, len,
 158                             rtl8187_iowrite_async_cb, buf);
 159        usb_anchor_urb(urb, &priv->anchored);
 160        rc = usb_submit_urb(urb, GFP_ATOMIC);
 161        if (rc < 0) {
 162                kfree(buf);
 163                usb_unanchor_urb(urb);
 164        }
 165        usb_free_urb(urb);
 166}
 167
 168static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 169                                           __le32 *addr, u32 val)
 170{
 171        __le32 buf = cpu_to_le32(val);
 172
 173        rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 174                              &buf, sizeof(buf));
 175}
 176
 177void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 178{
 179        struct rtl8187_priv *priv = dev->priv;
 180
 181        data <<= 8;
 182        data |= addr | 0x80;
 183
 184        rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 185        rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 186        rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 187        rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 188}
 189
 190static void rtl8187_tx_cb(struct urb *urb)
 191{
 192        struct sk_buff *skb = (struct sk_buff *)urb->context;
 193        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 194        struct ieee80211_hw *hw = info->rate_driver_data[0];
 195        struct rtl8187_priv *priv = hw->priv;
 196
 197        skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 198                                          sizeof(struct rtl8187_tx_hdr));
 199        ieee80211_tx_info_clear_status(info);
 200
 201        if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 202                if (priv->is_rtl8187b) {
 203                        skb_queue_tail(&priv->b_tx_status.queue, skb);
 204
 205                        /* queue is "full", discard last items */
 206                        while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 207                                struct sk_buff *old_skb;
 208
 209                                dev_dbg(&priv->udev->dev,
 210                                        "transmit status queue full\n");
 211
 212                                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 213                                ieee80211_tx_status_irqsafe(hw, old_skb);
 214                        }
 215                        return;
 216                } else {
 217                        info->flags |= IEEE80211_TX_STAT_ACK;
 218                }
 219        }
 220        if (priv->is_rtl8187b)
 221                ieee80211_tx_status_irqsafe(hw, skb);
 222        else {
 223                /* Retry information for the RTI8187 is only available by
 224                 * reading a register in the device. We are in interrupt mode
 225                 * here, thus queue the skb and finish on a work queue. */
 226                skb_queue_tail(&priv->b_tx_status.queue, skb);
 227                ieee80211_queue_delayed_work(hw, &priv->work, 0);
 228        }
 229}
 230
 231static void rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 232{
 233        struct rtl8187_priv *priv = dev->priv;
 234        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 235        unsigned int ep;
 236        void *buf;
 237        struct urb *urb;
 238        __le16 rts_dur = 0;
 239        u32 flags;
 240        int rc;
 241
 242        urb = usb_alloc_urb(0, GFP_ATOMIC);
 243        if (!urb) {
 244                kfree_skb(skb);
 245                return;
 246        }
 247
 248        flags = skb->len;
 249        flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 250
 251        flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 252        if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 253                flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 254        if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 255                flags |= RTL818X_TX_DESC_FLAG_RTS;
 256                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 257                rts_dur = ieee80211_rts_duration(dev, priv->vif,
 258                                                 skb->len, info);
 259        } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 260                flags |= RTL818X_TX_DESC_FLAG_CTS;
 261                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 262        }
 263
 264        if (!priv->is_rtl8187b) {
 265                struct rtl8187_tx_hdr *hdr =
 266                        (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 267                hdr->flags = cpu_to_le32(flags);
 268                hdr->len = 0;
 269                hdr->rts_duration = rts_dur;
 270                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 271                buf = hdr;
 272
 273                ep = 2;
 274        } else {
 275                /* fc needs to be calculated before skb_push() */
 276                unsigned int epmap[4] = { 6, 7, 5, 4 };
 277                struct ieee80211_hdr *tx_hdr =
 278                        (struct ieee80211_hdr *)(skb->data);
 279                u16 fc = le16_to_cpu(tx_hdr->frame_control);
 280
 281                struct rtl8187b_tx_hdr *hdr =
 282                        (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 283                struct ieee80211_rate *txrate =
 284                        ieee80211_get_tx_rate(dev, info);
 285                memset(hdr, 0, sizeof(*hdr));
 286                hdr->flags = cpu_to_le32(flags);
 287                hdr->rts_duration = rts_dur;
 288                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 289                hdr->tx_duration =
 290                        ieee80211_generic_frame_duration(dev, priv->vif,
 291                                                         skb->len, txrate);
 292                buf = hdr;
 293
 294                if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 295                        ep = 12;
 296                else
 297                        ep = epmap[skb_get_queue_mapping(skb)];
 298        }
 299
 300        info->rate_driver_data[0] = dev;
 301        info->rate_driver_data[1] = urb;
 302
 303        usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 304                          buf, skb->len, rtl8187_tx_cb, skb);
 305        urb->transfer_flags |= URB_ZERO_PACKET;
 306        usb_anchor_urb(urb, &priv->anchored);
 307        rc = usb_submit_urb(urb, GFP_ATOMIC);
 308        if (rc < 0) {
 309                usb_unanchor_urb(urb);
 310                kfree_skb(skb);
 311        }
 312        usb_free_urb(urb);
 313}
 314
 315static void rtl8187_rx_cb(struct urb *urb)
 316{
 317        struct sk_buff *skb = (struct sk_buff *)urb->context;
 318        struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 319        struct ieee80211_hw *dev = info->dev;
 320        struct rtl8187_priv *priv = dev->priv;
 321        struct ieee80211_rx_status rx_status = { 0 };
 322        int rate, signal;
 323        u32 flags;
 324        unsigned long f;
 325
 326        spin_lock_irqsave(&priv->rx_queue.lock, f);
 327        __skb_unlink(skb, &priv->rx_queue);
 328        spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 329        skb_put(skb, urb->actual_length);
 330
 331        if (unlikely(urb->status)) {
 332                dev_kfree_skb_irq(skb);
 333                return;
 334        }
 335
 336        if (!priv->is_rtl8187b) {
 337                struct rtl8187_rx_hdr *hdr =
 338                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 339                flags = le32_to_cpu(hdr->flags);
 340                /* As with the RTL8187B below, the AGC is used to calculate
 341                 * signal strength. In this case, the scaling
 342                 * constants are derived from the output of p54usb.
 343                 */
 344                signal = -4 - ((27 * hdr->agc) >> 6);
 345                rx_status.antenna = (hdr->signal >> 7) & 1;
 346                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 347        } else {
 348                struct rtl8187b_rx_hdr *hdr =
 349                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 350                /* The Realtek datasheet for the RTL8187B shows that the RX
 351                 * header contains the following quantities: signal quality,
 352                 * RSSI, AGC, the received power in dB, and the measured SNR.
 353                 * In testing, none of these quantities show qualitative
 354                 * agreement with AP signal strength, except for the AGC,
 355                 * which is inversely proportional to the strength of the
 356                 * signal. In the following, the signal strength
 357                 * is derived from the AGC. The arbitrary scaling constants
 358                 * are chosen to make the results close to the values obtained
 359                 * for a BCM4312 using b43 as the driver. The noise is ignored
 360                 * for now.
 361                 */
 362                flags = le32_to_cpu(hdr->flags);
 363                signal = 14 - hdr->agc / 2;
 364                rx_status.antenna = (hdr->rssi >> 7) & 1;
 365                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 366        }
 367
 368        rx_status.signal = signal;
 369        priv->signal = signal;
 370        rate = (flags >> 20) & 0xF;
 371        skb_trim(skb, flags & 0x0FFF);
 372        rx_status.rate_idx = rate;
 373        rx_status.freq = dev->conf.channel->center_freq;
 374        rx_status.band = dev->conf.channel->band;
 375        rx_status.flag |= RX_FLAG_MACTIME_MPDU;
 376        if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 377                rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 378        memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 379        ieee80211_rx_irqsafe(dev, skb);
 380
 381        skb = dev_alloc_skb(RTL8187_MAX_RX);
 382        if (unlikely(!skb)) {
 383                /* TODO check rx queue length and refill *somewhere* */
 384                return;
 385        }
 386
 387        info = (struct rtl8187_rx_info *)skb->cb;
 388        info->urb = urb;
 389        info->dev = dev;
 390        urb->transfer_buffer = skb_tail_pointer(skb);
 391        urb->context = skb;
 392        skb_queue_tail(&priv->rx_queue, skb);
 393
 394        usb_anchor_urb(urb, &priv->anchored);
 395        if (usb_submit_urb(urb, GFP_ATOMIC)) {
 396                usb_unanchor_urb(urb);
 397                skb_unlink(skb, &priv->rx_queue);
 398                dev_kfree_skb_irq(skb);
 399        }
 400}
 401
 402static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 403{
 404        struct rtl8187_priv *priv = dev->priv;
 405        struct urb *entry = NULL;
 406        struct sk_buff *skb;
 407        struct rtl8187_rx_info *info;
 408        int ret = 0;
 409
 410        while (skb_queue_len(&priv->rx_queue) < 16) {
 411                skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 412                if (!skb) {
 413                        ret = -ENOMEM;
 414                        goto err;
 415                }
 416                entry = usb_alloc_urb(0, GFP_KERNEL);
 417                if (!entry) {
 418                        ret = -ENOMEM;
 419                        goto err;
 420                }
 421                usb_fill_bulk_urb(entry, priv->udev,
 422                                  usb_rcvbulkpipe(priv->udev,
 423                                  priv->is_rtl8187b ? 3 : 1),
 424                                  skb_tail_pointer(skb),
 425                                  RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 426                info = (struct rtl8187_rx_info *)skb->cb;
 427                info->urb = entry;
 428                info->dev = dev;
 429                skb_queue_tail(&priv->rx_queue, skb);
 430                usb_anchor_urb(entry, &priv->anchored);
 431                ret = usb_submit_urb(entry, GFP_KERNEL);
 432                if (ret) {
 433                        skb_unlink(skb, &priv->rx_queue);
 434                        usb_unanchor_urb(entry);
 435                        goto err;
 436                }
 437                usb_free_urb(entry);
 438        }
 439        return ret;
 440
 441err:
 442        usb_free_urb(entry);
 443        kfree_skb(skb);
 444        usb_kill_anchored_urbs(&priv->anchored);
 445        return ret;
 446}
 447
 448static void rtl8187b_status_cb(struct urb *urb)
 449{
 450        struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 451        struct rtl8187_priv *priv = hw->priv;
 452        u64 val;
 453        unsigned int cmd_type;
 454
 455        if (unlikely(urb->status))
 456                return;
 457
 458        /*
 459         * Read from status buffer:
 460         *
 461         * bits [30:31] = cmd type:
 462         * - 0 indicates tx beacon interrupt
 463         * - 1 indicates tx close descriptor
 464         *
 465         * In the case of tx beacon interrupt:
 466         * [0:9] = Last Beacon CW
 467         * [10:29] = reserved
 468         * [30:31] = 00b
 469         * [32:63] = Last Beacon TSF
 470         *
 471         * If it's tx close descriptor:
 472         * [0:7] = Packet Retry Count
 473         * [8:14] = RTS Retry Count
 474         * [15] = TOK
 475         * [16:27] = Sequence No
 476         * [28] = LS
 477         * [29] = FS
 478         * [30:31] = 01b
 479         * [32:47] = unused (reserved?)
 480         * [48:63] = MAC Used Time
 481         */
 482        val = le64_to_cpu(priv->b_tx_status.buf);
 483
 484        cmd_type = (val >> 30) & 0x3;
 485        if (cmd_type == 1) {
 486                unsigned int pkt_rc, seq_no;
 487                bool tok;
 488                struct sk_buff *skb;
 489                struct ieee80211_hdr *ieee80211hdr;
 490                unsigned long flags;
 491
 492                pkt_rc = val & 0xFF;
 493                tok = val & (1 << 15);
 494                seq_no = (val >> 16) & 0xFFF;
 495
 496                spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 497                skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 498                        ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 499
 500                        /*
 501                         * While testing, it was discovered that the seq_no
 502                         * doesn't actually contains the sequence number.
 503                         * Instead of returning just the 12 bits of sequence
 504                         * number, hardware is returning entire sequence control
 505                         * (fragment number plus sequence number) in a 12 bit
 506                         * only field overflowing after some time. As a
 507                         * workaround, just consider the lower bits, and expect
 508                         * it's unlikely we wrongly ack some sent data
 509                         */
 510                        if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 511                            & 0xFFF) == seq_no)
 512                                break;
 513                }
 514                if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 515                        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 516
 517                        __skb_unlink(skb, &priv->b_tx_status.queue);
 518                        if (tok)
 519                                info->flags |= IEEE80211_TX_STAT_ACK;
 520                        info->status.rates[0].count = pkt_rc + 1;
 521
 522                        ieee80211_tx_status_irqsafe(hw, skb);
 523                }
 524                spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 525        }
 526
 527        usb_anchor_urb(urb, &priv->anchored);
 528        if (usb_submit_urb(urb, GFP_ATOMIC))
 529                usb_unanchor_urb(urb);
 530}
 531
 532static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 533{
 534        struct rtl8187_priv *priv = dev->priv;
 535        struct urb *entry;
 536        int ret = 0;
 537
 538        entry = usb_alloc_urb(0, GFP_KERNEL);
 539        if (!entry)
 540                return -ENOMEM;
 541
 542        usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 543                          &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 544                          rtl8187b_status_cb, dev);
 545
 546        usb_anchor_urb(entry, &priv->anchored);
 547        ret = usb_submit_urb(entry, GFP_KERNEL);
 548        if (ret)
 549                usb_unanchor_urb(entry);
 550        usb_free_urb(entry);
 551
 552        return ret;
 553}
 554
 555static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
 556{
 557        u32 anaparam, anaparam2;
 558        u8 anaparam3, reg;
 559
 560        if (!priv->is_rtl8187b) {
 561                if (rfon) {
 562                        anaparam = RTL8187_RTL8225_ANAPARAM_ON;
 563                        anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
 564                } else {
 565                        anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
 566                        anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
 567                }
 568        } else {
 569                if (rfon) {
 570                        anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
 571                        anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
 572                        anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
 573                } else {
 574                        anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
 575                        anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
 576                        anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
 577                }
 578        }
 579
 580        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 581                         RTL818X_EEPROM_CMD_CONFIG);
 582        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 583        reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 584        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 585        rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 586        rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
 587        if (priv->is_rtl8187b)
 588                rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, anaparam3);
 589        reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 590        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 591        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 592                         RTL818X_EEPROM_CMD_NORMAL);
 593}
 594
 595static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 596{
 597        struct rtl8187_priv *priv = dev->priv;
 598        u8 reg;
 599        int i;
 600
 601        reg = rtl818x_ioread8(priv, &priv->map->CMD);
 602        reg &= (1 << 1);
 603        reg |= RTL818X_CMD_RESET;
 604        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 605
 606        i = 10;
 607        do {
 608                msleep(2);
 609                if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 610                      RTL818X_CMD_RESET))
 611                        break;
 612        } while (--i);
 613
 614        if (!i) {
 615                wiphy_err(dev->wiphy, "Reset timeout!\n");
 616                return -ETIMEDOUT;
 617        }
 618
 619        /* reload registers from eeprom */
 620        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 621
 622        i = 10;
 623        do {
 624                msleep(4);
 625                if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 626                      RTL818X_EEPROM_CMD_CONFIG))
 627                        break;
 628        } while (--i);
 629
 630        if (!i) {
 631                wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
 632                return -ETIMEDOUT;
 633        }
 634
 635        return 0;
 636}
 637
 638static int rtl8187_init_hw(struct ieee80211_hw *dev)
 639{
 640        struct rtl8187_priv *priv = dev->priv;
 641        u8 reg;
 642        int res;
 643
 644        /* reset */
 645        rtl8187_set_anaparam(priv, true);
 646
 647        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 648
 649        msleep(200);
 650        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 651        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 652        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 653        msleep(200);
 654
 655        res = rtl8187_cmd_reset(dev);
 656        if (res)
 657                return res;
 658
 659        rtl8187_set_anaparam(priv, true);
 660
 661        /* setup card */
 662        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 663        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 664
 665        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 666        rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 667        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 668
 669        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 670
 671        rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 672        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 673        reg &= 0x3F;
 674        reg |= 0x80;
 675        rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 676
 677        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 678
 679        rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 680        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 681        rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 682
 683        // TODO: set RESP_RATE and BRSR properly
 684        rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 685        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 686
 687        /* host_usb_init */
 688        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 689        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 690        reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 691        rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 692        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 693        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 694        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 695        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 696        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 697        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 698        msleep(100);
 699
 700        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 701        rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 702        rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 703        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 704                         RTL818X_EEPROM_CMD_CONFIG);
 705        rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 706        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 707                         RTL818X_EEPROM_CMD_NORMAL);
 708        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 709        msleep(100);
 710
 711        priv->rf->init(dev);
 712
 713        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 714        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 715        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 716        rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 717        rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 718        rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 719        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 720
 721        return 0;
 722}
 723
 724static const u8 rtl8187b_reg_table[][3] = {
 725        {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 726        {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 727        {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 728        {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 729
 730        {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 731        {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 732        {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
 733        {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
 734        {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 735
 736        {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 737        {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 738        {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 739        {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 740        {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 741        {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 742        {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
 743
 744        {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
 745        {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
 746        {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
 747        {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
 748        {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 749
 750        {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 751        {0x8F, 0x00, 0}
 752};
 753
 754static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 755{
 756        struct rtl8187_priv *priv = dev->priv;
 757        int res, i;
 758        u8 reg;
 759
 760        rtl8187_set_anaparam(priv, true);
 761
 762        /* Reset PLL sequence on 8187B. Realtek note: reduces power
 763         * consumption about 30 mA */
 764        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 765        reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 766        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 767        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 768
 769        res = rtl8187_cmd_reset(dev);
 770        if (res)
 771                return res;
 772
 773        rtl8187_set_anaparam(priv, true);
 774
 775        /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
 776         * RESP_RATE on 8187L in Realtek sources: each bit should be each
 777         * one of the 12 rates, all are enabled */
 778        rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
 779
 780        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 781        reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 782        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 783
 784        /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
 785        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 786        rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
 787
 788        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 789
 790        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 791                         RTL818X_EEPROM_CMD_CONFIG);
 792        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 793        rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 794        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 795                         RTL818X_EEPROM_CMD_NORMAL);
 796
 797        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 798        for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 799                rtl818x_iowrite8_idx(priv,
 800                                     (u8 *)(uintptr_t)
 801                                     (rtl8187b_reg_table[i][0] | 0xFF00),
 802                                     rtl8187b_reg_table[i][1],
 803                                     rtl8187b_reg_table[i][2]);
 804        }
 805
 806        rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 807        rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 808
 809        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 810        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 811        rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 812
 813        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 814
 815        /* RFSW_CTRL register */
 816        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 817
 818        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 819        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 820        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 821        msleep(100);
 822
 823        priv->rf->init(dev);
 824
 825        reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 826        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 827        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 828
 829        rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 830        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 831        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 832        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 833        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 834        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 835        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 836
 837        reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 838        rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 839        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 840        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 841        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 842        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 843        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 844        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 845        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 846        rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 847        rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 848        rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 849        rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 850
 851        rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 852
 853        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 854
 855        priv->slot_time = 0x9;
 856        priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 857        priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 858        priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 859        priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 860        rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 861
 862        /* ENEDCA flag must always be set, transmit issues? */
 863        rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 864
 865        return 0;
 866}
 867
 868static void rtl8187_work(struct work_struct *work)
 869{
 870        /* The RTL8187 returns the retry count through register 0xFFFA. In
 871         * addition, it appears to be a cumulative retry count, not the
 872         * value for the current TX packet. When multiple TX entries are
 873         * waiting in the queue, the retry count will be the total for all.
 874         * The "error" may matter for purposes of rate setting, but there is
 875         * no other choice with this hardware.
 876         */
 877        struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 878                                    work.work);
 879        struct ieee80211_tx_info *info;
 880        struct ieee80211_hw *dev = priv->dev;
 881        static u16 retry;
 882        u16 tmp;
 883        u16 avg_retry;
 884        int length;
 885
 886        mutex_lock(&priv->conf_mutex);
 887        tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 888        length = skb_queue_len(&priv->b_tx_status.queue);
 889        if (unlikely(!length))
 890                length = 1;
 891        if (unlikely(tmp < retry))
 892                tmp = retry;
 893        avg_retry = (tmp - retry) / length;
 894        while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 895                struct sk_buff *old_skb;
 896
 897                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 898                info = IEEE80211_SKB_CB(old_skb);
 899                info->status.rates[0].count = avg_retry + 1;
 900                if (info->status.rates[0].count > RETRY_COUNT)
 901                        info->flags &= ~IEEE80211_TX_STAT_ACK;
 902                ieee80211_tx_status_irqsafe(dev, old_skb);
 903        }
 904        retry = tmp;
 905        mutex_unlock(&priv->conf_mutex);
 906}
 907
 908static int rtl8187_start(struct ieee80211_hw *dev)
 909{
 910        struct rtl8187_priv *priv = dev->priv;
 911        u32 reg;
 912        int ret;
 913
 914        mutex_lock(&priv->conf_mutex);
 915
 916        ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 917                                     rtl8187b_init_hw(dev);
 918        if (ret)
 919                goto rtl8187_start_exit;
 920
 921        init_usb_anchor(&priv->anchored);
 922        priv->dev = dev;
 923
 924        if (priv->is_rtl8187b) {
 925                reg = RTL818X_RX_CONF_MGMT |
 926                      RTL818X_RX_CONF_DATA |
 927                      RTL818X_RX_CONF_BROADCAST |
 928                      RTL818X_RX_CONF_NICMAC |
 929                      RTL818X_RX_CONF_BSSID |
 930                      (7 << 13 /* RX FIFO threshold NONE */) |
 931                      (7 << 10 /* MAX RX DMA */) |
 932                      RTL818X_RX_CONF_RX_AUTORESETPHY |
 933                      RTL818X_RX_CONF_ONLYERLPKT |
 934                      RTL818X_RX_CONF_MULTICAST;
 935                priv->rx_conf = reg;
 936                rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 937
 938                reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 939                reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 940                reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 941                reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 942                rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 943
 944                rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 945                                  RTL818X_TX_CONF_HW_SEQNUM |
 946                                  RTL818X_TX_CONF_DISREQQSIZE |
 947                                  (RETRY_COUNT << 8  /* short retry limit */) |
 948                                  (RETRY_COUNT << 0  /* long retry limit */) |
 949                                  (7 << 21 /* MAX TX DMA */));
 950                rtl8187_init_urbs(dev);
 951                rtl8187b_init_status_urb(dev);
 952                goto rtl8187_start_exit;
 953        }
 954
 955        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 956
 957        rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 958        rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 959
 960        rtl8187_init_urbs(dev);
 961
 962        reg = RTL818X_RX_CONF_ONLYERLPKT |
 963              RTL818X_RX_CONF_RX_AUTORESETPHY |
 964              RTL818X_RX_CONF_BSSID |
 965              RTL818X_RX_CONF_MGMT |
 966              RTL818X_RX_CONF_DATA |
 967              (7 << 13 /* RX FIFO threshold NONE */) |
 968              (7 << 10 /* MAX RX DMA */) |
 969              RTL818X_RX_CONF_BROADCAST |
 970              RTL818X_RX_CONF_NICMAC;
 971
 972        priv->rx_conf = reg;
 973        rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 974
 975        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 976        reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 977        reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 978        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 979
 980        reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 981        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 982        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 983        reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 984        rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 985
 986        reg  = RTL818X_TX_CONF_CW_MIN |
 987               (7 << 21 /* MAX TX DMA */) |
 988               RTL818X_TX_CONF_NO_ICV;
 989        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 990
 991        reg = rtl818x_ioread8(priv, &priv->map->CMD);
 992        reg |= RTL818X_CMD_TX_ENABLE;
 993        reg |= RTL818X_CMD_RX_ENABLE;
 994        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 995        INIT_DELAYED_WORK(&priv->work, rtl8187_work);
 996
 997rtl8187_start_exit:
 998        mutex_unlock(&priv->conf_mutex);
 999        return ret;
1000}
1001
1002static void rtl8187_stop(struct ieee80211_hw *dev)
1003{
1004        struct rtl8187_priv *priv = dev->priv;
1005        struct sk_buff *skb;
1006        u32 reg;
1007
1008        mutex_lock(&priv->conf_mutex);
1009        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1010
1011        reg = rtl818x_ioread8(priv, &priv->map->CMD);
1012        reg &= ~RTL818X_CMD_TX_ENABLE;
1013        reg &= ~RTL818X_CMD_RX_ENABLE;
1014        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1015
1016        priv->rf->stop(dev);
1017        rtl8187_set_anaparam(priv, false);
1018
1019        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1020        reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1021        rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1022        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1023
1024        while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1025                dev_kfree_skb_any(skb);
1026
1027        usb_kill_anchored_urbs(&priv->anchored);
1028        mutex_unlock(&priv->conf_mutex);
1029
1030        if (!priv->is_rtl8187b)
1031                cancel_delayed_work_sync(&priv->work);
1032}
1033
1034static int rtl8187_add_interface(struct ieee80211_hw *dev,
1035                                 struct ieee80211_vif *vif)
1036{
1037        struct rtl8187_priv *priv = dev->priv;
1038        int i;
1039        int ret = -EOPNOTSUPP;
1040
1041        mutex_lock(&priv->conf_mutex);
1042        if (priv->vif)
1043                goto exit;
1044
1045        switch (vif->type) {
1046        case NL80211_IFTYPE_STATION:
1047                break;
1048        default:
1049                goto exit;
1050        }
1051
1052        ret = 0;
1053        priv->vif = vif;
1054
1055        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1056        for (i = 0; i < ETH_ALEN; i++)
1057                rtl818x_iowrite8(priv, &priv->map->MAC[i],
1058                                 ((u8 *)vif->addr)[i]);
1059        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1060
1061exit:
1062        mutex_unlock(&priv->conf_mutex);
1063        return ret;
1064}
1065
1066static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1067                                     struct ieee80211_vif *vif)
1068{
1069        struct rtl8187_priv *priv = dev->priv;
1070        mutex_lock(&priv->conf_mutex);
1071        priv->vif = NULL;
1072        mutex_unlock(&priv->conf_mutex);
1073}
1074
1075static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1076{
1077        struct rtl8187_priv *priv = dev->priv;
1078        struct ieee80211_conf *conf = &dev->conf;
1079        u32 reg;
1080
1081        mutex_lock(&priv->conf_mutex);
1082        reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1083        /* Enable TX loopback on MAC level to avoid TX during channel
1084         * changes, as this has be seen to causes problems and the
1085         * card will stop work until next reset
1086         */
1087        rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1088                          reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1089        priv->rf->set_chan(dev, conf);
1090        msleep(10);
1091        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1092
1093        rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1094        rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1095        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1096        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1097        mutex_unlock(&priv->conf_mutex);
1098        return 0;
1099}
1100
1101/*
1102 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1103 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1104 */
1105static __le32 *rtl8187b_ac_addr[4] = {
1106        (__le32 *) 0xFFF0, /* AC_VO */
1107        (__le32 *) 0xFFF4, /* AC_VI */
1108        (__le32 *) 0xFFFC, /* AC_BK */
1109        (__le32 *) 0xFFF8, /* AC_BE */
1110};
1111
1112#define SIFS_TIME 0xa
1113
1114static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1115                             bool use_short_preamble)
1116{
1117        if (priv->is_rtl8187b) {
1118                u8 difs, eifs;
1119                u16 ack_timeout;
1120                int queue;
1121
1122                if (use_short_slot) {
1123                        priv->slot_time = 0x9;
1124                        difs = 0x1c;
1125                        eifs = 0x53;
1126                } else {
1127                        priv->slot_time = 0x14;
1128                        difs = 0x32;
1129                        eifs = 0x5b;
1130                }
1131                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1132                rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1133                rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1134
1135                /*
1136                 * BRSR+1 on 8187B is in fact EIFS register
1137                 * Value in units of 4 us
1138                 */
1139                rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1140
1141                /*
1142                 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1143                 * register. In units of 4 us like eifs register
1144                 * ack_timeout = ack duration + plcp + difs + preamble
1145                 */
1146                ack_timeout = 112 + 48 + difs;
1147                if (use_short_preamble)
1148                        ack_timeout += 72;
1149                else
1150                        ack_timeout += 144;
1151                rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1152                                 DIV_ROUND_UP(ack_timeout, 4));
1153
1154                for (queue = 0; queue < 4; queue++)
1155                        rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1156                                         priv->aifsn[queue] * priv->slot_time +
1157                                         SIFS_TIME);
1158        } else {
1159                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1160                if (use_short_slot) {
1161                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1162                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1163                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1164                } else {
1165                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1166                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1167                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1168                }
1169        }
1170}
1171
1172static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1173                                     struct ieee80211_vif *vif,
1174                                     struct ieee80211_bss_conf *info,
1175                                     u32 changed)
1176{
1177        struct rtl8187_priv *priv = dev->priv;
1178        int i;
1179        u8 reg;
1180
1181        if (changed & BSS_CHANGED_BSSID) {
1182                mutex_lock(&priv->conf_mutex);
1183                for (i = 0; i < ETH_ALEN; i++)
1184                        rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1185                                         info->bssid[i]);
1186
1187                if (priv->is_rtl8187b)
1188                        reg = RTL818X_MSR_ENEDCA;
1189                else
1190                        reg = 0;
1191
1192                if (is_valid_ether_addr(info->bssid))
1193                        reg |= RTL818X_MSR_INFRA;
1194                else
1195                        reg |= RTL818X_MSR_NO_LINK;
1196
1197                rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1198
1199                mutex_unlock(&priv->conf_mutex);
1200        }
1201
1202        if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1203                rtl8187_conf_erp(priv, info->use_short_slot,
1204                                 info->use_short_preamble);
1205}
1206
1207static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1208                                     struct netdev_hw_addr_list *mc_list)
1209{
1210        return netdev_hw_addr_list_count(mc_list);
1211}
1212
1213static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1214                                     unsigned int changed_flags,
1215                                     unsigned int *total_flags,
1216                                     u64 multicast)
1217{
1218        struct rtl8187_priv *priv = dev->priv;
1219
1220        if (changed_flags & FIF_FCSFAIL)
1221                priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1222        if (changed_flags & FIF_CONTROL)
1223                priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1224        if (changed_flags & FIF_OTHER_BSS)
1225                priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1226        if (*total_flags & FIF_ALLMULTI || multicast > 0)
1227                priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1228        else
1229                priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1230
1231        *total_flags = 0;
1232
1233        if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1234                *total_flags |= FIF_FCSFAIL;
1235        if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1236                *total_flags |= FIF_CONTROL;
1237        if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1238                *total_flags |= FIF_OTHER_BSS;
1239        if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1240                *total_flags |= FIF_ALLMULTI;
1241
1242        rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1243}
1244
1245static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1246                           struct ieee80211_vif *vif, u16 queue,
1247                           const struct ieee80211_tx_queue_params *params)
1248{
1249        struct rtl8187_priv *priv = dev->priv;
1250        u8 cw_min, cw_max;
1251
1252        if (queue > 3)
1253                return -EINVAL;
1254
1255        cw_min = fls(params->cw_min);
1256        cw_max = fls(params->cw_max);
1257
1258        if (priv->is_rtl8187b) {
1259                priv->aifsn[queue] = params->aifs;
1260
1261                /*
1262                 * This is the structure of AC_*_PARAM registers in 8187B:
1263                 * - TXOP limit field, bit offset = 16
1264                 * - ECWmax, bit offset = 12
1265                 * - ECWmin, bit offset = 8
1266                 * - AIFS, bit offset = 0
1267                 */
1268                rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1269                                  (params->txop << 16) | (cw_max << 12) |
1270                                  (cw_min << 8) | (params->aifs *
1271                                  priv->slot_time + SIFS_TIME));
1272        } else {
1273                if (queue != 0)
1274                        return -EINVAL;
1275
1276                rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1277                                 cw_min | (cw_max << 4));
1278        }
1279        return 0;
1280}
1281
1282static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1283{
1284        struct rtl8187_priv *priv = dev->priv;
1285
1286        return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1287               (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1288}
1289
1290static const struct ieee80211_ops rtl8187_ops = {
1291        .tx                     = rtl8187_tx,
1292        .start                  = rtl8187_start,
1293        .stop                   = rtl8187_stop,
1294        .add_interface          = rtl8187_add_interface,
1295        .remove_interface       = rtl8187_remove_interface,
1296        .config                 = rtl8187_config,
1297        .bss_info_changed       = rtl8187_bss_info_changed,
1298        .prepare_multicast      = rtl8187_prepare_multicast,
1299        .configure_filter       = rtl8187_configure_filter,
1300        .conf_tx                = rtl8187_conf_tx,
1301        .rfkill_poll            = rtl8187_rfkill_poll,
1302        .get_tsf                = rtl8187_get_tsf,
1303};
1304
1305static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1306{
1307        struct ieee80211_hw *dev = eeprom->data;
1308        struct rtl8187_priv *priv = dev->priv;
1309        u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1310
1311        eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1312        eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1313        eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1314        eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1315}
1316
1317static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1318{
1319        struct ieee80211_hw *dev = eeprom->data;
1320        struct rtl8187_priv *priv = dev->priv;
1321        u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1322
1323        if (eeprom->reg_data_in)
1324                reg |= RTL818X_EEPROM_CMD_WRITE;
1325        if (eeprom->reg_data_out)
1326                reg |= RTL818X_EEPROM_CMD_READ;
1327        if (eeprom->reg_data_clock)
1328                reg |= RTL818X_EEPROM_CMD_CK;
1329        if (eeprom->reg_chip_select)
1330                reg |= RTL818X_EEPROM_CMD_CS;
1331
1332        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1333        udelay(10);
1334}
1335
1336static int __devinit rtl8187_probe(struct usb_interface *intf,
1337                                   const struct usb_device_id *id)
1338{
1339        struct usb_device *udev = interface_to_usbdev(intf);
1340        struct ieee80211_hw *dev;
1341        struct rtl8187_priv *priv;
1342        struct eeprom_93cx6 eeprom;
1343        struct ieee80211_channel *channel;
1344        const char *chip_name;
1345        u16 txpwr, reg;
1346        u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1347        int err, i;
1348        u8 mac_addr[ETH_ALEN];
1349
1350        dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1351        if (!dev) {
1352                printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1353                return -ENOMEM;
1354        }
1355
1356        priv = dev->priv;
1357        priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1358
1359        /* allocate "DMA aware" buffer for register accesses */
1360        priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1361        if (!priv->io_dmabuf) {
1362                err = -ENOMEM;
1363                goto err_free_dev;
1364        }
1365        mutex_init(&priv->io_mutex);
1366
1367        SET_IEEE80211_DEV(dev, &intf->dev);
1368        usb_set_intfdata(intf, dev);
1369        priv->udev = udev;
1370
1371        usb_get_dev(udev);
1372
1373        skb_queue_head_init(&priv->rx_queue);
1374
1375        BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1376        BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1377
1378        memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1379        memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1380        priv->map = (struct rtl818x_csr *)0xFF00;
1381
1382        priv->band.band = IEEE80211_BAND_2GHZ;
1383        priv->band.channels = priv->channels;
1384        priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1385        priv->band.bitrates = priv->rates;
1386        priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1387        dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1388
1389
1390        dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1391                     IEEE80211_HW_SIGNAL_DBM |
1392                     IEEE80211_HW_RX_INCLUDES_FCS;
1393        /* Initialize rate-control variables */
1394        dev->max_rates = 1;
1395        dev->max_rate_tries = RETRY_COUNT;
1396
1397        eeprom.data = dev;
1398        eeprom.register_read = rtl8187_eeprom_register_read;
1399        eeprom.register_write = rtl8187_eeprom_register_write;
1400        if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1401                eeprom.width = PCI_EEPROM_WIDTH_93C66;
1402        else
1403                eeprom.width = PCI_EEPROM_WIDTH_93C46;
1404
1405        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1406        udelay(10);
1407
1408        eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1409                               (__le16 __force *)mac_addr, 3);
1410        if (!is_valid_ether_addr(mac_addr)) {
1411                printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1412                       "generated MAC address\n");
1413                random_ether_addr(mac_addr);
1414        }
1415        SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1416
1417        channel = priv->channels;
1418        for (i = 0; i < 3; i++) {
1419                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1420                                  &txpwr);
1421                (*channel++).hw_value = txpwr & 0xFF;
1422                (*channel++).hw_value = txpwr >> 8;
1423        }
1424        for (i = 0; i < 2; i++) {
1425                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1426                                  &txpwr);
1427                (*channel++).hw_value = txpwr & 0xFF;
1428                (*channel++).hw_value = txpwr >> 8;
1429        }
1430
1431        eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1432                          &priv->txpwr_base);
1433
1434        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1435        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1436        /* 0 means asic B-cut, we should use SW 3 wire
1437         * bit-by-bit banging for radio. 1 means we can use
1438         * USB specific request to write radio registers */
1439        priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1440        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1441        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1442
1443        if (!priv->is_rtl8187b) {
1444                u32 reg32;
1445                reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1446                reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1447                switch (reg32) {
1448                case RTL818X_TX_CONF_R8187vD_B:
1449                        /* Some RTL8187B devices have a USB ID of 0x8187
1450                         * detect them here */
1451                        chip_name = "RTL8187BvB(early)";
1452                        priv->is_rtl8187b = 1;
1453                        priv->hw_rev = RTL8187BvB;
1454                        break;
1455                case RTL818X_TX_CONF_R8187vD:
1456                        chip_name = "RTL8187vD";
1457                        break;
1458                default:
1459                        chip_name = "RTL8187vB (default)";
1460                }
1461       } else {
1462                /*
1463                 * Force USB request to write radio registers for 8187B, Realtek
1464                 * only uses it in their sources
1465                 */
1466                /*if (priv->asic_rev == 0) {
1467                        printk(KERN_WARNING "rtl8187: Forcing use of USB "
1468                               "requests to write to radio registers\n");
1469                        priv->asic_rev = 1;
1470                }*/
1471                switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1472                case RTL818X_R8187B_B:
1473                        chip_name = "RTL8187BvB";
1474                        priv->hw_rev = RTL8187BvB;
1475                        break;
1476                case RTL818X_R8187B_D:
1477                        chip_name = "RTL8187BvD";
1478                        priv->hw_rev = RTL8187BvD;
1479                        break;
1480                case RTL818X_R8187B_E:
1481                        chip_name = "RTL8187BvE";
1482                        priv->hw_rev = RTL8187BvE;
1483                        break;
1484                default:
1485                        chip_name = "RTL8187BvB (default)";
1486                        priv->hw_rev = RTL8187BvB;
1487                }
1488        }
1489
1490        if (!priv->is_rtl8187b) {
1491                for (i = 0; i < 2; i++) {
1492                        eeprom_93cx6_read(&eeprom,
1493                                          RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1494                                          &txpwr);
1495                        (*channel++).hw_value = txpwr & 0xFF;
1496                        (*channel++).hw_value = txpwr >> 8;
1497                }
1498        } else {
1499                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1500                                  &txpwr);
1501                (*channel++).hw_value = txpwr & 0xFF;
1502
1503                eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1504                (*channel++).hw_value = txpwr & 0xFF;
1505
1506                eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1507                (*channel++).hw_value = txpwr & 0xFF;
1508                (*channel++).hw_value = txpwr >> 8;
1509        }
1510        /* Handle the differing rfkill GPIO bit in different models */
1511        priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1512        if (product_id == 0x8197 || product_id == 0x8198) {
1513                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1514                if (reg & 0xFF00)
1515                        priv->rfkill_mask = RFKILL_MASK_8198;
1516        }
1517
1518        /*
1519         * XXX: Once this driver supports anything that requires
1520         *      beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1521         */
1522        dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1523
1524        if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1525                printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1526                       " info!\n");
1527
1528        priv->rf = rtl8187_detect_rf(dev);
1529        dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1530                                  sizeof(struct rtl8187_tx_hdr) :
1531                                  sizeof(struct rtl8187b_tx_hdr);
1532        if (!priv->is_rtl8187b)
1533                dev->queues = 1;
1534        else
1535                dev->queues = 4;
1536
1537        err = ieee80211_register_hw(dev);
1538        if (err) {
1539                printk(KERN_ERR "rtl8187: Cannot register device\n");
1540                goto err_free_dmabuf;
1541        }
1542        mutex_init(&priv->conf_mutex);
1543        skb_queue_head_init(&priv->b_tx_status.queue);
1544
1545        wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1546                   mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1547                   priv->rfkill_mask);
1548
1549#ifdef CONFIG_RTL8187_LEDS
1550        eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1551        reg &= 0xFF;
1552        rtl8187_leds_init(dev, reg);
1553#endif
1554        rtl8187_rfkill_init(dev);
1555
1556        return 0;
1557
1558 err_free_dmabuf:
1559        kfree(priv->io_dmabuf);
1560 err_free_dev:
1561        ieee80211_free_hw(dev);
1562        usb_set_intfdata(intf, NULL);
1563        usb_put_dev(udev);
1564        return err;
1565}
1566
1567static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1568{
1569        struct ieee80211_hw *dev = usb_get_intfdata(intf);
1570        struct rtl8187_priv *priv;
1571
1572        if (!dev)
1573                return;
1574
1575#ifdef CONFIG_RTL8187_LEDS
1576        rtl8187_leds_exit(dev);
1577#endif
1578        rtl8187_rfkill_exit(dev);
1579        ieee80211_unregister_hw(dev);
1580
1581        priv = dev->priv;
1582        usb_reset_device(priv->udev);
1583        usb_put_dev(interface_to_usbdev(intf));
1584        kfree(priv->io_dmabuf);
1585        ieee80211_free_hw(dev);
1586}
1587
1588static struct usb_driver rtl8187_driver = {
1589        .name           = KBUILD_MODNAME,
1590        .id_table       = rtl8187_table,
1591        .probe          = rtl8187_probe,
1592        .disconnect     = __devexit_p(rtl8187_disconnect),
1593};
1594
1595static int __init rtl8187_init(void)
1596{
1597        return usb_register(&rtl8187_driver);
1598}
1599
1600static void __exit rtl8187_exit(void)
1601{
1602        usb_deregister(&rtl8187_driver);
1603}
1604
1605module_init(rtl8187_init);
1606module_exit(rtl8187_exit);
1607