1#ifndef dprintk
2# define dprintk(x)
3#endif
4
5#define _nblank(x) #x
6#define nblank(x) _nblank(x)[0]
7
8#include <linux/interrupt.h>
9
10
11
12
13
14#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 28000
16# define AAC_DRIVER_BRANCH "-ms"
17#endif
18#define MAXIMUM_NUM_CONTAINERS 32
19
20#define AAC_NUM_MGT_FIB 8
21#define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB)
22#define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
23
24#define AAC_MAX_LUN (8)
25
26#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
27#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
28
29#define AAC_DEBUG_INSTRUMENT_AIF_DELETE
30
31
32
33
34#define CONTAINER_CHANNEL (0)
35#define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
36#define CONTAINER_TO_ID(cont) (cont)
37#define CONTAINER_TO_LUN(cont) (0)
38
39#define aac_phys_to_logical(x) ((x)+1)
40#define aac_logical_to_phys(x) ((x)?(x)-1:0)
41
42
43
44struct diskparm
45{
46 int heads;
47 int sectors;
48 int cylinders;
49};
50
51
52
53
54
55
56#define CT_NONE 0
57#define CT_OK 218
58#define FT_FILESYS 8
59#define FT_DRIVE 9
60
61
62
63
64
65
66
67struct sgentry {
68 __le32 addr;
69 __le32 count;
70};
71
72struct user_sgentry {
73 u32 addr;
74 u32 count;
75};
76
77struct sgentry64 {
78 __le32 addr[2];
79 __le32 count;
80};
81
82struct user_sgentry64 {
83 u32 addr[2];
84 u32 count;
85};
86
87struct sgentryraw {
88 __le32 next;
89 __le32 prev;
90 __le32 addr[2];
91 __le32 count;
92 __le32 flags;
93};
94
95struct user_sgentryraw {
96 u32 next;
97 u32 prev;
98 u32 addr[2];
99 u32 count;
100 u32 flags;
101};
102
103
104
105
106
107
108
109
110struct sgmap {
111 __le32 count;
112 struct sgentry sg[1];
113};
114
115struct user_sgmap {
116 u32 count;
117 struct user_sgentry sg[1];
118};
119
120struct sgmap64 {
121 __le32 count;
122 struct sgentry64 sg[1];
123};
124
125struct user_sgmap64 {
126 u32 count;
127 struct user_sgentry64 sg[1];
128};
129
130struct sgmapraw {
131 __le32 count;
132 struct sgentryraw sg[1];
133};
134
135struct user_sgmapraw {
136 u32 count;
137 struct user_sgentryraw sg[1];
138};
139
140struct creation_info
141{
142 u8 buildnum;
143 u8 usec;
144 u8 via;
145
146
147 u8 year;
148 __le32 date;
149
150
151
152
153
154
155 __le32 serial[2];
156};
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171#define NUMBER_OF_COMM_QUEUES 8
172#define HOST_HIGH_CMD_ENTRIES 4
173#define HOST_NORM_CMD_ENTRIES 8
174#define ADAP_HIGH_CMD_ENTRIES 4
175#define ADAP_NORM_CMD_ENTRIES 512
176#define HOST_HIGH_RESP_ENTRIES 4
177#define HOST_NORM_RESP_ENTRIES 512
178#define ADAP_HIGH_RESP_ENTRIES 4
179#define ADAP_NORM_RESP_ENTRIES 8
180
181#define TOTAL_QUEUE_ENTRIES \
182 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
183 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
184
185
186
187
188
189
190#define QUEUE_ALIGNMENT 16
191
192
193
194
195
196
197
198
199struct aac_entry {
200 __le32 size;
201 __le32 addr;
202};
203
204
205
206
207
208
209struct aac_qhdr {
210 __le64 header_addr;
211
212 __le32 *producer;
213 __le32 *consumer;
214};
215
216
217
218
219
220
221#define HostNormCmdQue 1
222#define HostHighCmdQue 2
223#define HostNormRespQue 3
224#define HostHighRespQue 4
225#define AdapNormRespNotFull 5
226#define AdapHighRespNotFull 6
227#define AdapNormCmdNotFull 7
228#define AdapHighCmdNotFull 8
229#define SynchCommandComplete 9
230#define AdapInternalError 0xfe
231
232
233
234
235
236
237
238#define AdapNormCmdQue 2
239#define AdapHighCmdQue 3
240#define AdapNormRespQue 6
241#define AdapHighRespQue 7
242#define HostShutdown 8
243#define HostPowerFail 9
244#define FatalCommError 10
245#define HostNormRespNotFull 11
246#define HostHighRespNotFull 12
247#define HostNormCmdNotFull 13
248#define HostHighCmdNotFull 14
249#define FastIo 15
250#define AdapPrintfDone 16
251
252
253
254
255
256
257enum aac_queue_types {
258 HostNormCmdQueue = 0,
259 HostHighCmdQueue,
260 AdapNormCmdQueue,
261 AdapHighCmdQueue,
262 HostNormRespQueue,
263 HostHighRespQueue,
264 AdapNormRespQueue,
265 AdapHighRespQueue
266};
267
268
269
270
271
272#define FIB_MAGIC 0x0001
273
274
275
276
277
278#define FsaNormal 1
279
280
281struct aac_fib_xporthdr {
282 u64 HostAddress;
283 u32 Size;
284 u32 Handle;
285 u64 Reserved[2];
286};
287
288#define ALIGN32 32
289
290
291
292
293
294
295struct aac_fibhdr {
296 __le32 XferState;
297 __le16 Command;
298 u8 StructType;
299 u8 Flags;
300 __le16 Size;
301 __le16 SenderSize;
302
303 __le32 SenderFibAddress;
304 __le32 ReceiverFibAddress;
305
306 u32 SenderData;
307 union {
308 struct {
309 __le32 _ReceiverTimeStart;
310
311 __le32 _ReceiverTimeDone;
312
313 } _s;
314 } _u;
315};
316
317struct hw_fib {
318 struct aac_fibhdr header;
319 u8 data[512-sizeof(struct aac_fibhdr)];
320};
321
322
323
324
325
326#define TestCommandResponse 1
327#define TestAdapterCommand 2
328
329
330
331#define LastTestCommand 100
332#define ReinitHostNormCommandQueue 101
333#define ReinitHostHighCommandQueue 102
334#define ReinitHostHighRespQueue 103
335#define ReinitHostNormRespQueue 104
336#define ReinitAdapNormCommandQueue 105
337#define ReinitAdapHighCommandQueue 107
338#define ReinitAdapHighRespQueue 108
339#define ReinitAdapNormRespQueue 109
340#define InterfaceShutdown 110
341#define DmaCommandFib 120
342#define StartProfile 121
343#define TermProfile 122
344#define SpeedTest 123
345#define TakeABreakPt 124
346#define RequestPerfData 125
347#define SetInterruptDefTimer 126
348#define SetInterruptDefCount 127
349#define GetInterruptDefStatus 128
350#define LastCommCommand 129
351
352
353
354#define NuFileSystem 300
355#define UFS 301
356#define HostFileSystem 302
357#define LastFileSystemCommand 303
358
359
360
361#define ContainerCommand 500
362#define ContainerCommand64 501
363#define ContainerRawIo 502
364
365
366
367#define ScsiPortCommand 600
368#define ScsiPortCommand64 601
369
370
371
372#define AifRequest 700
373#define CheckRevision 701
374#define FsaHostShutdown 702
375#define RequestAdapterInfo 703
376#define IsAdapterPaused 704
377#define SendHostTime 705
378#define RequestSupplementAdapterInfo 706
379#define LastMiscCommand 707
380
381
382
383
384
385enum fib_xfer_state {
386 HostOwned = (1<<0),
387 AdapterOwned = (1<<1),
388 FibInitialized = (1<<2),
389 FibEmpty = (1<<3),
390 AllocatedFromPool = (1<<4),
391 SentFromHost = (1<<5),
392 SentFromAdapter = (1<<6),
393 ResponseExpected = (1<<7),
394 NoResponseExpected = (1<<8),
395 AdapterProcessed = (1<<9),
396 HostProcessed = (1<<10),
397 HighPriority = (1<<11),
398 NormalPriority = (1<<12),
399 Async = (1<<13),
400 AsyncIo = (1<<13),
401 PageFileIo = (1<<14),
402 ShutdownRequest = (1<<15),
403 LazyWrite = (1<<16),
404 AdapterMicroFib = (1<<17),
405 BIOSFibPath = (1<<18),
406 FastResponseCapable = (1<<19),
407 ApiFib = (1<<20),
408
409 NoMoreAifDataAvailable = (1<<21)
410};
411
412
413
414
415
416
417#define ADAPTER_INIT_STRUCT_REVISION 3
418#define ADAPTER_INIT_STRUCT_REVISION_4 4
419#define ADAPTER_INIT_STRUCT_REVISION_6 6
420
421struct aac_init
422{
423 __le32 InitStructRevision;
424 __le32 MiniPortRevision;
425 __le32 fsrev;
426 __le32 CommHeaderAddress;
427 __le32 FastIoCommAreaAddress;
428 __le32 AdapterFibsPhysicalAddress;
429 __le32 AdapterFibsVirtualAddress;
430 __le32 AdapterFibsSize;
431 __le32 AdapterFibAlign;
432 __le32 printfbuf;
433 __le32 printfbufsiz;
434 __le32 HostPhysMemPages;
435
436 __le32 HostElapsedSeconds;
437
438
439
440 __le32 InitFlags;
441#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
442#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
443#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
444#define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000041
445 __le32 MaxIoCommands;
446 __le32 MaxIoSize;
447 __le32 MaxFibSize;
448
449 __le32 MaxNumAif;
450
451 __le32 HostRRQ_AddrLow;
452 __le32 HostRRQ_AddrHigh;
453};
454
455enum aac_log_level {
456 LOG_AAC_INIT = 10,
457 LOG_AAC_INFORMATIONAL = 20,
458 LOG_AAC_WARNING = 30,
459 LOG_AAC_LOW_ERROR = 40,
460 LOG_AAC_MEDIUM_ERROR = 50,
461 LOG_AAC_HIGH_ERROR = 60,
462 LOG_AAC_PANIC = 70,
463 LOG_AAC_DEBUG = 80,
464 LOG_AAC_WINDBG_PRINT = 90
465};
466
467#define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
468#define FSAFS_NTC_FIB_CONTEXT 0x030c
469
470struct aac_dev;
471struct fib;
472struct scsi_cmnd;
473
474struct adapter_ops
475{
476
477 void (*adapter_interrupt)(struct aac_dev *dev);
478 void (*adapter_notify)(struct aac_dev *dev, u32 event);
479 void (*adapter_disable_int)(struct aac_dev *dev);
480 void (*adapter_enable_int)(struct aac_dev *dev);
481 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
482 int (*adapter_check_health)(struct aac_dev *dev);
483 int (*adapter_restart)(struct aac_dev *dev, int bled);
484
485 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
486 irq_handler_t adapter_intr;
487
488 int (*adapter_deliver)(struct fib * fib);
489 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
490 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
491 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
492 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
493
494 int (*adapter_comm)(struct aac_dev * dev, int comm);
495};
496
497
498
499
500
501struct aac_driver_ident
502{
503 int (*init)(struct aac_dev *dev);
504 char * name;
505 char * vname;
506 char * model;
507 u16 channels;
508 int quirks;
509};
510
511
512
513
514
515
516#define AAC_QUIRK_31BIT 0x0001
517
518
519
520
521
522
523#define AAC_QUIRK_34SG 0x0002
524
525
526
527
528#define AAC_QUIRK_SLAVE 0x0004
529
530
531
532
533#define AAC_QUIRK_MASTER 0x0008
534
535
536
537
538
539
540#define AAC_QUIRK_17SG 0x0010
541
542
543
544
545
546#define AAC_QUIRK_SCSI_32 0x0020
547
548
549
550
551
552
553
554
555
556
557
558struct aac_queue {
559 u64 logical;
560 struct aac_entry *base;
561 struct aac_qhdr headers;
562 u32 entries;
563 wait_queue_head_t qfull;
564 wait_queue_head_t cmdready;
565
566 spinlock_t *lock;
567 spinlock_t lockdata;
568 struct list_head cmdq;
569
570 u32 numpending;
571 struct aac_dev * dev;
572};
573
574
575
576
577
578
579struct aac_queue_block
580{
581 struct aac_queue queue[8];
582};
583
584
585
586
587
588struct sa_drawbridge_CSR {
589
590 __le32 reserved[10];
591 u8 LUT_Offset;
592 u8 reserved1[3];
593 __le32 LUT_Data;
594 __le32 reserved2[26];
595 __le16 PRICLEARIRQ;
596 __le16 SECCLEARIRQ;
597 __le16 PRISETIRQ;
598 __le16 SECSETIRQ;
599 __le16 PRICLEARIRQMASK;
600 __le16 SECCLEARIRQMASK;
601 __le16 PRISETIRQMASK;
602 __le16 SECSETIRQMASK;
603 __le32 MAILBOX0;
604 __le32 MAILBOX1;
605 __le32 MAILBOX2;
606 __le32 MAILBOX3;
607 __le32 MAILBOX4;
608 __le32 MAILBOX5;
609 __le32 MAILBOX6;
610 __le32 MAILBOX7;
611 __le32 ROM_Setup_Data;
612 __le32 ROM_Control_Addr;
613 __le32 reserved3[12];
614 __le32 LUT[64];
615};
616
617#define Mailbox0 SaDbCSR.MAILBOX0
618#define Mailbox1 SaDbCSR.MAILBOX1
619#define Mailbox2 SaDbCSR.MAILBOX2
620#define Mailbox3 SaDbCSR.MAILBOX3
621#define Mailbox4 SaDbCSR.MAILBOX4
622#define Mailbox5 SaDbCSR.MAILBOX5
623#define Mailbox6 SaDbCSR.MAILBOX6
624#define Mailbox7 SaDbCSR.MAILBOX7
625
626#define DoorbellReg_p SaDbCSR.PRISETIRQ
627#define DoorbellReg_s SaDbCSR.SECSETIRQ
628#define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
629
630
631#define DOORBELL_0 0x0001
632#define DOORBELL_1 0x0002
633#define DOORBELL_2 0x0004
634#define DOORBELL_3 0x0008
635#define DOORBELL_4 0x0010
636#define DOORBELL_5 0x0020
637#define DOORBELL_6 0x0040
638
639
640#define PrintfReady DOORBELL_5
641#define PrintfDone DOORBELL_5
642
643struct sa_registers {
644 struct sa_drawbridge_CSR SaDbCSR;
645};
646
647
648#define Sa_MINIPORT_REVISION 1
649
650#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
651#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
652#define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
653#define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
654
655
656
657
658
659struct rx_mu_registers {
660
661 __le32 ARSR;
662 __le32 reserved0;
663 __le32 AWR;
664 __le32 reserved1;
665 __le32 IMRx[2];
666 __le32 OMRx[2];
667 __le32 IDR;
668 __le32 IISR;
669
670 __le32 IIMR;
671
672 __le32 ODR;
673 __le32 OISR;
674
675 __le32 OIMR;
676
677 __le32 reserved2;
678 __le32 reserved3;
679 __le32 InboundQueue;
680 __le32 OutboundQueue;
681
682
683};
684
685struct rx_inbound {
686 __le32 Mailbox[8];
687};
688
689#define INBOUNDDOORBELL_0 0x00000001
690#define INBOUNDDOORBELL_1 0x00000002
691#define INBOUNDDOORBELL_2 0x00000004
692#define INBOUNDDOORBELL_3 0x00000008
693#define INBOUNDDOORBELL_4 0x00000010
694#define INBOUNDDOORBELL_5 0x00000020
695#define INBOUNDDOORBELL_6 0x00000040
696
697#define OUTBOUNDDOORBELL_0 0x00000001
698#define OUTBOUNDDOORBELL_1 0x00000002
699#define OUTBOUNDDOORBELL_2 0x00000004
700#define OUTBOUNDDOORBELL_3 0x00000008
701#define OUTBOUNDDOORBELL_4 0x00000010
702
703#define InboundDoorbellReg MUnit.IDR
704#define OutboundDoorbellReg MUnit.ODR
705
706struct rx_registers {
707 struct rx_mu_registers MUnit;
708 __le32 reserved1[2];
709 struct rx_inbound IndexRegs;
710};
711
712#define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
713#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
714#define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
715#define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
716
717
718
719
720
721#define rkt_mu_registers rx_mu_registers
722#define rkt_inbound rx_inbound
723
724struct rkt_registers {
725 struct rkt_mu_registers MUnit;
726 __le32 reserved1[1006];
727 struct rkt_inbound IndexRegs;
728};
729
730#define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
731#define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
732#define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
733#define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
734
735
736
737
738
739#define src_inbound rx_inbound
740
741struct src_mu_registers {
742
743 __le32 reserved0[8];
744 __le32 IDR;
745 __le32 IISR;
746 __le32 reserved1[3];
747 __le32 OIMR;
748 __le32 reserved2[25];
749 __le32 ODR_R;
750 __le32 ODR_C;
751 __le32 reserved3[6];
752 __le32 OMR;
753 __le32 IQ_L;
754 __le32 IQ_H;
755};
756
757struct src_registers {
758 struct src_mu_registers MUnit;
759 __le32 reserved1[130790];
760 struct src_inbound IndexRegs;
761};
762
763#define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR))
764#define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR))
765#define src_writeb(AEP, CSR, value) writeb(value, \
766 &((AEP)->regs.src.bar0->CSR))
767#define src_writel(AEP, CSR, value) writel(value, \
768 &((AEP)->regs.src.bar0->CSR))
769
770#define SRC_ODR_SHIFT 12
771#define SRC_IDR_SHIFT 9
772
773typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
774
775struct aac_fib_context {
776 s16 type;
777 s16 size;
778 u32 unique;
779 ulong jiffies;
780 struct list_head next;
781 struct semaphore wait_sem;
782 int wait;
783 unsigned long count;
784 struct list_head fib_list;
785};
786
787struct sense_data {
788 u8 error_code;
789 u8 valid:1;
790
791
792
793 u8 segment_number;
794 u8 sense_key:4;
795 u8 reserved:1;
796 u8 ILI:1;
797 u8 EOM:1;
798 u8 filemark:1;
799
800 u8 information[4];
801
802
803
804 u8 add_sense_len;
805 u8 cmnd_info[4];
806 u8 ASC;
807 u8 ASCQ;
808 u8 FRUC;
809 u8 bit_ptr:3;
810
811
812 u8 BPV:1;
813
814
815 u8 reserved2:2;
816 u8 CD:1;
817
818
819 u8 SKSV:1;
820 u8 field_ptr[2];
821};
822
823struct fsa_dev_info {
824 u64 last;
825 u64 size;
826 u32 type;
827 u32 config_waiting_on;
828 unsigned long config_waiting_stamp;
829 u16 queue_depth;
830 u8 config_needed;
831 u8 valid;
832 u8 ro;
833 u8 locked;
834 u8 deleted;
835 char devname[8];
836 struct sense_data sense_data;
837};
838
839struct fib {
840 void *next;
841 s16 type;
842 s16 size;
843
844
845
846 struct aac_dev *dev;
847
848
849
850
851 struct semaphore event_wait;
852 spinlock_t event_lock;
853
854 u32 done;
855 fib_callback callback;
856 void *callback_data;
857 u32 flags;
858
859
860
861
862 struct list_head fiblink;
863 void *data;
864 struct hw_fib *hw_fib_va;
865 dma_addr_t hw_fib_pa;
866};
867
868
869
870
871
872
873
874struct aac_adapter_info
875{
876 __le32 platform;
877 __le32 cpu;
878 __le32 subcpu;
879 __le32 clock;
880 __le32 execmem;
881 __le32 buffermem;
882 __le32 totalmem;
883 __le32 kernelrev;
884 __le32 kernelbuild;
885 __le32 monitorrev;
886 __le32 monitorbuild;
887 __le32 hwrev;
888 __le32 hwbuild;
889 __le32 biosrev;
890 __le32 biosbuild;
891 __le32 cluster;
892 __le32 clusterchannelmask;
893 __le32 serial[2];
894 __le32 battery;
895 __le32 options;
896 __le32 OEM;
897};
898
899struct aac_supplement_adapter_info
900{
901 u8 AdapterTypeText[17+1];
902 u8 Pad[2];
903 __le32 FlashMemoryByteSize;
904 __le32 FlashImageId;
905 __le32 MaxNumberPorts;
906 __le32 Version;
907 __le32 FeatureBits;
908 u8 SlotNumber;
909 u8 ReservedPad0[3];
910 u8 BuildDate[12];
911 __le32 CurrentNumberPorts;
912 struct {
913 u8 AssemblyPn[8];
914 u8 FruPn[8];
915 u8 BatteryFruPn[8];
916 u8 EcVersionString[8];
917 u8 Tsid[12];
918 } VpdInfo;
919 __le32 FlashFirmwareRevision;
920 __le32 FlashFirmwareBuild;
921 __le32 RaidTypeMorphOptions;
922 __le32 FlashFirmwareBootRevision;
923 __le32 FlashFirmwareBootBuild;
924 u8 MfgPcbaSerialNo[12];
925 u8 MfgWWNName[8];
926 __le32 SupportedOptions2;
927 __le32 StructExpansion;
928
929 __le32 FeatureBits3;
930 __le32 SupportedPerformanceModes;
931 __le32 ReservedForFutureGrowth[80];
932};
933#define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
934#define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
935
936#define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
937#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
938#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
939#define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000)
940#define AAC_SIS_VERSION_V3 3
941#define AAC_SIS_SLOT_UNKNOWN 0xFF
942
943#define GetBusInfo 0x00000009
944struct aac_bus_info {
945 __le32 Command;
946 __le32 ObjType;
947 __le32 MethodId;
948 __le32 ObjectId;
949 __le32 CtlCmd;
950};
951
952struct aac_bus_info_response {
953 __le32 Status;
954 __le32 ObjType;
955 __le32 MethodId;
956 __le32 ObjectId;
957 __le32 CtlCmd;
958 __le32 ProbeComplete;
959 __le32 BusCount;
960 __le32 TargetsPerBus;
961 u8 InitiatorBusId[10];
962 u8 BusValid[10];
963};
964
965
966
967
968#define AAC_BAT_REQ_PRESENT (1)
969#define AAC_BAT_REQ_NOTPRESENT (2)
970#define AAC_BAT_OPT_PRESENT (3)
971#define AAC_BAT_OPT_NOTPRESENT (4)
972#define AAC_BAT_NOT_SUPPORTED (5)
973
974
975
976#define AAC_CPU_SIMULATOR (1)
977#define AAC_CPU_I960 (2)
978#define AAC_CPU_STRONGARM (3)
979
980
981
982
983#define AAC_OPT_SNAPSHOT cpu_to_le32(1)
984#define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
985#define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
986#define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
987#define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
988#define AAC_OPT_RAID50 cpu_to_le32(1<<5)
989#define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
990#define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
991#define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
992#define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
993#define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
994#define AAC_OPT_ALARM cpu_to_le32(1<<11)
995#define AAC_OPT_NONDASD cpu_to_le32(1<<12)
996#define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
997#define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
998#define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
999#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
1000#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
1001#define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28)
1002
1003struct aac_dev
1004{
1005 struct list_head entry;
1006 const char *name;
1007 int id;
1008
1009
1010
1011
1012 unsigned max_fib_size;
1013 unsigned sg_tablesize;
1014 unsigned max_num_aif;
1015
1016
1017
1018
1019 dma_addr_t hw_fib_pa;
1020 struct hw_fib *hw_fib_va;
1021 struct hw_fib *aif_base_va;
1022
1023
1024
1025 struct fib *fibs;
1026
1027 struct fib *free_fib;
1028 spinlock_t fib_lock;
1029
1030 struct aac_queue_block *queues;
1031
1032
1033
1034
1035
1036
1037
1038 struct list_head fib_list;
1039
1040 struct adapter_ops a_ops;
1041 unsigned long fsrev;
1042
1043 unsigned long dbg_base;
1044
1045
1046 unsigned base_size, dbg_size;
1047
1048
1049 struct aac_init *init;
1050 dma_addr_t init_pa;
1051
1052 u32 *host_rrq;
1053
1054
1055 dma_addr_t host_rrq_pa;
1056 u32 host_rrq_idx;
1057
1058 struct pci_dev *pdev;
1059 void * printfbuf;
1060 void * comm_addr;
1061 dma_addr_t comm_phys;
1062 size_t comm_size;
1063
1064 struct Scsi_Host *scsi_host_ptr;
1065 int maximum_num_containers;
1066 int maximum_num_physicals;
1067 int maximum_num_channels;
1068 struct fsa_dev_info *fsa_dev;
1069 struct task_struct *thread;
1070 int cardtype;
1071
1072
1073
1074
1075#ifndef AAC_MIN_FOOTPRINT_SIZE
1076# define AAC_MIN_FOOTPRINT_SIZE 8192
1077# define AAC_MIN_SRC_BAR0_SIZE 0x400000
1078# define AAC_MIN_SRC_BAR1_SIZE 0x800
1079#endif
1080 union
1081 {
1082 struct sa_registers __iomem *sa;
1083 struct rx_registers __iomem *rx;
1084 struct rkt_registers __iomem *rkt;
1085 struct {
1086 struct src_registers __iomem *bar0;
1087 char __iomem *bar1;
1088 } src;
1089 } regs;
1090 volatile void __iomem *base, *dbg_base_mapped;
1091 volatile struct rx_inbound __iomem *IndexRegs;
1092 u32 OIMR;
1093
1094
1095
1096 u32 aif_thread;
1097 struct aac_adapter_info adapter_info;
1098 struct aac_supplement_adapter_info supplement_adapter_info;
1099
1100
1101
1102 u8 nondasd_support;
1103 u8 jbod;
1104 u8 cache_protected;
1105 u8 dac_support;
1106 u8 needs_dac;
1107 u8 raid_scsi_mode;
1108 u8 comm_interface;
1109# define AAC_COMM_PRODUCER 0
1110# define AAC_COMM_MESSAGE 1
1111# define AAC_COMM_MESSAGE_TYPE1 3
1112 u8 raw_io_interface;
1113 u8 raw_io_64;
1114 u8 printf_enabled;
1115 u8 in_reset;
1116 u8 msi;
1117 int management_fib_count;
1118 spinlock_t manage_lock;
1119
1120};
1121
1122#define aac_adapter_interrupt(dev) \
1123 (dev)->a_ops.adapter_interrupt(dev)
1124
1125#define aac_adapter_notify(dev, event) \
1126 (dev)->a_ops.adapter_notify(dev, event)
1127
1128#define aac_adapter_disable_int(dev) \
1129 (dev)->a_ops.adapter_disable_int(dev)
1130
1131#define aac_adapter_enable_int(dev) \
1132 (dev)->a_ops.adapter_enable_int(dev)
1133
1134#define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1135 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1136
1137#define aac_adapter_check_health(dev) \
1138 (dev)->a_ops.adapter_check_health(dev)
1139
1140#define aac_adapter_restart(dev,bled) \
1141 (dev)->a_ops.adapter_restart(dev,bled)
1142
1143#define aac_adapter_ioremap(dev, size) \
1144 (dev)->a_ops.adapter_ioremap(dev, size)
1145
1146#define aac_adapter_deliver(fib) \
1147 ((fib)->dev)->a_ops.adapter_deliver(fib)
1148
1149#define aac_adapter_bounds(dev,cmd,lba) \
1150 dev->a_ops.adapter_bounds(dev,cmd,lba)
1151
1152#define aac_adapter_read(fib,cmd,lba,count) \
1153 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1154
1155#define aac_adapter_write(fib,cmd,lba,count,fua) \
1156 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1157
1158#define aac_adapter_scsi(fib,cmd) \
1159 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1160
1161#define aac_adapter_comm(dev,comm) \
1162 (dev)->a_ops.adapter_comm(dev, comm)
1163
1164#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1165#define FIB_CONTEXT_FLAG (0x00000002)
1166
1167
1168
1169
1170
1171#define Null 0
1172#define GetAttributes 1
1173#define SetAttributes 2
1174#define Lookup 3
1175#define ReadLink 4
1176#define Read 5
1177#define Write 6
1178#define Create 7
1179#define MakeDirectory 8
1180#define SymbolicLink 9
1181#define MakeNode 10
1182#define Removex 11
1183#define RemoveDirectoryx 12
1184#define Rename 13
1185#define Link 14
1186#define ReadDirectory 15
1187#define ReadDirectoryPlus 16
1188#define FileSystemStatus 17
1189#define FileSystemInfo 18
1190#define PathConfigure 19
1191#define Commit 20
1192#define Mount 21
1193#define UnMount 22
1194#define Newfs 23
1195#define FsCheck 24
1196#define FsSync 25
1197#define SimReadWrite 26
1198#define SetFileSystemStatus 27
1199#define BlockRead 28
1200#define BlockWrite 29
1201#define NvramIoctl 30
1202#define FsSyncWait 31
1203#define ClearArchiveBit 32
1204#define SetAcl 33
1205#define GetAcl 34
1206#define AssignAcl 35
1207#define FaultInsertion 36
1208#define CrazyCache 37
1209
1210#define MAX_FSACOMMAND_NUM 38
1211
1212
1213
1214
1215
1216
1217
1218#define ST_OK 0
1219#define ST_PERM 1
1220#define ST_NOENT 2
1221#define ST_IO 5
1222#define ST_NXIO 6
1223#define ST_E2BIG 7
1224#define ST_ACCES 13
1225#define ST_EXIST 17
1226#define ST_XDEV 18
1227#define ST_NODEV 19
1228#define ST_NOTDIR 20
1229#define ST_ISDIR 21
1230#define ST_INVAL 22
1231#define ST_FBIG 27
1232#define ST_NOSPC 28
1233#define ST_ROFS 30
1234#define ST_MLINK 31
1235#define ST_WOULDBLOCK 35
1236#define ST_NAMETOOLONG 63
1237#define ST_NOTEMPTY 66
1238#define ST_DQUOT 69
1239#define ST_STALE 70
1240#define ST_REMOTE 71
1241#define ST_NOT_READY 72
1242#define ST_BADHANDLE 10001
1243#define ST_NOT_SYNC 10002
1244#define ST_BAD_COOKIE 10003
1245#define ST_NOTSUPP 10004
1246#define ST_TOOSMALL 10005
1247#define ST_SERVERFAULT 10006
1248#define ST_BADTYPE 10007
1249#define ST_JUKEBOX 10008
1250#define ST_NOTMOUNTED 10009
1251#define ST_MAINTMODE 10010
1252#define ST_STALEACL 10011
1253
1254
1255
1256
1257
1258#define CACHE_CSTABLE 1
1259#define CACHE_UNSTABLE 2
1260
1261
1262
1263
1264
1265
1266#define CMFILE_SYNCH_NVRAM 1
1267#define CMDATA_SYNCH_NVRAM 2
1268#define CMFILE_SYNCH 3
1269#define CMDATA_SYNCH 4
1270#define CMUNSTABLE 5
1271
1272struct aac_read
1273{
1274 __le32 command;
1275 __le32 cid;
1276 __le32 block;
1277 __le32 count;
1278 struct sgmap sg;
1279};
1280
1281struct aac_read64
1282{
1283 __le32 command;
1284 __le16 cid;
1285 __le16 sector_count;
1286 __le32 block;
1287 __le16 pad;
1288 __le16 flags;
1289 struct sgmap64 sg;
1290};
1291
1292struct aac_read_reply
1293{
1294 __le32 status;
1295 __le32 count;
1296};
1297
1298struct aac_write
1299{
1300 __le32 command;
1301 __le32 cid;
1302 __le32 block;
1303 __le32 count;
1304 __le32 stable;
1305 struct sgmap sg;
1306};
1307
1308struct aac_write64
1309{
1310 __le32 command;
1311 __le16 cid;
1312 __le16 sector_count;
1313 __le32 block;
1314 __le16 pad;
1315 __le16 flags;
1316#define IO_TYPE_WRITE 0x00000000
1317#define IO_TYPE_READ 0x00000001
1318#define IO_SUREWRITE 0x00000008
1319 struct sgmap64 sg;
1320};
1321struct aac_write_reply
1322{
1323 __le32 status;
1324 __le32 count;
1325 __le32 committed;
1326};
1327
1328struct aac_raw_io
1329{
1330 __le32 block[2];
1331 __le32 count;
1332 __le16 cid;
1333 __le16 flags;
1334 __le16 bpTotal;
1335 __le16 bpComplete;
1336 struct sgmapraw sg;
1337};
1338
1339#define CT_FLUSH_CACHE 129
1340struct aac_synchronize {
1341 __le32 command;
1342 __le32 type;
1343 __le32 cid;
1344 __le32 parm1;
1345 __le32 parm2;
1346 __le32 parm3;
1347 __le32 parm4;
1348 __le32 count;
1349};
1350
1351struct aac_synchronize_reply {
1352 __le32 dummy0;
1353 __le32 dummy1;
1354 __le32 status;
1355 __le32 parm1;
1356 __le32 parm2;
1357 __le32 parm3;
1358 __le32 parm4;
1359 __le32 parm5;
1360 u8 data[16];
1361};
1362
1363#define CT_POWER_MANAGEMENT 245
1364#define CT_PM_START_UNIT 2
1365#define CT_PM_STOP_UNIT 3
1366#define CT_PM_UNIT_IMMEDIATE 1
1367struct aac_power_management {
1368 __le32 command;
1369 __le32 type;
1370 __le32 sub;
1371 __le32 cid;
1372 __le32 parm;
1373};
1374
1375#define CT_PAUSE_IO 65
1376#define CT_RELEASE_IO 66
1377struct aac_pause {
1378 __le32 command;
1379 __le32 type;
1380 __le32 timeout;
1381 __le32 min;
1382 __le32 noRescan;
1383 __le32 parm3;
1384 __le32 parm4;
1385 __le32 count;
1386};
1387
1388struct aac_srb
1389{
1390 __le32 function;
1391 __le32 channel;
1392 __le32 id;
1393 __le32 lun;
1394 __le32 timeout;
1395 __le32 flags;
1396 __le32 count;
1397 __le32 retry_limit;
1398 __le32 cdb_size;
1399 u8 cdb[16];
1400 struct sgmap sg;
1401};
1402
1403
1404
1405
1406
1407struct user_aac_srb
1408{
1409 u32 function;
1410 u32 channel;
1411 u32 id;
1412 u32 lun;
1413 u32 timeout;
1414 u32 flags;
1415 u32 count;
1416 u32 retry_limit;
1417 u32 cdb_size;
1418 u8 cdb[16];
1419 struct user_sgmap sg;
1420};
1421
1422#define AAC_SENSE_BUFFERSIZE 30
1423
1424struct aac_srb_reply
1425{
1426 __le32 status;
1427 __le32 srb_status;
1428 __le32 scsi_status;
1429 __le32 data_xfer_length;
1430 __le32 sense_data_size;
1431 u8 sense_data[AAC_SENSE_BUFFERSIZE];
1432};
1433
1434
1435
1436#define SRB_NoDataXfer 0x0000
1437#define SRB_DisableDisconnect 0x0004
1438#define SRB_DisableSynchTransfer 0x0008
1439#define SRB_BypassFrozenQueue 0x0010
1440#define SRB_DisableAutosense 0x0020
1441#define SRB_DataIn 0x0040
1442#define SRB_DataOut 0x0080
1443
1444
1445
1446
1447#define SRBF_ExecuteScsi 0x0000
1448#define SRBF_ClaimDevice 0x0001
1449#define SRBF_IO_Control 0x0002
1450#define SRBF_ReceiveEvent 0x0003
1451#define SRBF_ReleaseQueue 0x0004
1452#define SRBF_AttachDevice 0x0005
1453#define SRBF_ReleaseDevice 0x0006
1454#define SRBF_Shutdown 0x0007
1455#define SRBF_Flush 0x0008
1456#define SRBF_AbortCommand 0x0010
1457#define SRBF_ReleaseRecovery 0x0011
1458#define SRBF_ResetBus 0x0012
1459#define SRBF_ResetDevice 0x0013
1460#define SRBF_TerminateIO 0x0014
1461#define SRBF_FlushQueue 0x0015
1462#define SRBF_RemoveDevice 0x0016
1463#define SRBF_DomainValidation 0x0017
1464
1465
1466
1467
1468#define SRB_STATUS_PENDING 0x00
1469#define SRB_STATUS_SUCCESS 0x01
1470#define SRB_STATUS_ABORTED 0x02
1471#define SRB_STATUS_ABORT_FAILED 0x03
1472#define SRB_STATUS_ERROR 0x04
1473#define SRB_STATUS_BUSY 0x05
1474#define SRB_STATUS_INVALID_REQUEST 0x06
1475#define SRB_STATUS_INVALID_PATH_ID 0x07
1476#define SRB_STATUS_NO_DEVICE 0x08
1477#define SRB_STATUS_TIMEOUT 0x09
1478#define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1479#define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1480#define SRB_STATUS_MESSAGE_REJECTED 0x0D
1481#define SRB_STATUS_BUS_RESET 0x0E
1482#define SRB_STATUS_PARITY_ERROR 0x0F
1483#define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1484#define SRB_STATUS_NO_HBA 0x11
1485#define SRB_STATUS_DATA_OVERRUN 0x12
1486#define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1487#define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1488#define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1489#define SRB_STATUS_REQUEST_FLUSHED 0x16
1490#define SRB_STATUS_DELAYED_RETRY 0x17
1491#define SRB_STATUS_INVALID_LUN 0x20
1492#define SRB_STATUS_INVALID_TARGET_ID 0x21
1493#define SRB_STATUS_BAD_FUNCTION 0x22
1494#define SRB_STATUS_ERROR_RECOVERY 0x23
1495#define SRB_STATUS_NOT_STARTED 0x24
1496#define SRB_STATUS_NOT_IN_USE 0x30
1497#define SRB_STATUS_FORCE_ABORT 0x31
1498#define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1499
1500
1501
1502
1503
1504#define VM_Null 0
1505#define VM_NameServe 1
1506#define VM_ContainerConfig 2
1507#define VM_Ioctl 3
1508#define VM_FilesystemIoctl 4
1509#define VM_CloseAll 5
1510#define VM_CtBlockRead 6
1511#define VM_CtBlockWrite 7
1512#define VM_SliceBlockRead 8
1513#define VM_SliceBlockWrite 9
1514#define VM_DriveBlockRead 10
1515#define VM_DriveBlockWrite 11
1516#define VM_EnclosureMgt 12
1517#define VM_Unused 13
1518#define VM_CtBlockVerify 14
1519#define VM_CtPerf 15
1520#define VM_CtBlockRead64 16
1521#define VM_CtBlockWrite64 17
1522#define VM_CtBlockVerify64 18
1523#define VM_CtHostRead64 19
1524#define VM_CtHostWrite64 20
1525#define VM_DrvErrTblLog 21
1526#define VM_NameServe64 22
1527
1528#define MAX_VMCOMMAND_NUM 23
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538struct aac_fsinfo {
1539 __le32 fsTotalSize;
1540 __le32 fsBlockSize;
1541 __le32 fsFragSize;
1542 __le32 fsMaxExtendSize;
1543 __le32 fsSpaceUnits;
1544 __le32 fsMaxNumFiles;
1545 __le32 fsNumFreeFiles;
1546 __le32 fsInodeDensity;
1547};
1548
1549union aac_contentinfo {
1550 struct aac_fsinfo filesys;
1551};
1552
1553
1554
1555
1556
1557#define CT_GET_CONFIG_STATUS 147
1558struct aac_get_config_status {
1559 __le32 command;
1560 __le32 type;
1561 __le32 parm1;
1562 __le32 parm2;
1563 __le32 parm3;
1564 __le32 parm4;
1565 __le32 parm5;
1566 __le32 count;
1567};
1568
1569#define CFACT_CONTINUE 0
1570#define CFACT_PAUSE 1
1571#define CFACT_ABORT 2
1572struct aac_get_config_status_resp {
1573 __le32 response;
1574 __le32 dummy0;
1575 __le32 status;
1576 __le32 parm1;
1577 __le32 parm2;
1578 __le32 parm3;
1579 __le32 parm4;
1580 __le32 parm5;
1581 struct {
1582 __le32 action;
1583 __le16 flags;
1584 __le16 count;
1585 } data;
1586};
1587
1588
1589
1590
1591
1592#define CT_COMMIT_CONFIG 152
1593
1594struct aac_commit_config {
1595 __le32 command;
1596 __le32 type;
1597};
1598
1599
1600
1601
1602
1603#define CT_GET_CONTAINER_COUNT 4
1604struct aac_get_container_count {
1605 __le32 command;
1606 __le32 type;
1607};
1608
1609struct aac_get_container_count_resp {
1610 __le32 response;
1611 __le32 dummy0;
1612 __le32 MaxContainers;
1613 __le32 ContainerSwitchEntries;
1614 __le32 MaxPartitions;
1615};
1616
1617
1618
1619
1620
1621
1622
1623struct aac_mntent {
1624 __le32 oid;
1625 u8 name[16];
1626 struct creation_info create_info;
1627 __le32 capacity;
1628 __le32 vol;
1629 __le32 obj;
1630 __le32 state;
1631
1632 union aac_contentinfo fileinfo;
1633
1634 __le32 altoid;
1635
1636 __le32 capacityhigh;
1637};
1638
1639#define FSCS_NOTCLEAN 0x0001
1640#define FSCS_READONLY 0x0002
1641#define FSCS_HIDDEN 0x0004
1642#define FSCS_NOT_READY 0x0008
1643
1644struct aac_query_mount {
1645 __le32 command;
1646 __le32 type;
1647 __le32 count;
1648};
1649
1650struct aac_mount {
1651 __le32 status;
1652 __le32 type;
1653 __le32 count;
1654 struct aac_mntent mnt[1];
1655};
1656
1657#define CT_READ_NAME 130
1658struct aac_get_name {
1659 __le32 command;
1660 __le32 type;
1661 __le32 cid;
1662 __le32 parm1;
1663 __le32 parm2;
1664 __le32 parm3;
1665 __le32 parm4;
1666 __le32 count;
1667};
1668
1669struct aac_get_name_resp {
1670 __le32 dummy0;
1671 __le32 dummy1;
1672 __le32 status;
1673 __le32 parm1;
1674 __le32 parm2;
1675 __le32 parm3;
1676 __le32 parm4;
1677 __le32 parm5;
1678 u8 data[16];
1679};
1680
1681#define CT_CID_TO_32BITS_UID 165
1682struct aac_get_serial {
1683 __le32 command;
1684 __le32 type;
1685 __le32 cid;
1686};
1687
1688struct aac_get_serial_resp {
1689 __le32 dummy0;
1690 __le32 dummy1;
1691 __le32 status;
1692 __le32 uid;
1693};
1694
1695
1696
1697
1698
1699struct aac_close {
1700 __le32 command;
1701 __le32 cid;
1702};
1703
1704struct aac_query_disk
1705{
1706 s32 cnum;
1707 s32 bus;
1708 s32 id;
1709 s32 lun;
1710 u32 valid;
1711 u32 locked;
1712 u32 deleted;
1713 s32 instance;
1714 s8 name[10];
1715 u32 unmapped;
1716};
1717
1718struct aac_delete_disk {
1719 u32 disknum;
1720 u32 cnum;
1721};
1722
1723struct fib_ioctl
1724{
1725 u32 fibctx;
1726 s32 wait;
1727 char __user *fib;
1728};
1729
1730struct revision
1731{
1732 u32 compat;
1733 __le32 version;
1734 __le32 build;
1735};
1736
1737
1738
1739
1740
1741
1742#define CTL_CODE(function, method) ( \
1743 (4<< 16) | ((function) << 2) | (method) \
1744)
1745
1746
1747
1748
1749
1750
1751#define METHOD_BUFFERED 0
1752#define METHOD_NEITHER 3
1753
1754
1755
1756
1757
1758#define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1759#define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1760#define FSACTL_DELETE_DISK 0x163
1761#define FSACTL_QUERY_DISK 0x173
1762#define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1763#define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1764#define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1765#define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1766#define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1767#define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1768#define FSACTL_GET_CONTAINERS 2131
1769#define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1770
1771
1772struct aac_common
1773{
1774
1775
1776
1777
1778 u32 irq_mod;
1779 u32 peak_fibs;
1780 u32 zero_fibs;
1781 u32 fib_timeouts;
1782
1783
1784
1785#ifdef DBG
1786 u32 FibsSent;
1787 u32 FibRecved;
1788 u32 NoResponseSent;
1789 u32 NoResponseRecved;
1790 u32 AsyncSent;
1791 u32 AsyncRecved;
1792 u32 NormalSent;
1793 u32 NormalRecved;
1794#endif
1795};
1796
1797extern struct aac_common aac_config;
1798
1799
1800
1801
1802
1803
1804
1805#ifdef DBG
1806#define FIB_COUNTER_INCREMENT(counter) (counter)++
1807#else
1808#define FIB_COUNTER_INCREMENT(counter)
1809#endif
1810
1811
1812
1813
1814
1815
1816#define BREAKPOINT_REQUEST 0x00000004
1817#define INIT_STRUCT_BASE_ADDRESS 0x00000005
1818#define READ_PERMANENT_PARAMETERS 0x0000000a
1819#define WRITE_PERMANENT_PARAMETERS 0x0000000b
1820#define HOST_CRASHING 0x0000000d
1821#define SEND_SYNCHRONOUS_FIB 0x0000000c
1822#define COMMAND_POST_RESULTS 0x00000014
1823#define GET_ADAPTER_PROPERTIES 0x00000019
1824#define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1825#define RCV_TEMP_READINGS 0x00000025
1826#define GET_COMM_PREFERRED_SETTINGS 0x00000026
1827#define IOP_RESET 0x00001000
1828#define IOP_RESET_ALWAYS 0x00001001
1829#define RE_INIT_ADAPTER 0x000000ee
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852#define SELF_TEST_FAILED 0x00000004
1853#define MONITOR_PANIC 0x00000020
1854#define KERNEL_UP_AND_RUNNING 0x00000080
1855#define KERNEL_PANIC 0x00000100
1856
1857
1858
1859
1860
1861#define DoorBellSyncCmdAvailable (1<<0)
1862#define DoorBellPrintfDone (1<<5)
1863#define DoorBellAdapterNormCmdReady (1<<1)
1864#define DoorBellAdapterNormRespReady (1<<2)
1865#define DoorBellAdapterNormCmdNotFull (1<<3)
1866#define DoorBellAdapterNormRespNotFull (1<<4)
1867#define DoorBellPrintfReady (1<<5)
1868#define DoorBellAifPending (1<<6)
1869
1870
1871#define PmDoorBellResponseSent (1<<1)
1872
1873
1874
1875
1876
1877
1878#define AifCmdEventNotify 1
1879#define AifEnConfigChange 3
1880#define AifEnContainerChange 4
1881#define AifEnDeviceFailure 5
1882#define AifEnEnclosureManagement 13
1883#define EM_DRIVE_INSERTION 31
1884#define EM_DRIVE_REMOVAL 32
1885#define AifEnBatteryEvent 14
1886#define AifEnAddContainer 15
1887#define AifEnDeleteContainer 16
1888#define AifEnExpEvent 23
1889#define AifExeFirmwarePanic 3
1890#define AifHighPriority 3
1891#define AifEnAddJBOD 30
1892#define AifEnDeleteJBOD 31
1893
1894#define AifCmdJobProgress 2
1895#define AifJobCtrZero 101
1896#define AifJobStsSuccess 1
1897#define AifJobStsRunning 102
1898#define AifCmdAPIReport 3
1899#define AifCmdDriverNotify 4
1900#define AifDenMorphComplete 200
1901#define AifDenVolumeExtendComplete 201
1902#define AifReqJobList 100
1903#define AifReqJobsForCtr 101
1904#define AifReqJobsForScsi 102
1905#define AifReqJobReport 103
1906#define AifReqTerminateJob 104
1907#define AifReqSuspendJob 105
1908#define AifReqResumeJob 106
1909#define AifReqSendAPIReport 107
1910#define AifReqAPIJobStart 108
1911#define AifReqAPIJobUpdate 109
1912#define AifReqAPIJobFinish 110
1913
1914
1915#define AifReqEvent 200
1916
1917
1918
1919
1920
1921
1922
1923struct aac_aifcmd {
1924 __le32 command;
1925 __le32 seqnum;
1926 u8 data[1];
1927};
1928
1929
1930
1931
1932
1933
1934static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
1935{
1936 sector_div(capacity, divisor);
1937 return capacity;
1938}
1939
1940
1941#define AAC_OWNER_MIDLEVEL 0x101
1942#define AAC_OWNER_LOWLEVEL 0x102
1943#define AAC_OWNER_ERROR_HANDLER 0x103
1944#define AAC_OWNER_FIRMWARE 0x106
1945
1946const char *aac_driverinfo(struct Scsi_Host *);
1947struct fib *aac_fib_alloc(struct aac_dev *dev);
1948int aac_fib_setup(struct aac_dev *dev);
1949void aac_fib_map_free(struct aac_dev *dev);
1950void aac_fib_free(struct fib * context);
1951void aac_fib_init(struct fib * context);
1952void aac_printf(struct aac_dev *dev, u32 val);
1953int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1954int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1955void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1956int aac_fib_complete(struct fib * context);
1957#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
1958struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1959int aac_get_config_status(struct aac_dev *dev, int commit_flag);
1960int aac_get_containers(struct aac_dev *dev);
1961int aac_scsi_cmd(struct scsi_cmnd *cmd);
1962int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1963#ifndef shost_to_class
1964#define shost_to_class(shost) &shost->shost_dev
1965#endif
1966ssize_t aac_get_serial_number(struct device *dev, char *buf);
1967int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1968int aac_rx_init(struct aac_dev *dev);
1969int aac_rkt_init(struct aac_dev *dev);
1970int aac_nark_init(struct aac_dev *dev);
1971int aac_sa_init(struct aac_dev *dev);
1972int aac_src_init(struct aac_dev *dev);
1973int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
1974unsigned int aac_response_normal(struct aac_queue * q);
1975unsigned int aac_command_normal(struct aac_queue * q);
1976unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
1977 int isAif, int isFastResponse,
1978 struct hw_fib *aif_fib);
1979int aac_reset_adapter(struct aac_dev * dev, int forced);
1980int aac_check_health(struct aac_dev * dev);
1981int aac_command_thread(void *data);
1982int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1983int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
1984struct aac_driver_ident* aac_get_driver_ident(int devtype);
1985int aac_get_adapter_info(struct aac_dev* dev);
1986int aac_send_shutdown(struct aac_dev *dev);
1987int aac_probe_container(struct aac_dev *dev, int cid);
1988int _aac_rx_init(struct aac_dev *dev);
1989int aac_rx_select_comm(struct aac_dev *dev, int comm);
1990int aac_rx_deliver_producer(struct fib * fib);
1991char * get_container_type(unsigned type);
1992extern int numacb;
1993extern int acbsize;
1994extern char aac_driver_version[];
1995extern int startup_timeout;
1996extern int aif_timeout;
1997extern int expose_physicals;
1998extern int aac_reset_devices;
1999extern int aac_msi;
2000extern int aac_commit;
2001extern int update_interval;
2002extern int check_interval;
2003extern int aac_check_reset;
2004